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-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/aarch32-pmsa.h56
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/aarch32-system-registers.h2
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/arm.h28
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/armv4.h48
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/armv7m.h48
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/cpu.h58
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h25
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/cpuatomic.h14
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h58
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/paravirt.h32
10 files changed, 290 insertions, 79 deletions
diff --git a/cpukit/score/cpu/arm/include/rtems/score/aarch32-pmsa.h b/cpukit/score/cpu/arm/include/rtems/score/aarch32-pmsa.h
index 47b034813c..36541a97aa 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/aarch32-pmsa.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/aarch32-pmsa.h
@@ -10,7 +10,7 @@
*/
/*
- * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ * Copyright (C) 2020 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -278,6 +278,33 @@ typedef struct {
} AArch32_PMSA_Section;
/**
+ * @brief The region definition is used to configure the Memory Protection
+ * Unit (MPU).
+ *
+ * A region cannot be empty.
+ */
+typedef struct {
+ /**
+ * @brief This member defines the base address of the region.
+ *
+ * The limit address is this the address of the first byte of the region.
+ */
+ uint32_t base;
+
+ /**
+ * @brief This member defines the limit address of the region.
+ *
+ * The limit address is this the address of the last byte of the region.
+ */
+ uint32_t limit;
+
+ /**
+ * @brief This member defines the attributes of the region.
+ */
+ uint32_t attributes;
+} AArch32_PMSA_Region;
+
+/**
* @brief Initializes the Memory Protection Unit (MPU).
*
* The section definitions are used to define the regions of the MPU. Sections
@@ -285,6 +312,8 @@ typedef struct {
* regions are used, then the MPU is not enabled. Overlapping section
* definitions result in undefined system behaviour.
*
+ * The function shall be called while the MPU is disabled.
+ *
* @param memory_attributes_0 are the memory attributes for MAIR0.
*
* @param memory_attributes_1 are the memory attributes for MAIR1.
@@ -301,6 +330,31 @@ void _AArch32_PMSA_Initialize(
);
/**
+ * @brief Maps the section definitions to region definitions.
+ *
+ * The section definitions are used to define the regions of the MPU. Sections
+ * are merged if possible to reduce the count of used regions. If too many
+ * regions are used, then zero is returned. Overlapping section definitions
+ * result in undefined system behaviour.
+ *
+ * @param sections is the array with section definitions to map to regions.
+ *
+ * @param section_count is the count of section definitions.
+ *
+ * @param regions is the array with usable region definitions.
+ *
+ * @param region_max is the count of usable region definitions.
+ *
+ * @return Returns the count of actually used regions.
+ */
+size_t _AArch32_PMSA_Map_sections_to_regions(
+ const AArch32_PMSA_Section *sections,
+ size_t section_count,
+ AArch32_PMSA_Region *regions,
+ size_t region_max
+);
+
+/**
* @brief This array provides section definitions to initialize the memory
* protection unit (MPU).
*
diff --git a/cpukit/score/cpu/arm/include/rtems/score/aarch32-system-registers.h b/cpukit/score/cpu/arm/include/rtems/score/aarch32-system-registers.h
index 2c532ca669..5af0921547 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/aarch32-system-registers.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/aarch32-system-registers.h
@@ -10,7 +10,7 @@
*/
/*
- * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ * Copyright (C) 2020 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
diff --git a/cpukit/score/cpu/arm/include/rtems/score/arm.h b/cpukit/score/cpu/arm/include/rtems/score/arm.h
index 7eaa69d889..650c48d55f 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/arm.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/arm.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
* @file
*
@@ -13,9 +15,26 @@
* Copyright (c) 2002 Advent Networks, Inc.
* Jay Monkman <jmonkman@adventnetworks.com>
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*
*/
@@ -53,7 +72,8 @@ extern "C" {
#ifndef ARM_DISABLE_THREAD_ID_REGISTER_USE
#if defined(__ARM_ARCH_7A__) \
|| defined(__ARM_ARCH_7R__) \
- || __ARM_ARCH >= 8
+ || __ARM_ARCH >= 8 \
+ || __ARM_ARCH == 6
#define ARM_MULTILIB_HAS_THREAD_ID_REGISTER
#endif
#endif
diff --git a/cpukit/score/cpu/arm/include/rtems/score/armv4.h b/cpukit/score/cpu/arm/include/rtems/score/armv4.h
index caeaa3e553..1d3a6de5ff 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/armv4.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/armv4.h
@@ -1,15 +1,37 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreCPUARM
+ *
+ * @brief This header file provides interfaces of the ARMv4 architecture
+ * support.
+ */
+
/*
- * Copyright (c) 2013 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2013 embedded brains GmbH & Co. KG
*
- * embedded brains GmbH
- * Dornierstr. 4
- * 82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef RTEMS_SCORE_ARMV4_H
@@ -21,6 +43,12 @@
extern "C" {
#endif /* __cplusplus */
+/**
+ * @addtogroup RTEMSScoreCPUARM
+ *
+ * @{
+ */
+
#ifdef ARM_MULTILIB_ARCH_V4
void bsp_interrupt_dispatch( void );
@@ -91,6 +119,8 @@ static inline void _ARMV4_Status_restore( uint32_t psr )
#endif /* ARM_MULTILIB_ARCH_V4 */
+/** @} */
+
#ifdef __cplusplus
}
#endif /* __cplusplus */
diff --git a/cpukit/score/cpu/arm/include/rtems/score/armv7m.h b/cpukit/score/cpu/arm/include/rtems/score/armv7m.h
index 1803c8d8ca..7fa48b3aa5 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/armv7m.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/armv7m.h
@@ -1,21 +1,37 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
* @file
*
- * @brief ARMV7M Architecture Support
+ * @ingroup RTEMSScoreCPUARM
+ *
+ * @brief This header file provides interfaces of the ARMv7-M architecture
+ * support.
*/
/*
* Copyright (c) 2011-2014 Sebastian Huber. All rights reserved.
*
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * 82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef RTEMS_SCORE_ARMV7M_H
@@ -143,8 +159,19 @@ typedef struct {
#define ARMV7M_SCB_SHCSR_MEMFAULTENA (1U << 16)
uint32_t shcsr;
+#define ARMV7M_SCB_CFSR_MMFSR_MASK 0xff
+#define ARMV7M_SCB_CFSR_MMFSR_GET(n) (n & ARMV7M_SCB_CFSR_MMFSR_MASK)
+#define ARMV7M_SCB_CFSR_BFSR_MASK 0xff00
+#define ARMV7M_SCB_CFSR_BFSR_GET(n) (n & ARMV7M_SCB_CFSR_BFSR_MASK)
+#define ARMV7M_SCB_CFSR_UFSR_MASK 0xffff0000
+#define ARMV7M_SCB_CFSR_UFSR_GET(n) (n & ARMV7M_SCB_CFSR_UFSR_MASK)
uint32_t cfsr;
+
+#define ARMV7M_SCB_HFSR_VECTTBL_MASK 0x2
+#define ARMV7M_SCB_HFSR_FORCED_MASK (1U << 30)
+#define ARMV7M_SCB_HFSR_DEBUGEVT_MASK (1U << 31)
uint32_t hfsr;
+
uint32_t dfsr;
uint32_t mmfar;
uint32_t bfar;
@@ -678,6 +705,7 @@ static inline void _ARMV7M_MPU_Disable_region(
}
static inline void _ARMV7M_MPU_Setup(
+ uint32_t ctrl,
const ARMV7M_MPU_Region_config *cfg,
size_t cfg_count
)
@@ -713,7 +741,7 @@ static inline void _ARMV7M_MPU_Setup(
_ARMV7M_MPU_Disable_region(mpu, region);
}
- mpu->ctrl = ARMV7M_MPU_CTRL_ENABLE | ARMV7M_MPU_CTRL_PRIVDEFENA;
+ mpu->ctrl = ctrl;
scb->shcsr |= ARMV7M_SCB_SHCSR_MEMFAULTENA;
_ARM_Data_synchronization_barrier();
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpu.h b/cpukit/score/cpu/arm/include/rtems/score/cpu.h
index c8d4442417..a462b48cf1 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/cpu.h
@@ -1,14 +1,19 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
* @file
*
- * @brief ARM Architecture Support API
+ * @ingroup RTEMSScoreCPUARM
+ *
+ * @brief This header file defines implementation interfaces pertaining to the
+ * port of the executive to the ARM architecture.
*/
/*
* This include file contains information pertaining to the ARM
* processor.
*
- * Copyright (c) 2009, 2017 embedded brains GmbH
+ * Copyright (C) 2009, 2017 embedded brains GmbH & Co. KG
*
* Copyright (c) 2007 Ray Xu <Rayx.cn@gmail.com>
*
@@ -20,9 +25,26 @@
* COPYRIGHT (c) 2000 Canon Research Centre France SA.
* Emmanuel Raguet, mailto:raguet@crf.canon.fr
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*
*/
@@ -157,9 +179,7 @@
#define CPU_MAXIMUM_PROCESSORS 32
-#ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER
- #define ARM_CONTEXT_CONTROL_THREAD_ID_OFFSET 44
-#endif
+#define ARM_CONTEXT_CONTROL_THREAD_ID_OFFSET 44
#ifdef ARM_MULTILIB_VFP
#define ARM_CONTEXT_CONTROL_D8_OFFSET 48
@@ -172,10 +192,8 @@
#ifdef RTEMS_SMP
#if defined(ARM_MULTILIB_VFP)
#define ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 112
- #elif defined(ARM_MULTILIB_HAS_THREAD_ID_REGISTER)
- #define ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 48
#else
- #define ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 44
+ #define ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 48
#endif
#endif
@@ -221,9 +239,7 @@ typedef struct {
#else
void *register_sp;
#endif
-#ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER
uint32_t thread_id;
-#endif
#ifdef ARM_MULTILIB_VFP
uint64_t register_d8;
uint64_t register_d9;
@@ -383,7 +399,7 @@ static inline void arm_interrupt_flash( uint32_t level )
#define _CPU_ISR_Flash( _isr_cookie ) \
arm_interrupt_flash( _isr_cookie )
-RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( uint32_t level )
+static inline bool _CPU_ISR_Is_enabled( uint32_t level )
{
#if defined(ARM_MULTILIB_ARCH_V4)
return ( level & 0x80 ) == 0;
@@ -424,6 +440,10 @@ void _CPU_Context_Initialize(
{
context->is_executing = is_executing;
}
+
+ RTEMS_NO_RETURN void _ARM_Start_multitasking( Context_Control *heir );
+
+ #define _CPU_Start_multitasking( _heir ) _ARM_Start_multitasking( _heir )
#endif
#define _CPU_Context_Restart_self( _the_context ) \
@@ -551,14 +571,6 @@ uint32_t _CPU_Counter_frequency( void );
CPU_Counter_ticks _CPU_Counter_read( void );
-static inline CPU_Counter_ticks _CPU_Counter_difference(
- CPU_Counter_ticks second,
- CPU_Counter_ticks first
-)
-{
- return second - first;
-}
-
void *_CPU_Thread_Idle_body( uintptr_t ignored );
#if defined(ARM_MULTILIB_ARCH_V4)
@@ -573,7 +585,7 @@ typedef enum {
ARM_EXCEPTION_IRQ = 6,
ARM_EXCEPTION_FIQ = 7,
MAX_EXCEPTIONS = 8,
- ARM_EXCEPTION_MAKE_ENUM_32_BIT = 0xffffffff
+ ARM_EXCEPTION_MAKE_ENUM_32_BIT = 0x7fffffff
} Arm_symbolic_exception_name;
#endif /* defined(ARM_MULTILIB_ARCH_V4) */
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h b/cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h
index e25dd25f99..30ef04f6a4 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
* @file
*
@@ -10,9 +12,26 @@
* COPYRIGHT (c) 2002 by Advent Networks, Inc.
* Jay Monkman <jmonkman@adventnetworks.com>
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*
* This file is the include file for cpu_asm.S
*/
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/arm/include/rtems/score/cpuatomic.h
deleted file mode 100644
index 598ee76b20..0000000000
--- a/cpukit/score/cpu/arm/include/rtems/score/cpuatomic.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * COPYRIGHT (c) 2012-2013 Deng Hengyi.
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef _RTEMS_SCORE_ATOMIC_CPU_H
-#define _RTEMS_SCORE_ATOMIC_CPU_H
-
-#include <rtems/score/cpustdatomic.h>
-
-#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h
index a6fe74e9ad..04d23f0ea7 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h
@@ -1,15 +1,37 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
* @file
*
- * @brief CPU Port Implementation API
+ * @ingroup RTEMSScoreCPUARM
+ *
+ * @brief This header file defines implementation interfaces pertaining to the
+ * port of the executive to the ARM architecture.
*/
/*
- * Copyright (c) 2013, 2016 embedded brains GmbH
+ * Copyright (C) 2013, 2016 embedded brains GmbH & Co. KG
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTEMS_SCORE_CPUIMPL_H
@@ -41,6 +63,8 @@
#endif /* ARM_MULTILIB_ARCH_V4 */
+#define CPU_THREAD_LOCAL_STORAGE_VARIANT 11
+
#ifndef ASM
#ifdef __cplusplus
@@ -131,16 +155,36 @@ void _CPU_Context_volatile_clobber( uintptr_t pattern );
void _CPU_Context_validate( uintptr_t pattern );
-RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal( void )
+static inline void _CPU_Instruction_illegal( void )
{
__asm__ volatile ( "udf" );
}
-RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void )
+static inline void _CPU_Instruction_no_operation( void )
{
__asm__ volatile ( "nop" );
}
+static inline void _CPU_Use_thread_local_storage(
+ const Context_Control *context
+)
+{
+#ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER
+ __asm__ volatile (
+ "mcr p15, 0, %0, c13, c0, 3" : : "r" ( context->thread_id ) : "memory"
+ );
+#else
+ (void) context;
+#endif
+}
+
+static inline void *_CPU_Get_TLS_thread_pointer(
+ const Context_Control *context
+)
+{
+ return (void *) context->thread_id;
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/cpukit/score/cpu/arm/include/rtems/score/paravirt.h b/cpukit/score/cpu/arm/include/rtems/score/paravirt.h
index d0dc4024e2..4aa98499ad 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/paravirt.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/paravirt.h
@@ -1,22 +1,40 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
* @file
*
- * @brief ARM Paravirtualization Definitions
+ * @ingroup RTEMSScoreCPUARMParavirt
*
- * This include file contains definitions pertaining to paravirtualization
- * of the ARM port.
+ * @brief This header file provides definitions pertaining to
+ * paravirtualization of the ARM port.
*/
/*
* COPYRIGHT (c) 2018.
* On-Line Applications Research Corporation (OAR).
*
- * The license and distribution terms for this file may in
- * the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
-
#ifndef RTEMS_PARAVIRT
#error "This file should only be included with paravirtualization is enabled."
#endif