diff options
Diffstat (limited to 'cpukit/score/cpu/arm/armv7m-isr-enter-leave.c')
| -rw-r--r-- | cpukit/score/cpu/arm/armv7m-isr-enter-leave.c | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/cpukit/score/cpu/arm/armv7m-isr-enter-leave.c b/cpukit/score/cpu/arm/armv7m-isr-enter-leave.c new file mode 100644 index 0000000000..cd5844b255 --- /dev/null +++ b/cpukit/score/cpu/arm/armv7m-isr-enter-leave.c @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2011 Sebastian Huber. All rights reserved. + * + * embedded brains GmbH + * Obere Lagerstr. 30 + * 82178 Puchheim + * Germany + * <rtems@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#ifdef HAVE_CONFIG_H + #include "config.h" +#endif + +#include <rtems/score/thread.h> + +#ifdef ARM_MULTILIB_ARCH_V7M + +#include <rtems/score/armv7m.h> + +void _ARMV7M_Interrupt_service_enter( void ) +{ + ++_Thread_Dispatch_disable_level; + ++_ISR_Nest_level; +} + +void _ARMV7M_Interrupt_service_leave( void ) +{ + --_ISR_Nest_level; + --_Thread_Dispatch_disable_level; + if ( + _ISR_Nest_level == 0 + && _Thread_Dispatch_disable_level == 0 + && _Thread_Dispatch_necessary + ) { + _ARMV7M_SCB->icsr = ARMV7M_SCB_ICSR_PENDSVSET; + } +} + +#endif /* ARM_MULTILIB_ARCH_V7M */ |