diff options
Diffstat (limited to 'cpukit/score/cpu/aarch64/include/rtems')
-rw-r--r-- | cpukit/score/cpu/aarch64/include/rtems/asm.h | 5 | ||||
-rw-r--r-- | cpukit/score/cpu/aarch64/include/rtems/score/cpu.h | 13 | ||||
-rw-r--r-- | cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h | 67 |
3 files changed, 80 insertions, 5 deletions
diff --git a/cpukit/score/cpu/aarch64/include/rtems/asm.h b/cpukit/score/cpu/aarch64/include/rtems/asm.h index 35bf533c8a..fa53e08291 100644 --- a/cpukit/score/cpu/aarch64/include/rtems/asm.h +++ b/cpukit/score/cpu/aarch64/include/rtems/asm.h @@ -81,7 +81,12 @@ .align 8 ; .globl name ; name: ; .globl name ## _aarch64 ; name ## _aarch64: .macro GET_SELF_CPU_CONTROL REG +#ifdef RTEMS_SMP + /* Use Thread ID Register (TPIDR_EL1) */ + mrs \REG, TPIDR_EL1 +#else ldr \REG, =_Per_CPU_Information +#endif .endm /** @} */ diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h b/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h index dacc18638e..82f74193a2 100644 --- a/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h @@ -134,9 +134,9 @@ #ifdef RTEMS_SMP #if defined(AARCH64_MULTILIB_VFP) - #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0x70 + #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0xb8 #else - #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0x30 + #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0x78 #endif #endif @@ -191,12 +191,12 @@ typedef struct { static inline void _AARCH64_Data_memory_barrier( void ) { - __asm__ volatile ( "dmb LD" : : : "memory" ); + __asm__ volatile ( "dmb SY" : : : "memory" ); } static inline void _AARCH64_Data_synchronization_barrier( void ) { - __asm__ volatile ( "dsb LD" : : : "memory" ); + __asm__ volatile ( "dsb SY" : : : "memory" ); } static inline void _AARCH64_Instruction_synchronization_barrier( void ) @@ -313,6 +313,11 @@ void _CPU_ISR_install_vector( */ void _CPU_Context_switch( Context_Control *run, Context_Control *heir ); +RTEMS_NO_RETURN void _CPU_Context_switch_no_return( + Context_Control *executing, + Context_Control *heir +); + RTEMS_NO_RETURN void _CPU_Context_restore( Context_Control *new_context ); #ifdef RTEMS_SMP diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h index 0536ecd860..90fd48ad4e 100644 --- a/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h @@ -50,7 +50,7 @@ */ #define CPU_PER_CPU_CONTROL_SIZE 0 -#define CPU_INTERRUPT_FRAME_SIZE 240 +#define CPU_INTERRUPT_FRAME_SIZE 0x2E0 #ifndef ASM @@ -60,6 +60,71 @@ extern "C" { RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); +typedef struct { + uint64_t x0; + uint64_t register_lr_original; + uint64_t register_lr; + uint64_t x1; + uint64_t x2; + uint64_t x3; + uint64_t x4; + uint64_t x5; + uint64_t x6; + uint64_t x7; + uint64_t x8; + uint64_t x9; + uint64_t x10; + uint64_t x11; + uint64_t x12; + uint64_t x13; + uint64_t x14; + uint64_t x15; + uint64_t x16; + uint64_t x17; + uint64_t x18; + uint64_t x19; + uint64_t x20; + uint64_t x21; +#ifdef AARCH64_MULTILIB_VFP + uint128_t q0; + uint128_t q1; + uint128_t q2; + uint128_t q3; + uint128_t q4; + uint128_t q5; + uint128_t q6; + uint128_t q7; + uint128_t q8; + uint128_t q9; + uint128_t q10; + uint128_t q11; + uint128_t q12; + uint128_t q13; + uint128_t q14; + uint128_t q15; + uint128_t q16; + uint128_t q17; + uint128_t q18; + uint128_t q19; + uint128_t q20; + uint128_t q21; + uint128_t q22; + uint128_t q23; + uint128_t q24; + uint128_t q25; + uint128_t q26; + uint128_t q27; + uint128_t q28; + uint128_t q29; + uint128_t q30; + uint128_t q31; +#endif /* AARCH64_MULTILIB_VFP */ + uint64_t register_elr; + uint64_t register_spsr; + uint64_t register_fpsr; + uint64_t register_fpcr; +} CPU_Interrupt_frame; + void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); |