diff options
Diffstat (limited to 'c/src/lib/libcpu')
6 files changed, 32 insertions, 57 deletions
diff --git a/c/src/lib/libcpu/powerpc/ChangeLog b/c/src/lib/libcpu/powerpc/ChangeLog index 73897e01bd..449c0291a6 100644 --- a/c/src/lib/libcpu/powerpc/ChangeLog +++ b/c/src/lib/libcpu/powerpc/ChangeLog @@ -1,3 +1,14 @@ +2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com> + + PR 1573/cpukit + * mpc5xx/irq/irq.c, mpc5xx/irq/irq_asm.S, + new-exceptions/bspsupport/ppc_exc.S, + new-exceptions/bspsupport/ppc_exc_asm_macros.h, + new-exceptions/bspsupport/ppc_exc_hdl.c: Add a per cpu data structure + which contains the information required by RTEMS for each CPU core. + This encapsulates information such as thread executing, heir, idle + and dispatch needed. + 2010-06-14 Joel Sherrill <joel.sherrilL@OARcorp.com> * Makefile.am: Formatting. diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c b/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c index 8ae7079489..e8e69328a7 100644 --- a/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c +++ b/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c @@ -482,22 +482,3 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) usiu.simask = ppc_cached_irq_mask; } } - -void _ThreadProcessSignalsFromIrq (CPU_Exception_frame* ctx) -{ - /* - * Process pending signals that have not already been - * processed by _Thread_Displatch. This happens quite - * unfrequently : the ISR must have posted an action - * to the current running thread. - */ - if ( _Thread_Do_post_task_switch_extension || - _Thread_Executing->do_post_task_switch_extension ) { - _Thread_Executing->do_post_task_switch_extension = false; - _API_extensions_Run_postswitch(); - } - /* - * I plan to process other thread related events here. - * This will include DEBUG session requested from keyboard... - */ -} diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_asm.S b/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_asm.S index cf79c13ed9..9fa7a9e5db 100644 --- a/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_asm.S +++ b/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_asm.S @@ -26,6 +26,7 @@ #include <rtems/asm.h> #include <rtems/score/cpu.h> +#include <rtems/score/percpu.h> #include <libcpu/vectors.h> #include <libcpu/raw_exception.h> @@ -118,8 +119,8 @@ SYM (dispatch_irq_handler): /* * Retrieve current nesting level from _ISR_Nest_level */ - lis r7, _ISR_Nest_level@ha - lwz r3, _ISR_Nest_level@l(r7) + lis r7, ISR_NEST_LEVEL@ha + lwz r3, ISR_NEST_LEVEL@l(r7) /* * Check if stack switch is necessary @@ -141,7 +142,7 @@ nested: lwz r6, _Thread_Dispatch_disable_level@l(r15) /* store new nesting level in _ISR_Nest_level */ - stw r3, _ISR_Nest_level@l(r7) + stw r3, ISR_NEST_LEVEL@l(r7) addi r6, r6, 1 @@ -170,8 +171,8 @@ nested: * value as an easy exit condition because if interrupt nesting level > 1 * then _Thread_Dispatch_disable_level > 1 */ - lis r7, _ISR_Nest_level@ha - lwz r4, _ISR_Nest_level@l(r7) + lis r7, ISR_NEST_LEVEL@ha + lwz r4, ISR_NEST_LEVEL@l(r7) /* * start decrementing _Thread_Dispatch_disable_level @@ -181,7 +182,7 @@ nested: addi r4, r4, -1 /* Continue decrementing nesting level */ addi r3, r3, -1 /* Continue decrementing _Thread_Dispatch_disable_level */ - stw r4, _ISR_Nest_level@l(r7) /* End decrementing nesting level */ + stw r4, ISR_NEST_LEVEL@l(r7) /* End decrementing nesting level */ stw r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */ cmpwi r3, 0 @@ -199,21 +200,13 @@ nested: * Interrupt are still disabled. Time to check if scheduler request to * do something with the current thread... */ - addis r4, 0, _Context_Switch_necessary@ha - lbz r5, _Context_Switch_necessary@l(r4) + addis r4, 0, DISPATCH_NEEDED@ha + lbz r5, DISPATCH_NEEDED@l(r4) cmpwi r5, 0 - bne switch - - addis r6, 0, _ISR_Signals_to_thread_executing@ha - lbz r7, _ISR_Signals_to_thread_executing@l(r6) - cmpwi r7, 0 - li r8, 0 beq easy_exit - stb r8, _ISR_Signals_to_thread_executing@l(r6) - /* - * going to call _ThreadProcessSignalsFromIrq + * going to call _Thread_Dispatch * Push a complete exception like frame... */ stmw r16, GPR16_OFFSET(r1) @@ -232,7 +225,7 @@ nested: /* * Call High Level signal handling code */ - bl _ThreadProcessSignalsFromIrq + bl _Thread_Dispatch /* * start restoring exception like frame @@ -272,9 +265,6 @@ nested: rfi -switch: - bl SYM (_Thread_Dispatch) - easy_exit: /* * start restoring interrupt frame diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S index b4d62a3491..d265c48723 100644 --- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S +++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S @@ -13,6 +13,10 @@ */ /* Load macro definitions */ +#include <rtems/asm.h> +#include <rtems/system.h> +#include <rtems/score/percpu.h> + #include "ppc_exc_asm_macros.h" /******************************************************/ diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h index 28dd4aad64..c823f51f21 100644 --- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h +++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h @@ -422,11 +422,12 @@ wrap_no_save_frame_register_\_FLVR: */ /* Increment ISR nest level and thread dispatch disable level */ - lwz SCRATCH_REGISTER_0, _ISR_Nest_level@sdarel(r13) + lis SCRATCH_REGISTER_2, ISR_NEST_LEVEL@ha + lwz SCRATCH_REGISTER_0, ISR_NEST_LEVEL@l(SCRATCH_REGISTER_2) lwz SCRATCH_REGISTER_1, _Thread_Dispatch_disable_level@sdarel(r13) addi SCRATCH_REGISTER_0, SCRATCH_REGISTER_0, 1 addi SCRATCH_REGISTER_1, SCRATCH_REGISTER_1, 1 - stw SCRATCH_REGISTER_0, _ISR_Nest_level@sdarel(r13) + stw SCRATCH_REGISTER_0, ISR_NEST_LEVEL@l(SCRATCH_REGISTER_2) stw SCRATCH_REGISTER_1, _Thread_Dispatch_disable_level@sdarel(r13) /* @@ -612,11 +613,12 @@ wrap_handler_done_\_FLVR: */ /* Decrement ISR nest level and thread dispatch disable level */ - lwz SCRATCH_REGISTER_0, _ISR_Nest_level@sdarel(r13) + lis SCRATCH_REGISTER_2, ISR_NEST_LEVEL@ha + lwz SCRATCH_REGISTER_0, ISR_NEST_LEVEL@l(SCRATCH_REGISTER_2) lwz SCRATCH_REGISTER_1, _Thread_Dispatch_disable_level@sdarel(r13) subi SCRATCH_REGISTER_0, SCRATCH_REGISTER_0, 1 subic. SCRATCH_REGISTER_1, SCRATCH_REGISTER_1, 1 - stw SCRATCH_REGISTER_0, _ISR_Nest_level@sdarel(r13) + stw SCRATCH_REGISTER_0, ISR_NEST_LEVEL@l(SCRATCH_REGISTER_2) stw SCRATCH_REGISTER_1, _Thread_Dispatch_disable_level@sdarel(r13) /* Branch to skip thread dispatching */ diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c index 05bd58d1c2..4ff43cd675 100644 --- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c +++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c @@ -86,18 +86,5 @@ void ppc_exc_wrapup(BSP_Exception_frame *frame) * interrupts around the execution of _Thread_Dispatch(); */ _Thread_Dispatch(); - } else if ( _ISR_Signals_to_thread_executing ) { - _ISR_Signals_to_thread_executing = 0; - /* - * Process pending signals that have not already been - * processed by _Thread_Dispatch. This happens quite - * unfrequently : the ISR must have posted an action - * to the current running thread. - */ - if ( _Thread_Do_post_task_switch_extension || - _Thread_Executing->do_post_task_switch_extension ) { - _Thread_Executing->do_post_task_switch_extension = false; - _API_extensions_Run_postswitch(); - } } } |