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-rw-r--r--c/src/lib/libcpu/powerpc/mpc5xx/exceptions/asm_utils.S64
-rw-r--r--c/src/lib/libcpu/powerpc/mpc5xx/exceptions/raw_exception.c226
-rw-r--r--c/src/lib/libcpu/powerpc/mpc5xx/exceptions/raw_exception.h102
3 files changed, 143 insertions, 249 deletions
diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/exceptions/asm_utils.S b/c/src/lib/libcpu/powerpc/mpc5xx/exceptions/asm_utils.S
deleted file mode 100644
index 36d9748c6b..0000000000
--- a/c/src/lib/libcpu/powerpc/mpc5xx/exceptions/asm_utils.S
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * asm_utils.s
- *
- * asm_utils.S,v 1.2 2002/04/18 20:55:37 joel Exp
- *
- * Copyright (C) 1999 Eric Valette (valette@crf.canon.fr)
- *
- * This file contains the low-level support for moving exception
- * exception code to appropriate location.
- *
- * Adapted for MPC5XX Wilfried Busalski (w.busalski@lancier-monitoring.de)
- * (C) Lancier Monitoring GmbH
- */
-
-#include <rtems/asm.h>
-#include <rtems/score/cpu.h>
-#include <libcpu/io.h>
-
-//SPR defines
-#define SPR_ICCST 560
-
-
- .globl codemove
-codemove:
- .type codemove,@function
-/* r3 dest, r4 src, r5 length in bytes, r6 cachelinesize */
- cmplw cr1,r3,r4
- addi r0,r5,3
- srwi. r0,r0,2
- beq cr1,4f /* In place copy is not necessary */
- beq 7f /* Protect against 0 count */
- mtctr r0
- bge cr1,2f
-
- la r8,-4(r4)
- la r7,-4(r3)
-1: lwzu r0,4(r8)
- stwu r0,4(r7)
- bdnz 1b
- b 4f
-
-2: slwi r0,r0,2
- add r8,r4,r0
- add r7,r3,r0
-3: lwzu r0,-4(r8)
- stwu r0,-4(r7)
- bdnz 3b
-
-/* Now flush the cache: note that we must start from a cache aligned
- * address. Otherwise we might miss one cache line.
- */
-
-4: lis r0, 0x0A00 // Command Unlock All
- mtspr SPR_ICCST, r0 // Cache Unlock ALL
-
- lis r0, 0x0C00 // Command Invalidate All
- mtspr SPR_ICCST, r0 // Cache Invalidate ALL
-
- lis r0, 0x0200 // Command Enable All
- mtspr SPR_ICCST, r0 // Cache Enable ALL
-
-7: sync /* Wait for all icbi to complete on bus */
- isync
- blr
diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/exceptions/raw_exception.c b/c/src/lib/libcpu/powerpc/mpc5xx/exceptions/raw_exception.c
index 649ec0b956..12fff2394e 100644
--- a/c/src/lib/libcpu/powerpc/mpc5xx/exceptions/raw_exception.c
+++ b/c/src/lib/libcpu/powerpc/mpc5xx/exceptions/raw_exception.c
@@ -1,24 +1,26 @@
/*
- * raw_exception.c - This file contains implementation of C function to
- * Instanciate 8xx ppc primary exception entries.
- * More detailled information can be found on motorola
- * site and more precisely in the following book :
+ * raw_exception.c - This file contains implementation of C functions to
+ * Instantiate mpc5xx primary exception entries.
+ * More detailled information can be found on the Motorola
+ * site and more precisely in the following book:
*
- * MPC860
- * Risc Microporcessor User's Manual
- * Motorola REF : MPC860UM/AD
+ * MPC555/MPC556 User's Manual
+ * Motorola REF : MPC555UM/D Rev. 3, 2000 October 15
+ *
+ *
+ * MPC5xx port sponsored by Defence Research and Development Canada - Suffield
+ * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
+ *
+ * Derived from libcpu/powerpc/mpc8xx/exceptions/raw_exception.c:
*
* Copyright (C) 1999 Eric Valette (valette@crf.canon.fr)
* Canon Centre Recherche France.
*
- * Changes for MPC5XX Wilfried Busalski (w.busalski@lancier-monitoring.de)
- * Copyright (C) 2003 Lancier Monitoring GmbH
- *
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
- * http://www.OARcorp.com/rtems/license.html.
+ * http://www.rtems.com/license/LICENSE.
*
- * raw_exception.c,v 1.5 2002/11/04 14:29:02 joel Exp
+ * $Id$
*/
#include <rtems/system.h>
@@ -29,88 +31,76 @@
#include <rtems/bspIo.h> /* for printk */
#include <string.h>
-void * codemove(void *, const void *, unsigned int, unsigned long);
-
static rtems_raw_except_connect_data* raw_except_table;
static rtems_raw_except_connect_data default_raw_except_entry;
static rtems_raw_except_global_settings* local_settings;
-int mpc565_vector_is_valid(rtems_vector vector)
-{
- switch(vector) {
- case ASM_RESET_VECTOR: /* fall through */
- case ASM_MACH_VECTOR:
- case ASM_PROT_VECTOR:
- case ASM_ISI_VECTOR:
- case ASM_EXT_VECTOR:
- case ASM_ALIGN_VECTOR:
- case ASM_PROG_VECTOR:
- case ASM_FLOAT_VECTOR:
- case ASM_DEC_VECTOR:
-
- case ASM_SYS_VECTOR:
- case ASM_TRACE_VECTOR:
- case ASM_FLOATASSIST_VECTOR:
-
- case ASM_SOFTEMUL_VECTOR:
-
- case ASM_ITLBERROR_VECTOR:
- case ASM_DTLBERROR_VECTOR:
-
- case ASM_DBREAK_VECTOR:
- case ASM_IBREAK_VECTOR:
- case ASM_PERIFBREAK_VECTOR:
- case ASM_DEVPORT_VECTOR:
- return 1;
- default: return 0;
- }
-}
-
int mpc5xx_vector_is_valid(rtems_vector vector)
{
- switch (current_ppc_cpu) {
- case MPC_5XX:
- if (!mpc565_vector_is_valid(vector)) {
- return 0;
- }
- break;
- default:
- printk("Please complete libcpu/powerpc/mpc5xx/exceptions/raw_exception.c\n");
- printk("current_ppc_cpu = %x\n", current_ppc_cpu);
- return 0;
- }
- return 1;
+ switch (current_ppc_cpu) {
+ case PPC_5XX:
+ switch(vector) {
+ case ASM_RESET_VECTOR:
+ case ASM_MACH_VECTOR:
+
+ case ASM_EXT_VECTOR:
+ case ASM_ALIGN_VECTOR:
+ case ASM_PROG_VECTOR:
+ case ASM_FLOAT_VECTOR:
+ case ASM_DEC_VECTOR:
+
+ case ASM_SYS_VECTOR:
+ case ASM_TRACE_VECTOR:
+ case ASM_FLOATASSIST_VECTOR:
+
+ case ASM_SOFTEMUL_VECTOR:
+
+ case ASM_IPROT_VECTOR:
+ case ASM_DPROT_VECTOR:
+
+ case ASM_DBREAK_VECTOR:
+ case ASM_IBREAK_VECTOR:
+ case ASM_MEBREAK_VECTOR:
+ case ASM_NMEBREAK_VECTOR:
+ return 1;
+ default:
+ return 0;
+ }
+ default:
+ printk("Please complete libcpu/powerpc/mpc5xx/exceptions/raw_exception.c\n");
+ printk("current_ppc_cpu = %x\n", current_ppc_cpu);
+ return 0;
+ }
}
int mpc5xx_set_exception (const rtems_raw_except_connect_data* except)
{
- unsigned int level;
+ unsigned int level;
- if (!mpc5xx_vector_is_valid(except->exceptIndex)) {
- return 0;
- }
- /*
- * Check if default handler is actually connected. If not issue an error.
- * You must first get the current handler via mpc5xx_get_current_exception
- * and then disconnect it using mpc5xx_delete_exception.
- * RATIONALE : to always have the same transition by forcing the user
- * to get the previous handler before accepting to disconnect.
- */
- if (memcmp(mpc5xx_get_vector_addr(except->exceptIndex), (void*)default_raw_except_entry.hdl.raw_hdl,default_raw_except_entry.hdl.raw_hdl_size)) {
- return 0;
- }
+ if (!mpc5xx_vector_is_valid(except->exceptIndex)) {
+ return 0;
+ }
+ /*
+ * Check if default handler is actually connected. If not issue an error.
+ * You must first get the current handler via mpc5xx_get_current_exception
+ * and then disconnect it using mpc5xx_delete_exception.
+ * RATIONALE : to always have the same transition by forcing the user
+ * to get the previous handler before accepting to disconnect.
+ */
+ if (exception_handler_table[except->exceptIndex] !=
+ default_raw_except_entry.hdl.raw_hdl) {
+ return 0;
+ }
- _CPU_ISR_Disable(level);
-
- raw_except_table [except->exceptIndex] = *except;
- codemove((void*)mpc5xx_get_vector_addr(except->exceptIndex),
- except->hdl.raw_hdl,
- except->hdl.raw_hdl_size,
- PPC_CACHE_ALIGNMENT);
- except->on(except);
-
- _CPU_ISR_Enable(level);
- return 1;
+ _CPU_ISR_Disable(level);
+
+ raw_except_table[except->exceptIndex] = *except;
+
+ exception_handler_table[except->exceptIndex] = except->hdl.raw_hdl;
+ except->on(except);
+
+ _CPU_ISR_Enable(level);
+ return 1;
}
int mpc5xx_get_current_exception (rtems_raw_except_connect_data* except)
@@ -119,7 +109,7 @@ int mpc5xx_get_current_exception (rtems_raw_except_connect_data* except)
return 0;
}
- *except = raw_except_table [except->exceptIndex];
+ *except = raw_except_table[except->exceptIndex];
return 1;
}
@@ -138,20 +128,16 @@ int mpc5xx_delete_exception (const rtems_raw_except_connect_data* except)
* RATIONALE : to always have the same transition by forcing the user
* to get the previous handler before accepting to disconnect.
*/
- if (memcmp(mpc5xx_get_vector_addr(except->exceptIndex),
- (void*)except->hdl.raw_hdl,
- except->hdl.raw_hdl_size)) {
- return 0;
+ if (exception_handler_table[except->exceptIndex] != except->hdl.raw_hdl) {
+ return 0;
}
+
_CPU_ISR_Disable(level);
except->off(except);
- codemove((void*)mpc5xx_get_vector_addr(except->exceptIndex),
- default_raw_except_entry.hdl.raw_hdl,
- default_raw_except_entry.hdl.raw_hdl_size,
- PPC_CACHE_ALIGNMENT);
-
-
+ exception_handler_table[except->exceptIndex] =
+ default_raw_except_entry.hdl.raw_hdl;
+
raw_except_table[except->exceptIndex] = default_raw_except_entry;
raw_except_table[except->exceptIndex].exceptIndex = except->exceptIndex;
@@ -162,39 +148,37 @@ int mpc5xx_delete_exception (const rtems_raw_except_connect_data* except)
/*
* Exception global init.
+ *
+ * Install exception handler pointers from the raw exception table into the
+ * exception handler table.
*/
int mpc5xx_init_exceptions (rtems_raw_except_global_settings* config)
{
- unsigned i;
- unsigned int level;
-
- /*
- * store various accelerators
- */
- raw_except_table = config->rawExceptHdlTbl;
- local_settings = config;
- default_raw_except_entry = config->defaultRawEntry;
-
- _CPU_ISR_Disable(level);
-
- for (i=0; i <= LAST_VALID_EXC; i++) {
- if (!mpc5xx_vector_is_valid(i)){
- continue;
- }
- codemove((void*)mpc5xx_get_vector_addr(i),
- raw_except_table[i].hdl.raw_hdl,
- raw_except_table[i].hdl.raw_hdl_size,
- PPC_CACHE_ALIGNMENT);
- if (raw_except_table[i].hdl.raw_hdl != default_raw_except_entry.hdl.raw_hdl) {
- raw_except_table[i].on(&raw_except_table[i]);
- }
- else {
- raw_except_table[i].off(&raw_except_table[i]);
- }
+ unsigned i;
+ unsigned int level;
+
+ /*
+ * store various accelerators
+ */
+ raw_except_table = config->rawExceptHdlTbl;
+ local_settings = config;
+ default_raw_except_entry = config->defaultRawEntry;
+
+ _CPU_ISR_Disable(level);
+
+ for (i = 0; i < NUM_EXCEPTIONS; i++) {
+ exception_handler_table[i] = raw_except_table[i].hdl.raw_hdl;
+
+ if (raw_except_table[i].hdl.raw_hdl != default_raw_except_entry.hdl.raw_hdl) {
+ raw_except_table[i].on(&raw_except_table[i]);
+ }
+ else {
+ raw_except_table[i].off(&raw_except_table[i]);
}
- _CPU_ISR_Enable(level);
+ }
+ _CPU_ISR_Enable(level);
- return 1;
+ return 1;
}
int mpc5xx_get_exception_config (rtems_raw_except_global_settings** config)
diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/exceptions/raw_exception.h b/c/src/lib/libcpu/powerpc/mpc5xx/exceptions/raw_exception.h
index 515a84a201..3b7e6783af 100644
--- a/c/src/lib/libcpu/powerpc/mpc5xx/exceptions/raw_exception.h
+++ b/c/src/lib/libcpu/powerpc/mpc5xx/exceptions/raw_exception.h
@@ -2,88 +2,62 @@
* raw_execption.h
*
* This file contains implementation of C function to
- * Instanciate 8xx ppc primary exception entries.
- * More detailled information can be found on motorola
- * site and more precisely in the following book :
+ * Instantiate mpc5xx primary exception entries.
+ * More detailled information can be found on the Motorola
+ * site and more precisely in the following book:
*
- * MPC860
- * Risc Microporcessor User's Manual
- * Motorola REF : MPC860UM/AD 07/98 Rev .1
+ * MPC555/MPC556 User's Manual
+ * Motorola REF : MPC555UM/D Rev. 3, 2000 October 15
*
- * Copyright (C) 1999 Eric Valette (valette@crf.canon.fr)
- * Canon Centre Recherche France.
*
- * Changes for MPC5XX Wilfried Busalski (w.busalski@lancier-monitoring.de)
- * Copyright (C) 2003 Lancier Monitoring GmbH
-
+ * MPC5xx port sponsored by Defence Research and Development Canada - Suffield
+ * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
+ *
+ * Derived from libcpu/powerpc/mpc8xx/exceptions/raw_exception.h:
+ *
+ * Copyright (C) 1999 Eric Valette (valette@crf.canon.fr)
+ * Canon Centre Recherche France.
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
- * http://www.OARcorp.com/rtems/license.html.
+ * http://www.rtems.com/license/LICENSE.
*
- * raw_exception.h,v 1.1 2001/04/06 15:54:18 joel Exp
+ * $Id$
*/
#ifndef _LIBCPU_MPC5XX_EXCEPTION_RAW_EXCEPTION_H
#define _LIBCPU_MPC5XX_EXCEPTION_RAW_EXCEPTION_H
+#include <libcpu/vectors.h>
+
/*
- * Exception Vectors as defined in the MCP750 manual
+ * Exception Vectors as defined in the MPC555 User's Manual
*/
-#define ASM_RESET_VECTOR 0x01
-#define ASM_MACH_VECTOR 0x02
-#define ASM_PROT_VECTOR 0x03
-#define ASM_ISI_VECTOR 0x04
-#define ASM_EXT_VECTOR 0x05
-#define ASM_ALIGN_VECTOR 0x06
-#define ASM_PROG_VECTOR 0x07
-#define ASM_FLOAT_VECTOR 0x08
-#define ASM_DEC_VECTOR 0x09
-
-#define ASM_SYS_VECTOR 0x0C
-#define ASM_TRACE_VECTOR 0x0D
-#define ASM_FLOATASSIST_VECTOR 0x0E
-
-#define ASM_SOFTEMUL_VECTOR 0x10
+#define ASM_RESET_VECTOR 0x01
+#define ASM_MACH_VECTOR 0x02
-#define ASM_ITLBERROR_VECTOR 0x13
-#define ASM_DTLBERROR_VECTOR 0x14
+#define ASM_EXT_VECTOR 0x05
+#define ASM_ALIGN_VECTOR 0x06
+#define ASM_PROG_VECTOR 0x07
+#define ASM_FLOAT_VECTOR 0x08
+#define ASM_DEC_VECTOR 0x09
-#define ASM_DBREAK_VECTOR 0x1C
-#define ASM_IBREAK_VECTOR 0x1D
-#define ASM_PERIFBREAK_VECTOR 0x1E
-#define ASM_DEVPORT_VECTOR 0x1F
-
-#define LAST_VALID_EXC ASM_DEVPORT_VECTOR
-
-/*
- * Vector offsets as defined in the MPC860 manual
- */
-
-#define ASM_RESET_VECTOR_OFFSET (ASM_RESET_VECTOR << 8)
-#define ASM_MACH_VECTOR_OFFSET (ASM_MACH_VECTOR << 8)
-#define ASM_PROT_VECTOR_OFFSET (ASM_PROT_VECTOR << 8)
-#define ASM_ISI_VECTOR_OFFSET (ASM_ISI_VECTOR << 8)
-#define ASM_EXT_VECTOR_OFFSET (ASM_EXT_VECTOR << 8)
-#define ASM_ALIGN_VECTOR_OFFSET (ASM_ALIGN_VECTOR << 8)
-#define ASM_PROG_VECTOR_OFFSET (ASM_PROG_VECTOR << 8)
-#define ASM_FLOAT_VECTOR_OFFSET (ASM_FLOAT_VECTOR << 8)
-#define ASM_DEC_VECTOR_OFFSET (ASM_DEC_VECTOR << 8)
+#define ASM_SYS_VECTOR 0x0C
+#define ASM_TRACE_VECTOR 0x0D
+#define ASM_FLOATASSIST_VECTOR 0x0E
-#define ASM_SYS_VECTOR_OFFSET (ASM_SYS_VECTOR << 8)
-#define ASM_TRACE_VECTOR_OFFSET (ASM_TRACE_VECTOR << 8)
-#define ASM_FLOATASSIST_VECTOR_OFFSET (ASM_FLOATASSIST_VECTOR << 8)
+#define ASM_SOFTEMUL_VECTOR 0x10
-#define ASM_SOFTEMUL_VECTOR_OFFSET (ASM_SOFTEMUL_VECTOR << 8)
+#define ASM_IPROT_VECTOR 0x13
+#define ASM_DPROT_VECTOR 0x14
-#define ASM_ITLBERROR_VECTOR_OFFSET (ASM_ITLBERROR_VECTOR << 8)
-#define ASM_DTLBERROR_VECTOR_OFFSET (ASM_DTLBERROR_VECTOR << 8)
+#define ASM_DBREAK_VECTOR 0x1C
+#define ASM_IBREAK_VECTOR 0x1D
+#define ASM_MEBREAK_VECTOR 0x1E
+#define ASM_NMEBREAK_VECTOR 0x1F
-#define ASM_DBREAK_VECTOR_OFFSET (ASM_DBREAK_VECTOR << 8)
-#define ASM_IBREAK_VECTOR_OFFSET (ASM_IBREAK_VECTOR << 8)
-#define ASM_PERIFBREAK_VECTOR_OFFSET (ASM_PERIFBREAK_VECTOR << 8)
-#define ASM_DEVPORT_VECTOR_OFFSET (ASM_DEVPORT_VECTOR_OFFSET << 8)
+#define LAST_VALID_EXC ASM_NMEBREAK_VECTOR
#ifndef ASM
@@ -93,13 +67,11 @@
typedef unsigned char rtems_vector;
struct __rtems_raw_except_connect_data__;
-typedef void (*rtems_raw_except_func) (void);
typedef unsigned char rtems_raw_except_hdl_size;
typedef struct {
rtems_vector vector;
- rtems_raw_except_func raw_hdl;
- rtems_raw_except_hdl_size raw_hdl_size;
+ rtems_exception_handler_t* raw_hdl;
}rtems_raw_except_hdl;
typedef void (*rtems_raw_except_enable) (const struct __rtems_raw_except_connect_data__*);
@@ -186,5 +158,7 @@ extern int mpc5xx_get_exception_config (rtems_raw_except_global_settings** confi
# endif /* ASM */
+#define SIZEOF_
+
#endif