diff options
Diffstat (limited to 'c/src/lib/libcpu/m68k/shared/cache/cache.c')
-rw-r--r-- | c/src/lib/libcpu/m68k/shared/cache/cache.c | 56 |
1 files changed, 28 insertions, 28 deletions
diff --git a/c/src/lib/libcpu/m68k/shared/cache/cache.c b/c/src/lib/libcpu/m68k/shared/cache/cache.c index ce98f006c6..60f3a63d4c 100644 --- a/c/src/lib/libcpu/m68k/shared/cache/cache.c +++ b/c/src/lib/libcpu/m68k/shared/cache/cache.c @@ -52,10 +52,10 @@ /* Only the mc68030 has a data cache; it is writethrough only. */ -void _CPU_flush_1_data_cache_line ( const void * d_addr ) {} -void _CPU_flush_entire_data_cache ( const void * d_addr ) {} +void _CPU_cache_flush_1_data_line ( const void * d_addr ) {} +void _CPU_cache_flush_entire_data ( const void * d_addr ) {} -void _CPU_invalidate_1_data_cache_line ( +void _CPU_cache_invalidate_1_data_line ( const void * d_addr ) { void * p_address = (void *) _CPU_virtual_to_physical( d_addr ); @@ -63,26 +63,26 @@ void _CPU_invalidate_1_data_cache_line ( _CPU_CACR_OR(0x00000400); } -void _CPU_invalidate_entire_data_cache ( void ) +void _CPU_cache_invalidate_entire_data ( void ) { _CPU_CACR_OR( 0x00000800 ); } -void _CPU_freeze_data_cache ( void ) +void _CPU_cache_freeze_data ( void ) { _CPU_CACR_OR( 0x00000200 ); } -void _CPU_unfreeze_data_cache ( void ) +void _CPU_cache_unfreeze_data ( void ) { _CPU_CACR_AND( 0xFFFFFDFF ); } -void _CPU_enable_data_cache ( void ) +void _CPU_cache_enable_data ( void ) { _CPU_CACR_OR( 0x00000100 ); } -void _CPU_disable_data_cache ( void ) +void _CPU_cache_disable_data ( void ) { _CPU_CACR_AND( 0xFFFFFEFF ); } @@ -91,7 +91,7 @@ void _CPU_disable_data_cache ( void ) /* Both the 68020 and 68030 have instruction caches */ -void _CPU_invalidate_1_inst_cache_line ( +void _CPU_cache_invalidate_1_instruction_line ( const void * d_addr ) { void * p_address = (void *) _CPU_virtual_to_physical( d_addr ); @@ -99,27 +99,27 @@ void _CPU_invalidate_1_inst_cache_line ( _CPU_CACR_OR( 0x00000004 ); } -void _CPU_invalidate_entire_inst_cache ( void ) +void _CPU_cache_invalidate_entire_instruction ( void ) { _CPU_CACR_OR( 0x00000008 ); } -void _CPU_freeze_inst_cache ( void ) +void _CPU_cache_freeze_instruction ( void ) { _CPU_CACR_OR( 0x00000002); } -void _CPU_unfreeze_inst_cache ( void ) +void _CPU_cache_unfreeze_instruction ( void ) { _CPU_CACR_AND( 0xFFFFFFFD ); } -void _CPU_enable_inst_cache ( void ) +void _CPU_cache_enable_instruction ( void ) { _CPU_CACR_OR( 0x00000001 ); } -void _CPU_disable_inst_cache ( void ) +void _CPU_cache_disable_instruction ( void ) { _CPU_CACR_AND( 0xFFFFFFFE ); } @@ -128,63 +128,63 @@ void _CPU_disable_inst_cache ( void ) #elif ( defined(__mc68040__) || defined (__mc68060__) ) /* Cannot be frozen */ -void _CPU_freeze_data_cache ( void ) {} -void _CPU_unfreeze_data_cache ( void ) {} -void _CPU_freeze_inst_cache ( void ) {} -void _CPU_unfreeze_inst_cache ( void ) {} +void _CPU_cache_freeze_data ( void ) {} +void _CPU_cache_unfreeze_data ( void ) {} +void _CPU_cache_freeze_instruction ( void ) {} +void _CPU_cache_unfreeze_instruction ( void ) {} -void _CPU_flush_1_data_cache_line ( +void _CPU_cache_flush_1_data_line ( const void * d_addr ) { void * p_address = (void *) _CPU_virtual_to_physical( d_addr ); asm volatile ( "cpushl %%dc,(%0)" :: "a" (p_address) ); } -void _CPU_invalidate_1_data_cache_line ( +void _CPU_cache_invalidate_1_data_line ( const void * d_addr ) { void * p_address = (void *) _CPU_virtual_to_physical( d_addr ); asm volatile ( "cinvl %%dc,(%0)" :: "a" (p_address) ); } -void _CPU_flush_entire_data_cache ( void ) +void _CPU_cache_flush_entire_data ( void ) { asm volatile ( "cpusha %%dc" :: ); } -void _CPU_invalidate_entire_data_cache ( void ) +void _CPU_cache_invalidate_entire_data ( void ) { asm volatile ( "cinva %%dc" :: ); } -void _CPU_enable_data_cache ( void ) +void _CPU_cache_enable_data ( void ) { _CPU_CACR_OR( 0x80000000 ); } -void _CPU_disable_data_cache ( void ) +void _CPU_cache_disable_data ( void ) { _CPU_CACR_AND( 0x7FFFFFFF ); } -void _CPU_invalidate_1_inst_cache_line ( +void _CPU_cache_invalidate_1_instruction_line ( const void * i_addr ) { void * p_address = (void *) _CPU_virtual_to_physical( i_addr ); asm volatile ( "cinvl %%ic,(%0)" :: "a" (p_address) ); } -void _CPU_invalidate_entire_inst_cache ( void ) +void _CPU_cache_invalidate_entire_instruction ( void ) { asm volatile ( "cinva %%ic" :: ); } -void _CPU_enable_inst_cache ( void ) +void _CPU_cache_enable_instruction ( void ) { _CPU_CACR_OR( 0x00008000 ); } -void _CPU_disable_inst_cache ( void ) +void _CPU_cache_disable_instruction ( void ) { _CPU_CACR_AND( 0xFFFF7FFF ); } |