diff options
Diffstat (limited to 'c/src/lib/libcpu/arm/shared/include/am335x.h')
| -rw-r--r-- | c/src/lib/libcpu/arm/shared/include/am335x.h | 97 |
1 files changed, 96 insertions, 1 deletions
diff --git a/c/src/lib/libcpu/arm/shared/include/am335x.h b/c/src/lib/libcpu/arm/shared/include/am335x.h index 2009cefacb..f59f896c9e 100644 --- a/c/src/lib/libcpu/arm/shared/include/am335x.h +++ b/c/src/lib/libcpu/arm/shared/include/am335x.h @@ -467,4 +467,99 @@ #define AM335X_CONF_EXT_WAKEUP 0xA00 #define AM335X_CONF_RTC_KALDO_ENN 0xA04 #define AM335X_CONF_USB0_DRVVBUS 0xA1C -#define AM335X_CONF_USB1_DRVVBUS 0xA34
\ No newline at end of file +#define AM335X_CONF_USB1_DRVVBUS 0xA34 + +/* Registers for PWM Subsystem */ +#define AM335X_PWMSS_CTRL (0x664) +#define AM335X_CM_PER_EPWMSS0_CLKCTRL (0xD4) +#define AM335X_CM_PER_EPWMSS1_CLKCTRL (0xCC) +#define AM335X_CM_PER_EPWMSS2_CLKCTRL (0xD8) +#define AM335X_CONTROL_MODULE (0x44e10000) +#define AM335X_CM_PER_ADDR (0x44e00000) +#define AM335X_PWMSS_CLKSTATUS (0xC) +#define AM335X_PWMSS0_MMAP_ADDR 0x48300000 +#define AM335X_PWMSS1_MMAP_ADDR 0x48302000 +#define AM335X_PWMSS2_MMAP_ADDR 0x48304000 +#define AM335X_PWMSS_MMAP_LEN 0x1000 +#define AM335X_PWMSS_IDVER 0x0 +#define AM335X_PWMSS_SYSCONFIG 0x4 +#define AM335X_PWMSS_CLKCONFIG 0x8 +#define AM335X_PWMSS_CLK_EN_ACK 0x100 +#define AM335X_PWMSS_CLKSTATUS 0xC +#define AM335X_EPWM_TBCTL 0x0 +#define AM335X_EPWM_TBSTS 0x2 +#define AM335X_EPWM_TBPHSHR 0x4 +#define AM335X_EPWM_TBPHS 0x6 +#define AM335X_EPWM_TBCNT 0x8 +#define AM335X_EPWM_TBPRD 0xA +#define AM335X_EPWM_CMPCTL 0xE +#define AM335X_EPWM_CMPAHR 0x10 +#define AM335X_EPWM_CMPA 0x12 +#define AM335X_EPWM_CMPB 0x14 +#define AM335X_EPWM_AQCTLA 0x16 +#define AM335X_EPWM_AQCTLB 0x18 +#define AM335X_EPWM_AQSFRC 0x1A +#define AM335X_EPWM_AQCSFRC 0x1C +#define AM335X_EPWM_DBCTL 0x1E +#define AM335X_EPWM_DBRED 0x20 +#define AM335X_EPWM_DBFED 0x22 +#define AM335X_TBCTL_CTRMODE_UP 0x0 +#define AM335X_TBCTL_CTRMODE_DOWN 0x1 +#define AM335X_TBCTL_CTRMODE_UPDOWN 0x2 +#define AM335X_TBCTL_CTRMODE_FREEZE 0x3 +#define AM335X_EPWM_AQCTLA_ZRO_XALOW (0x0001u) +#define AM335X_EPWM_AQCTLA_ZRO_XAHIGH (0x0002u) +#define AM335X_EPWM_AQCTLA_CAU_EPWMXATOGGLE (0x0003u) +#define AM335X_EPWM_AQCTLA_CAU_SHIFT (0x0004u) +#define AM335X_EPWM_AQCTLA_ZRO_XBLOW (0x0001u) +#define AM335X_EPWM_AQCTLB_ZRO_XBHIGH (0x0002u) +#define AM335X_EPWM_AQCTLB_CBU_EPWMXBTOGGLE (0x0003u) +#define AM335X_EPWM_AQCTLB_CBU_SHIFT (0x0008u) +#define AM335X_EPWM_TBCTL_CTRMODE_STOPFREEZE (0x0003u) +#define AM335X_PWMSS_CTRL_PWMSS0_TBCLKEN (0x00000001u) +#define AM335X_PWMSS_CTRL_PWMSS1_TBCLKEN (0x00000002u) +#define AM335X_PWMSS_CTRL_PWMSS2_TBCLKEN (0x00000004u) +#define AM335X_CM_PER_EPWMSS0_CLKCTRL_MODULEMODE_ENABLE (0x2u) +#define AM335X_CM_PER_EPWMSS1_CLKCTRL_MODULEMODE_ENABLE (0x2u) +#define AM335X_CM_PER_EPWMSS2_CLKCTRL_MODULEMODE_ENABLE (0x2u) +#define AM335X_TBCTL_CLKDIV_MASK (3 << 10) +#define AM335X_TBCTL_HSPCLKDIV_MASK (3 << 7) +#define AM335X_EPWM_TBCTL_CLKDIV (0x1C00u) +#define AM335X_EPWM_TBCTL_CLKDIV_SHIFT (0x000Au) +#define AM335X_EPWM_TBCTL_HSPCLKDIV (0x0380u) +#define AM335X_EPWM_TBCTL_HSPCLKDIV_SHIFT (0x0007u) +#define AM335X_EPWM_TBCTL_PRDLD (0x0008u) +#define AM335X_EPWM_PRD_LOAD_SHADOW_MASK AM335X_EPWM_TBCTL_PRDLD +#define AM335X_EPWM_SHADOW_WRITE_ENABLE 0x0 +#define AM335X_EPWM_SHADOW_WRITE_DISABLE 0x1 +#define AM335X_EPWM_TBCTL_PRDLD_SHIFT (0x0003u) +#define AM335X_EPWM_TBCTL_CTRMODE (0x0003u) +#define AM335X_EPWM_COUNTER_MODE_MASK AM335X_EPWM_TBCTL_CTRMODE +#define AM335X_TBCTL_FREERUN (2 << 14) +#define AM335X_TBCTL_CTRMODE_UP (0x0000u) +#define AM335X_TBCTL_CTRMODE_SHIFT (0x0000u) +#define AM335X_EPWM_COUNT_UP (AM335X_TBCTL_CTRMODE_UP << \ + AM335X_TBCTL_CTRMODE_SHIFT) + +#define AM335X_EPWM_REGS (0x00000200) +#define AM335X_EPWM_0_REGS (AM335X_PWMSS0_MMAP_ADDR + AM335X_EPWM_REGS) +#define AM335X_EPWM_1_REGS (AM335X_PWMSS1_MMAP_ADDR + AM335X_EPWM_REGS) +#define AM335X_EPWM_2_REGS (AM335X_PWMSS2_MMAP_ADDR + AM335X_EPWM_REGS) + +#define AM335X_CM_PER_EPWMSS0_CLKCTRL_MODULEMODE (0x00000003u) +#define AM335X_CM_PER_EPWMSS0_CLKCTRL_IDLEST_FUNC (0x0u) +#define AM335X_CM_PER_EPWMSS0_CLKCTRL_IDLEST_SHIFT (0x00000010u) +#define AM335X_CM_PER_EPWMSS0_CLKCTRL_IDLEST (0x00030000u) + +#define AM335X_CM_PER_EPWMSS1_CLKCTRL_MODULEMODE (0x00000003u) +#define AM335X_CM_PER_EPWMSS1_CLKCTRL_IDLEST (0x00030000u) +#define AM335X_CM_PER_EPWMSS1_CLKCTRL_IDLEST_FUNC (0x0u) +#define AM335X_CM_PER_EPWMSS1_CLKCTRL_IDLEST_SHIFT (0x00000010u) + +#define AM335X_CM_PER_EPWMSS2_CLKCTRL_MODULEMODE (0x00000003u) +#define AM335X_CM_PER_EPWMSS2_CLKCTRL_IDLEST_FUNC (0x0u) +#define AM335X_CM_PER_EPWMSS2_CLKCTRL_IDLEST_SHIFT (0x00000010u) +#define AM335X_CM_PER_EPWMSS2_CLKCTRL_IDLEST (0x00030000u) + + + |