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diff --git a/c/src/lib/libbsp/powerpc/ss555/startup/linkcmds b/c/src/lib/libbsp/powerpc/ss555/startup/linkcmds
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index 0000000000..f316621ebc
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+++ b/c/src/lib/libbsp/powerpc/ss555/startup/linkcmds
@@ -0,0 +1,320 @@
+/*
+ * Linker command file for Intec SS555 board
+ *
+ * When debugging, we assume that the internal flash ROM will be replaced by
+ * the external RAM on the SS555 board. All sections are stacked starting
+ * at address zero. Nothing is placed in the internal RAM, since it's not
+ * contiguous with the external SRAM when the external RAM is placed at
+ * zero.
+ *
+ * For final production, we assume that the .text section will be burned
+ * into flash ROM starting at address zero. The .data, .bss, heap, and
+ * workspace will reside in RAM, starting at the beginning of the internal
+ * RAM. The system startup code will configure the external RAM to begin
+ * where the internal RAM ends, so as to make one large RAM block.
+ *
+ * Debugging mode is chosen when the RTEMS_DEBUG symbol is defined. The
+ * RTEMS_DEBUG symbol is defined in the bsp_specs file whenever make(1) is
+ * invoked with VARIANT=DEBUG.
+ *
+ * $Id$
+ */
+
+OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc", "elf32-powerpc")
+OUTPUT_ARCH(powerpc)
+ENTRY(start)
+
+int_ram_org = 0x003F9800; /* base of internal RAM */
+int_ram_top = 0x00400000; /* top of internal RAM */
+ext_ram_size = 0x00080000; /* size of external RAM */
+
+
+SECTIONS
+{
+ .vectors 0x0:
+ {
+ /*
+ * For the MPC555, we use the compressed vector table format which puts
+ * all of the exception vectors before 0x100.
+ */
+ *(.vectors)
+ }
+
+ .text 0x100:
+ {
+ /* Read-only sections, merged into text segment: */
+
+ text.start = .;
+
+ /* Entry point is the .entry section */
+ *(.entry)
+ *(.entry2)
+
+ /* Actual code */
+ *(.text)
+ *(.text.*)
+
+ /* C++ constructors/destructors */
+ *(.gnu.linkonce.t*)
+
+ /* Initialization and finalization code.
+ *
+ * Various files can provide initialization and finalization functions.
+ * The bodies of these functions are in .init and .fini sections. We
+ * accumulate the bodies here, and prepend function prologues from
+ * ecrti.o and function epilogues from ecrtn.o. ecrti.o must be linked
+ * first; ecrtn.o must be linked last. Because these are wildcards, it
+ * doesn't matter if the user does not actually link against ecrti.o and
+ * ecrtn.o; the linker won't look for a file to match a wildcard. The
+ * wildcard also means that it doesn't matter which directory ecrti.o
+ * and ecrtn.o are in.
+ */
+ PROVIDE (_init = .);
+ *ecrti.o(.init)
+ *(.init)
+ *ecrtn.o(.init)
+
+ PROVIDE (_fini = .);
+ *ecrti.o(.fini)
+ *(.fini)
+ *ecrtn.o(.init)
+
+ /*
+ * C++ constructors and destructors for static objects.
+ * PowerPC EABI does not use crtstuff yet, so we build "old-style"
+ * constructor and destructor lists that begin with the list length
+ * end terminate with a NULL entry.
+ */
+ PROVIDE (__CTOR_LIST__ = .);
+ /* LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) */
+ *crtbegin.o(.ctors)
+ *(.ctors)
+ *crtend.o(.ctors)
+ LONG(0)
+ PROVIDE (__CTOR_END__ = .);
+
+ PROVIDE (__DTOR_LIST__ = .);
+ /* LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) */
+ *crtbegin.o(.dtors)
+ *(.dtors)
+ *crtend.o(.dtors)
+ LONG(0)
+ PROVIDE (__DTOR_END__ = .);
+
+ /*
+ * Special FreeBSD sysctl sections.
+ */
+ . = ALIGN (16);
+ __start_set_sysctl_set = .;
+ *(set_sysctl_*);
+ __stop_set_sysctl_set = ABSOLUTE(.);
+ *(set_domain_*);
+ *(set_pseudo_*);
+
+ /* Exception frame info */
+ *(.eh_frame)
+
+ /* Miscellaneous read-only data */
+ _rodata_start = . ;
+ *(.gnu.linkonce.r*)
+ *(.lit)
+ *(.shdata)
+ *(.rodata*)
+ *(.rodata1)
+ *.(eh_frame)
+ *(.descriptors)
+ *(rom_ver)
+ _erodata = .;
+
+ /* Various possible names for the end of the .text section */
+ etext = ALIGN(0x10);
+ _etext = .;
+ _endtext = .;
+ text.end = .;
+ PROVIDE (etext = .);
+ PROVIDE (__etext = .);
+
+ /*
+ * .data section contents, copied to RAM at system startup.
+ */
+ . = ALIGN(0x20);
+ data.contents.start = .;
+ }
+ text.size = text.end - text.start;
+
+ /*
+ * If debugging, stack the read/write sections directly after the text
+ * section. Otherwise, stack the read/write sections starting at base of
+ * internal RAM.
+ */
+ . = DEFINED(RTEMS_DEBUG) ? . : int_ram_org;
+
+ .data : AT (data.contents.start)
+ {
+ data.start = .;
+
+ *(.data)
+ *(.data.*)
+ *(.data1)
+
+ PROVIDE (__SDATA_START__ = .);
+ *(.sdata)
+ *(.gnu.linkonce.d*)
+ *(.gnu.linkonce.s.*)
+ PROVIDE (__SDATA_END__ = .);
+
+ PROVIDE (__EXCEPT_START__ = .);
+ *(.gcc_except_table)
+ PROVIDE (__EXCEPT_END__ = .);
+
+ PROVIDE(__GOT_START__ = .);
+ *(.got.plt)
+ *(.got)
+ PROVIDE(__GOT_END__ = .);
+
+ *(.got1)
+
+ PROVIDE (__GOT2_START__ = .);
+ PROVIDE (_GOT2_START_ = .);
+ *(.got2)
+ PROVIDE (__GOT2_END__ = .);
+ PROVIDE (_GOT2_END_ = .);
+
+ PROVIDE (__FIXUP_START__ = .);
+ PROVIDE (_FIXUP_START_ = .);
+ *(.fixup)
+ PROVIDE (_FIXUP_END_ = .);
+ PROVIDE (__FIXUP_END__ = .);
+
+ /* We want the small data sections together, so single-instruction
+ * offsets can access them all.
+ */
+ PROVIDE (__SDATA2_START__ = .);
+ *(.sdata2)
+ *(.gnu.linkonce.s2.*)
+ PROVIDE (__SDATA2_END__ = .);
+
+ data.end = .;
+ }
+ data.size = data.end - data.start;
+
+ .bss :
+ {
+ bss.start = .;
+
+ PROVIDE (__SBSS2_START__ = .);
+ *(.sbss2)
+ PROVIDE (__SBSS2_END__ = .);
+
+ PROVIDE (__SBSS_START__ = .);
+ *(.sbss)
+ PROVIDE (__SBSS_END__ = .);
+
+ *(.bss)
+ *(COMMON)
+
+ . = ALIGN(4);
+ bss.end = .;
+ }
+ bss.size = bss.end - bss.start;
+
+ PROVIDE(_end = bss.end);
+
+ /*
+ * Initialization stack
+ */
+ InitStack_start = ALIGN(0x10);
+ . += 0x1000;
+ initStack = .;
+ PROVIDE(initStackPtr = initStack);
+
+ /*
+ * Interrupt stack
+ */
+ IntrStack_start = ALIGN(0x10);
+ . += 0x4000;
+ intrStack = .;
+ PROVIDE(intrStackPtr = intrStack);
+
+ _WorkspaceBase = .;
+ __WorkspaceBase = .;
+
+ /*
+ * Heap
+ *
+ * The heap is configured at run-time to use all available memory. It
+ * begins just after the end of the Workspace and continues to the end of
+ * the external RAM.
+ */
+ . = DEFINED(RTEMS_DEBUG) ? 0 + ext_ram_size : int_ram_top + ext_ram_size;
+ _HeapEnd = .;
+ __HeapEnd = .;
+
+
+ /*
+ * Internal I/O devices
+ */
+ .usiu 0x002FC000: /* unified system interface unit */
+ {
+ usiu = .;
+ }
+
+ .imb 0x00300000: /* inter-module bus and devices */
+ {
+ imb = .;
+ }
+
+ .sram 0x00380000: /* internal SRAM control registers */
+ {
+ sram = .;
+ }
+
+ /*
+ * SS555 external devices managed by on-board CPLD
+ */
+ .cpld 0xFF000000: /* SS555 external CPLD devices */
+ {
+ cpld = .;
+ }
+
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ /* These must appear regardless of . */
+}