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Diffstat (limited to 'c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S')
-rw-r--r--c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S27
1 files changed, 26 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S
index 6131100e9f..b59bf862f2 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S
@@ -9,6 +9,9 @@
* Modified to support the MCP750.
* Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
+ * Till Straumann <strauman@slac.stanford.edu>, 2003/7:
+ * - store isr nesting level in _ISR_Nest_level rather than
+ * SPRG0 - RTEMS relies on that variable.
*
* $Id$
*/
@@ -176,10 +179,18 @@ SYM (shared_raw_irq_code_entry):
* store part of _Thread_Dispatch_disable_level address in R15
*/
addis r15,0, _Thread_Dispatch_disable_level@ha
+#if BROKEN_ISR_NEST_LEVEL
/*
* Get current nesting level in R2
*/
mfspr r2, SPRG0
+#else
+ /*
+ * Retrieve current nesting level from _ISR_Nest_level
+ */
+ lis r7, _ISR_Nest_level@ha
+ lwz r2, _ISR_Nest_level@l(r7)
+#endif
/*
* Check if stack switch is necessary
*/
@@ -196,10 +207,15 @@ nested:
* Start Incrementing _Thread_Dispatch_disable_level R4 = _Thread_Dispatch_disable_level
*/
lwz r6,_Thread_Dispatch_disable_level@l(r15)
+#if BROKEN_ISR_NEST_LEVEL
/*
- * store new nesting level in SPRG0
+ * Store new nesting level in SPRG0
*/
mtspr SPRG0, r2
+#else
+ /* store new nesting level in _ISR_Nest_level */
+ stw r2, _ISR_Nest_level@l(r7)
+#endif
addi r6, r6, 1
mfmsr r5
@@ -223,14 +239,23 @@ nested:
* value as an easy exit condition because if interrupt nesting level > 1
* then _Thread_Dispatch_disable_level > 1
*/
+#if BROKEN_ISR_NEST_LEVEL
mfspr r2, SPRG0
+#else
+ lis r7, _ISR_Nest_level@ha
+ lwz r2, _ISR_Nest_level@l(r7)
+#endif
/*
* start decrementing _Thread_Dispatch_disable_level
*/
lwz r3,_Thread_Dispatch_disable_level@l(r15)
addi r2, r2, -1 /* Continue decrementing nesting level */
addi r3, r3, -1 /* Continue decrementing _Thread_Dispatch_disable_level */
+#if BROKEN_ISR_NEST_LEVEL
mtspr SPRG0, r2 /* End decrementing nesting level */
+#else
+ stw r2, _ISR_Nest_level@l(r7) /* End decrementing nesting level */
+#endif
stw r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */
cmpwi r3, 0
/*