diff options
Diffstat (limited to 'c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c')
| -rw-r--r-- | c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c | 131 |
1 files changed, 77 insertions, 54 deletions
diff --git a/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c b/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c index 06eb3d6652..15f4922d9f 100644 --- a/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c +++ b/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c @@ -27,6 +27,7 @@ + /* * The original table from the application and our copy of it with * some changes. @@ -87,69 +88,88 @@ void bsp_pretasking_hook(void) void bsp_start( void ) { - extern int WorkspaceBase; - extern void mips_install_isr_entries(); - - /* Configure Number of Register Caches */ - - Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */ - Cpu_table.postdriver_hook = bsp_postdriver_hook; - Cpu_table.interrupt_stack_size = 4096; - - /* HACK -- tied to value linkcmds */ - if ( BSP_Configuration.work_space_size > (4096*1024) ) - _sys_exit( 1 ); - - BSP_Configuration.work_space_start = (void *) &WorkspaceBase; - - /* mask off any interrupts */ - MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_MASK_REGISTER, 0 ); - - MONGOOSEV_WRITE( MONGOOSEV_WATCHDOG, 0xA0 ); - - /* reset the config register & clear any pending peripheral interrupts */ - MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 ); - MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, MONGOOSEV_UART_CMD_RESET_BOTH_PORTS ); - MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 ); - - /* reset both timers */ - MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff ); - MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0); + extern void _sys_exit(int); + extern int WorkspaceBase; + extern void mips_install_isr_entries(); + extern void mips_gdb_stub_install(void); + + /* Configure Number of Register Caches */ + + Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */ + Cpu_table.postdriver_hook = bsp_postdriver_hook; + Cpu_table.interrupt_stack_size = 4096; + + /* HACK -- tied to value linkcmds */ + if ( BSP_Configuration.work_space_size > (4096*1024) ) + _sys_exit( 1 ); + + BSP_Configuration.work_space_start = (void *) &WorkspaceBase; + + /* mask off any interrupts */ + MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_MASK_REGISTER, 0 ); + + /* reset the config register & clear any pending peripheral interrupts */ + MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 ); + MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, MONGOOSEV_UART_CMD_RESET_BOTH_PORTS ); + MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 ); + + /* reset both timers */ + MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff ); + MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0); + + MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff ); + MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0); + + /* clear any pending interrupts */ + MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_STATUS_REGISTER, 0xffffffff ); + + /* clear any writable bits in the cause register */ + mips_set_cause( 0 ); + + /* set interrupt mask, but globally off. */ + + /* + ** Bit 15 | Bit 14 | Bit 13 | Bit 12 | Bit 11 | Bit 10 | Bit 9 | Bit 8 | + ** periph | unused | FPU | unused | timer2 | timer1 | swint1 | swint2 | + ** extern | | | | | | | | + ** + ** 1 0 1 0 0 1 0 0 + ** + ** 0x8C00 Enable only internal Mongoose V timers. + ** 0xA400 Enable Peripherial ints, FPU and timer1 + ** 0x0400 Timer1 only + */ + + /* mips_set_sr( (SR_CU0 | SR_CU1 | 0xA400) ); */ + + /* to start up, only enable coprocessor 0 & timer int. per-task + ** processor settings will be applied as they are created, this + ** is just to configure the processor for startup + */ + mips_set_sr( (SR_CU0 | 0x400) ); + + mips_install_isr_entries(); +} - MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff ); - MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0); - /* clear any pending interrupts */ - MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_STATUS_REGISTER, 0xffffffff ); - /* clear any writable bits in the cause register */ - mips_set_cause( 0 ); - /* set interrupt mask, but globally off. */ +void clear_cache( void ) +{ + extern void promCopyIcacheFlush(void); /* from start.S */ + extern void promCopyDcacheFlush(void); - /* - ** Bit 15 | Bit 14 | Bit 13 | Bit 12 | Bit 11 | Bit 10 | Bit 9 | Bit 8 | - ** periph | unused | FPU | unused | timer2 | timer1 | swint1 | swint2 | - ** extern | | | | | | | | - ** - ** 1 0 1 0 0 1 0 0 - ** - ** 0x8C00 Enable only internal Mongoose V timers. - ** 0xA400 Enable Peripherial ints, FPU and timer1 - */ + promCopyIcacheFlush(); + promCopyDcacheFlush(); +} - mips_set_sr( (SR_CU0 | SR_CU1 | 0xA400) ); - mips_install_isr_entries(); -} -void clear_cache( void *address, size_t n ) -{ -} +/* + +//Structure filled in by get_mem_info. -/* Structure filled in by get_mem_info. Only the size field is - actually used (to clear bss), so the others aren't even filled in. */ struct s_mem { @@ -159,11 +179,14 @@ struct s_mem }; - extern unsigned32 _RamSize; void get_mem_info ( struct s_mem *mem ) { mem->size = (unsigned32)&_RamSize; + mem->icsize = MONGOOSEV_IC_SIZE; + mem->dcsize = MONGOOSEV_DC_SIZE; } +*/ + |