diff options
Diffstat (limited to 'c/src/lib/libbsp/m68k/ods68302/start')
| -rw-r--r-- | c/src/lib/libbsp/m68k/ods68302/start/cpuboot.c | 16 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/ods68302/start/reset.S | 9 |
2 files changed, 20 insertions, 5 deletions
diff --git a/c/src/lib/libbsp/m68k/ods68302/start/cpuboot.c b/c/src/lib/libbsp/m68k/ods68302/start/cpuboot.c index fd8a4146de..95b205d6fc 100644 --- a/c/src/lib/libbsp/m68k/ods68302/start/cpuboot.c +++ b/c/src/lib/libbsp/m68k/ods68302/start/cpuboot.c @@ -41,14 +41,22 @@ Open the address, reset all registers */ +extern int ROM_SIZE, ROM_BASE; +extern int RAM_SIZE, RAM_BASE; + +#define _ROM_SIZE ((unsigned int)&ROM_SIZE) +#define _ROM_BASE ((unsigned int)&ROM_BASE) +#define _RAM_SIZE ((unsigned int)&RAM_SIZE) +#define _RAM_BASE ((unsigned int)&RAM_BASE) + void boot_phase_1() { M302_SCR = SCR_DEFAULT; - WRITE_OR(CSEL_ROM, ROM_SIZE, ROM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC); - WRITE_BR(CSEL_ROM, RAM_BASE, BR_READ_ONLY, BR_FC_NULL, BR_ENABLED); - WRITE_OR(CSEL_RAM, RAM_SIZE, RAM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC); - WRITE_BR(CSEL_RAM, ROM_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED); + WRITE_OR(CSEL_ROM, _ROM_SIZE, ROM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC); + WRITE_BR(CSEL_ROM, _RAM_BASE, BR_READ_ONLY, BR_FC_NULL, BR_ENABLED); + WRITE_OR(CSEL_RAM, _RAM_SIZE, RAM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC); + WRITE_BR(CSEL_RAM, _ROM_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED); #if defined(CSEL_1) WRITE_OR(CSEL_1, CSEL_1_SIZE, CSEL_1_WAIT_STATES, OR_MASK_RW, OR_MASK_FC); diff --git a/c/src/lib/libbsp/m68k/ods68302/start/reset.S b/c/src/lib/libbsp/m68k/ods68302/start/reset.S index 1ed00d2401..c31a7a4faf 100644 --- a/c/src/lib/libbsp/m68k/ods68302/start/reset.S +++ b/c/src/lib/libbsp/m68k/ods68302/start/reset.S @@ -357,7 +357,14 @@ start: | moveq #0,%d0 - move.w #(MC68302_BASE >> 12),%d0 + | Joel: With the change of MC68302_BASE from a #define to a linker + | symbol, the following 4 instructions replace this one: + | move.w #(MC68302_BASE >> 12),%d0 + move.l #MC68302_BASE,%d0 + moveq.l #12,%d1 + lsr.l %d1,%d0 + and.l #0xFFFF,%d0 + or.w #(MC68302_BAR_FC_CFC << 12),%d0 move.l #MC68302_BAR,%a0 move.w %d0,%a0@(0) |