diff options
Diffstat (limited to 'c/src/lib/libbsp/m68k/efi68k/include')
-rw-r--r-- | c/src/lib/libbsp/m68k/efi68k/include/.cvsignore | 6 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/efi68k/include/16550.h | 110 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/efi68k/include/DP8570A.h | 275 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/efi68k/include/bsp.h | 173 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/efi68k/include/efi68k.h | 34 |
5 files changed, 0 insertions, 598 deletions
diff --git a/c/src/lib/libbsp/m68k/efi68k/include/.cvsignore b/c/src/lib/libbsp/m68k/efi68k/include/.cvsignore deleted file mode 100644 index b0be3c54e6..0000000000 --- a/c/src/lib/libbsp/m68k/efi68k/include/.cvsignore +++ /dev/null @@ -1,6 +0,0 @@ -Makefile -Makefile.in -bspopts.h -bspopts.h.in -stamp-h -stamp-h.in diff --git a/c/src/lib/libbsp/m68k/efi68k/include/16550.h b/c/src/lib/libbsp/m68k/efi68k/include/16550.h deleted file mode 100644 index aeceae205f..0000000000 --- a/c/src/lib/libbsp/m68k/efi68k/include/16550.h +++ /dev/null @@ -1,110 +0,0 @@ -/* - *------------------------------------------------------------------- - * - * 16550 -- header file for National Semiconducor's 16550 UART - * - * This file has been created by John S. Gwynne for the efi68k - * project. - * - * The license and distribution terms for this file may in - * the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - *------------------------------------------------------------------ - * - * $Id$ - */ - -#ifndef _16550_H_ -#define _16550_H_ - -/* base address is the physical location of register 0 */ -#define UART_BASE_ADDRESS 0x0400001 - -/* definitions of register addresses and associate bits */ - -#define RBR (volatile unsigned char * const)(0*2+UART_BASE_ADDRESS) - /* Receiver Buffer Register (w/DLAB=0)*/ - /* 8-bit data */ - -#define THR (volatile unsigned char * const)(0*2+UART_BASE_ADDRESS) - /* Transmitter Holding Register (w/DLAB=0) */ - /* 8-bit data */ - -#define DLL (volatile unsigned char * const)(0*2+UART_BASE_ADDRESS) - /* Divisor Latch (LS) (w/DLAB=1) */ - /* LSB of Divisor */ - -#define DLM (volatile unsigned char * const)(1*2+UART_BASE_ADDRESS) - /* Divisor Latch (MS) (w/DLAB=1) */ - /* MSB of Divisor */ - -#define IER (volatile unsigned char * const)(1*2+UART_BASE_ADDRESS) - /* Interrupt Enable Register (w/DLAB=0) */ -#define ERBFI 0x01 /* Enable Recv Data Available Interrupt */ -#define ETBEI 0x02 /* Enable Trans Holding Reg Empty Inter */ -#define ELSI 0x04 /* Enable Recv Line Status Interrupt */ -#define EDSSI 0x08 /* Enable Modem Status Interrupt */ - -#define IIR (volatile unsigned char * const)(2*2+UART_BASE_ADDRESS) - /* Interrupt Ident Register (read only) */ -#define NIP 0x01 /* No Interrupt Pending */ -#define IID_MASK 0x0e /* Interrupt ID mask */ -#define FE_MASK 0xc0 /* FIFO's Enabled */ - -#define FCR (volatile unsigned char * const)(2*2+UART_BASE_ADDRESS) - /* FIFO Control Register (write only) */ -#define FIFO_E 0x01 /* FIFO Enable */ -#define RFR 0x02 /* RCVR FIFO Reset */ -#define XFR 0x04 /* XMIT FIFO Reset */ -#define DMAMS 0x08 /* DMA Mode Select */ -#define RCVRTG_MASK 0xC0 /* RCVR Triger MSBit/LSBit */ - -#define LCR (volatile unsigned char * const)(3*2+UART_BASE_ADDRESS) - /* Line Control Register */ -#define WLS_MASK 0x03 /* Word Legth Select Mask */ -#define WL_5 0x00 /* 5 bits */ -#define WL_6 0x01 /* 6 bits */ -#define WL_7 0x02 /* 7 bits */ -#define WL_8 0x03 /* 8 bits */ -#define NSB 0x04 /* Number of Stop Bits (set is 2/1.5) */ -#define PEN 0x08 /* Parity Enable */ -#define EPS 0x10 /* Even Parity Select */ -#define STP 0x20 /* Stick Parity */ -#define SETBK 0x40 /* Set Break */ -#define DLAB 0x80 /* Divisor Latch Access Bit */ - -#define MCR (volatile unsigned char * const)(4*2+UART_BASE_ADDRESS) - /* Modem Control Register */ -#define DTR 0x01 /* Data Terminal Ready */ -#define RTS 0x02 /* Request to Send */ -#define OUT1 0x04 /* Out 1 */ -#define OUT2 0x08 /* Out 2 */ -#define LOOP 0x10 /* Loop */ - -#define LSR (volatile unsigned char * const)(5*2+UART_BASE_ADDRESS) - /* Line Status Register */ -#define DR 0x01 /* Data Ready */ -#define OE 0x02 /* Overrun error */ -#define PE 0x04 /* Parity error */ -#define FE 0x08 /* Framing error */ -#define BI 0x10 /* Break Interrupt */ -#define THRE 0x20 /* Transmitter Holding Register */ -#define TEMT 0x40 /* Transmitter Empty */ -#define RCVFIE 0x80 /* Recv FIFO Error */ - -#define MDSR (volatile unsigned char * const)(6*2+UART_BASE_ADDRESS) - /* Modem Status Register */ -#define DCTS 0x01 /* Delta Clear to Send */ -#define DDSR 0x02 /* Delta Data Set Ready */ -#define TERI 0x04 /* Trailing Edge Ring Indicator */ -#define DDCD 0x08 /* Delta Data Carrier Detect */ -#define CTS 0x10 /* Clear to Send */ -#define DSR 0x20 /* Data Set Ready */ -#define RI 0x40 /* Ring Indicator */ -#define DCD 0x80 /* Data Carrier Detect */ - -#define SCR (volatile unsigned char * const)(7*2+UART_BASE_ADDRESS) - /* Scratch Register */ - /* 8-bit register */ -#endif diff --git a/c/src/lib/libbsp/m68k/efi68k/include/DP8570A.h b/c/src/lib/libbsp/m68k/efi68k/include/DP8570A.h deleted file mode 100644 index 1e8c188a16..0000000000 --- a/c/src/lib/libbsp/m68k/efi68k/include/DP8570A.h +++ /dev/null @@ -1,275 +0,0 @@ -/* - *------------------------------------------------------------------- - * - * DP8570A -- header file for National Semiconducor's DP8570A TCP - * - * This file has been created by John S. Gwynne for the efi68k - * project. - * - * The license and distribution terms for this file may in - * the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - *------------------------------------------------------------------ - * - * $Id$ - */ - -#ifndef _DP8570A_H_ -#define _DP8570A_H_ - -/* base address is the physical location of register 0 */ -#define TCP_BASE_ADDRESS 0x0600001 - - -/* definitions of register addresses and associate bits */ - -/* ********************************************************* */ -/* Control Registers */ -/* ********************************************************* */ - -/* REMEMBER: if you are in an interrupt routine, you must - reset RS and PS of MSR to the value they had on entry - to the ISR before exiting */ - -#define MSR (volatile unsigned char * const)(0x00*2+TCP_BASE_ADDRESS) - /* Main Status Register */ -#define INT 0x01 /* Interrupt Status */ -#define PF 0x02 /* Power Fail Interrupt */ -#define PER 0x04 /* Period Interrupt */ -#define AL 0x08 /* Alarm Interrupt */ -#define T0 0x10 /* Timer 0 Interrupt */ -#define T1 0x20 /* Timer 1 Interrupt */ -#define RS 0x40 /* Register Select Bit */ -#define PS 0x80 /* Page Select Bit */ - -#define T0CR (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS) - /* Timer 0 Control Register */ -#define T1CR (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS) - /* Timer 1 Control Register */ -#define TSS 0x01 /* Timer Start/!Stop */ -#define M0 0x02 /* Mode Select */ -#define M1 0x04 /* Mode Select */ -#define C0 0x08 /* Input Clock Select */ -#define C1 0x10 /* Input Clock Select */ -#define C2 0x20 /* Input Clock Select */ -#define RD 0x40 /* Timer Read */ -#define CHG 0x80 /* Count Hold/Gate */ - -#define PFR (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS) - /* Periodic Flag Register */ -#define R_1MIN 0x01 /* Minute Flage */ -#define R_10S 0x02 /* 10 Second Flag */ -#define R_1S 0x04 /* Second Flag */ -#define R_100MS 0x08 /* 100 Millisec Flag */ -#define R_10MS 0x10 /* 10 Millisec Flag */ -#define R_1MS 0x20 /* 1 Millisec Flag */ -#define OSF 0x40 /* Oscillator Failed/Single Supply */ -#define TMODE 0x80 /* Test Mode Enable */ - -#define IRR (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS) - /* Interrupt Routing Register */ -#define PF_R 0x01 /* Power Fail Route */ -#define PR_R 0x02 /* Periodic Route */ -#define AL_R 0x04 /* Alarm Route */ -#define T0_R 0x08 /* Timer 0 Route */ -#define T1_R 0x10 /* Timer 1 Route */ -#define PFD 0x20 /* PF Delay Enable */ -#define LBF 0x40 /* Low Battery Flag */ -#define TMSE 0x80 /* Time Save Enable */ - -#define RTMR (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS) - /* Real Time Mode Register */ -#define LY0 0x01 /* Leap Year LSB */ -#define LY1 0x02 /* Leap Year MSB */ -#define H12 0x04 /* 12/!24 Hour Mode */ -#define CSS 0x08 /* Clock Start/!Stop */ -#define IPF 0x10 /* Interrupt PF Operation */ -#define TPF 0x20 /* Timer PF Operation */ -#define XT0 0x40 /* Crystal Frequency LSB */ -#define XT1 0x80 /* Crystal Frequency MSB */ - -#define OMR (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS) - /* Output Mode Register */ -#define TH 0x01 /* T1 Active Hi/!Low */ -#define TP 0x02 /* T1 Push Pull/!Open Drain */ -#define IH 0x04 /* INTR Active Hi/!Low */ -#define IP 0x08 /* INTR Push Pull/!Open Drain */ -#define MH 0x10 /* MFO Active Hi/!Low */ -#define MP 0x20 /* MFO Push Pull/!Open Drain */ -#define MT 0x40 /* MFO Pin as Timer 0 */ -#define MO 0x80 /* MFO Pin as Oscillator */ - -#define ICR0 (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS) - /* Interrupt control Register 0 */ -#define ME 0x01 /* Minutes Enable */ -#define TSE 0x02 /* 10 Second Enable */ -#define SE 0x04 /* Seconds Enable */ -#define HME 0x08 /* 100 Millisec Enable */ -#define TME 0x10 /* 10 Millisec Enable */ -#define OME 0x20 /* Millisec Enable */ -#define T0E 0x40 /* Timer 0 Enable */ -#define T1E 0x80 /* Timer 1 Enable */ - -#define ICR1 (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS) - /* Interrupt control Register 1 */ -#define SCE 0x01 /* Second Compare Enable */ -#define MNE 0x02 /* Minute Compare Enable */ -#define HRE 0x04 /* Hour Compare Enable */ -#define DOME 0x08 /* Day of Month Compare Enable */ -#define MOE 0x10 /* Month Compare Enable */ -#define DOWE 0x20 /* Day of Week Compare Enable */ -#define ALE 0x40 /* Alarm Interrupt Enable */ -#define PFE 0x80 /* Power Fail Interrupt Enable */ - - - -/* ********************************************************* */ -/* Counters: Clock and Calendar (data is stored in BCD) */ -/* ********************************************************* */ -#define HOFS (volatile unsigned char * const)(0x05*2+TCP_BASE_ADDRESS) - /* Hundredth of Seconds */ -#define SEC (volatile unsigned char * const)(0x06*2+TCP_BASE_ADDRESS) - /* Seconds */ -#define MIN (volatile unsigned char * const)(0x07*2+TCP_BASE_ADDRESS) - /* Minutes */ -#define HRS (volatile unsigned char * const)(0x08*2+TCP_BASE_ADDRESS) - /* Hours */ -#define DOM (volatile unsigned char * const)(0x09*2+TCP_BASE_ADDRESS) - /* Day of Month */ -#define MON (volatile unsigned char * const)(0x0a*2+TCP_BASE_ADDRESS) - /* Month */ -#define YR (volatile unsigned char * const)(0x0b*2+TCP_BASE_ADDRESS) - /* Year */ -#define JD_LSB (volatile unsigned char * const)(0x0c*2+TCP_BASE_ADDRESS) - /* Julian Date (LSB) */ -#define JD_MSM (volatile unsigned char * const)(0x0d*2+TCP_BASE_ADDRESS) - /* Julian Date (MSB) */ -#define DOW (volatile unsigned char * const)(0x0e*2+TCP_BASE_ADDRESS) - /* Day of week */ - - -/* ********************************************************* */ -/* Timer Data Registers */ -/* ********************************************************* */ -#define T0_LSB (volatile unsigned char * const)(0x0f*2+TCP_BASE_ADDRESS) - /* Timer 0 LSB */ -#define T0_MSB (volatile unsigned char * const)(0x10*2+TCP_BASE_ADDRESS) - /* Timer 0 MSB */ -#define T1_LSB (volatile unsigned char * const)(0x11*2+TCP_BASE_ADDRESS) - /* Timer 1 LSB */ -#define T1_MSB (volatile unsigned char * const)(0x12*2+TCP_BASE_ADDRESS) - /* Timer 1 MSB */ - - -/* ********************************************************* */ -/* Timer Compare RAM */ -/* ********************************************************* */ -#define TC_SEC (volatile unsigned char * const)(0x13*2+TCP_BASE_ADDRESS) - /* Seconds Compare RAM */ -#define TC_MIN (volatile unsigned char * const)(0x14*2+TCP_BASE_ADDRESS) - /* Minutes Compare RAM */ -#define TC_HRS (volatile unsigned char * const)(0x15*2+TCP_BASE_ADDRESS) - /* Hours Compare RAM */ -#define TC_DOM (volatile unsigned char * const)(0x16*2+TCP_BASE_ADDRESS) - /* Day of Month Compare RAM */ -#define TC_MON (volatile unsigned char * const)(0x17*2+TCP_BASE_ADDRESS) - /* Month Compare RAM */ -#define TC_DOW (volatile unsigned char * const)(0x18*2+TCP_BASE_ADDRESS) - /* Day of Week Compare RAM */ - - -/* ********************************************************* */ -/* Time Save RAM */ -/* ********************************************************* */ -#define S_SEC (volatile unsigned char * const)(0x19*2+TCP_BASE_ADDRESS) - /* Seconds Save RAM */ -#define S_MIN (volatile unsigned char * const)(0x1a*2+TCP_BASE_ADDRESS) - /* Minutes Save RAM */ -#define S_HRS (volatile unsigned char * const)(0x1b*2+TCP_BASE_ADDRESS) - /* Hours Save RAM */ -#define S_DOM (volatile unsigned char * const)(0x1c*2+TCP_BASE_ADDRESS) - /* Day of Month Save RAM */ -#define S_MON (volatile unsigned char * const)(0x1d*2+TCP_BASE_ADDRESS) - /* Month Save RAM */ - - -/* ********************************************************* */ -/* Miscellaneous Registers */ -/* ********************************************************* */ - /* rem: 0x1e is general purpose RAM */ -#define TMR (volatile unsigned char * const)(0x1F*2+TCP_BASE_ADDRESS) - /* RAM/Test Mode Register */ - - - -/* ********************************************************* */ -/* RAM allocation */ -/* ********************************************************* */ -#define RAM_OSC_FAIL (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS) - /* 1: osc. failed time lost */ -#define RAM_POWERUP (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS) - /* 1: power was removed and the applied - before last TCP init */ -#define RAM_LOWBAT (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS) - /* 1: battery voltage is low (2.2V) */ - /* not valid in single supply mode */ -#define RAM_SINGLE_SUP (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS) - /* 1: single supply mode */ - /* note: single supply mode will be - selected when no backup battery is - present and/or the first time the - system is booted after the loss of - backup battery voltage. */ -#define RAM_TCP_FAILURE (volatile unsigned char * const)(0x05*2+TCP_BASE_ADDRESS) - /* 1: TCP failed to start oscillating */ - - -/* ********************************************************* */ -/* TCP data structures */ -/* ********************************************************* */ - -struct clock_counters { - unsigned char hofs; - unsigned char d0; /* the dx's are place holders since */ - unsigned char sec; /* the TCP is addressable only on */ - unsigned char d1; /* odd addresses. */ - unsigned char min; - unsigned char d2; - unsigned char hrs; - unsigned char d3; - unsigned char dom; - unsigned char d4; - unsigned char mon; - unsigned char d5; - unsigned char yr; - unsigned char d6; - unsigned char jd0; - unsigned char d7; - unsigned char jd1; - unsigned char d8; - unsigned char dow; -}; - -extern struct clock_ram * const tcp_power_up; - -struct clock_ram { - unsigned char sec; - unsigned char d0; /* the dx's are place holders since */ - unsigned char min; /* the TCP is addressable only on */ - unsigned char d1; /* odd addresses. */ - unsigned char hrs; - unsigned char d2; - unsigned char dom; - unsigned char d3; - unsigned char mon; -}; - -extern struct clock_ram * const tcp_power_up; -extern struct clock_ram * const tcp_power_down; -extern struct clock_counters * const tcp_clock; -extern struct clock_ram * const tcp_save_ram; - -void bsp_tcp_init(void); - -#endif /* _DP8570A_H_ */ diff --git a/c/src/lib/libbsp/m68k/efi68k/include/bsp.h b/c/src/lib/libbsp/m68k/efi68k/include/bsp.h deleted file mode 100644 index 431562b44d..0000000000 --- a/c/src/lib/libbsp/m68k/efi68k/include/bsp.h +++ /dev/null @@ -1,173 +0,0 @@ -/* bsp.h - * - * This include file contains all efi68k board IO definitions. - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - * $Id$ - */ - -#ifndef __EFI68K_BSP_h -#define __EFI68K_BSP_h - -#ifdef __cplusplus -extern "C" { -#endif - -#include <bspopts.h> - -#include <rtems.h> -#include <clockdrv.h> -#include <console.h> -#include <iosupp.h> -#include <efi68k.h> -#include <16550.h> - -/* - * confdefs.h overrides for this BSP: - * - number of termios serial ports (defaults to 1) - * - Interrupt stack space is not minimum if defined. - */ - -/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */ -/* #define CONFIGURE_INTERRUPT_STACK_MEMORY (TBD * 1024) */ - -/* - * Define the time limits for RTEMS Test Suite test durations. - * Long test and short test duration limits are provided. These - * values are in seconds and need to be converted to ticks for the - * application. - * - */ - -#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */ -#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ - -/* - * Define the interrupt mechanism for Time Test 27 - */ - -/* XXX - JRS - I want to compile the tmtests */ - -#define MUST_WAIT_FOR_INTERRUPT 1 - -#define Install_tm27_vector( handler ) - -#define Cause_tm27_intr() - -#define Clear_tm27_intr() - -#define Lower_tm27_intr() - -/* - * Simple spin delay in microsecond units for device drivers. - * This is very dependent on the clock speed of the target. - */ - -#define rtems_bsp_delay( microseconds ) \ - { register rtems_unsigned32 _delay=(microseconds); \ - register rtems_unsigned32 _tmp=123; \ - asm volatile( "0: \ - nbcd %0 ; \ - nbcd %0 ; \ - dbf %1,0b" \ - : "=d" (_tmp), "=d" (_delay) \ - : "0" (_tmp), "1" (_delay) ); \ - } - -/* externals */ - -extern char _etext[]; -extern char _copy_start[]; -extern char _edata[]; -extern char _clear_start[]; -extern char end[]; -extern char _copy_data_from_rom[]; -extern char __end_of_ram[]; - -/* constants */ - -#define RAM_END ((int)__end_of_ram) - -#ifdef __START_C__ -#define STACK_SIZE "#0x800" -#else -#define STACK_SIZE 0x800 -#endif - -/* macros */ - -#define RAW_PUTS(str) \ - { register char *ptr = str; \ - while (*ptr) outbyte(*ptr++); \ - } - -#define RAW_PUTI(n) { \ - register int i, j; \ - \ - RAW_PUTS("0x"); \ - for (i=28;i>=0;i -= 4) { \ - j = (n>>i) & 0xf; \ - outbyte( (j>9 ? j-10+'a' : j+'0') ); \ - } \ - } - -/* miscellaneous stuff assumed to exist */ - -extern rtems_configuration_table BSP_Configuration; - -extern m68k_isr_entry M68Kvec[]; /* vector table address */ - -extern int stack_size; - -extern int stack_start; - -extern rtems_unsigned32 Timer_interrupts; - -/* - * Device Driver Table Entries - */ - -/* - * NOTE: Use the standard Console driver entry - */ - -/* - * NOTE: Use the standard Clock driver entry - */ - -/* functions */ - -void bsp_cleanup( void ); - -m68k_isr_entry set_vector( - rtems_isr_entry handler, - rtems_vector_number vector, - int type -); - -void console_init(void); - -void watch_dog_init(void); - -void bsp_tcp_init(void); - -void Spurious_Initialize(void); - -void _UART_flush(void); - -void Clock_exit(void); - -void outbyte(char); - -#ifdef __cplusplus -} -#endif - -#endif -/* end of include file */ diff --git a/c/src/lib/libbsp/m68k/efi68k/include/efi68k.h b/c/src/lib/libbsp/m68k/efi68k/include/efi68k.h deleted file mode 100644 index 6aa16ce3c0..0000000000 --- a/c/src/lib/libbsp/m68k/efi68k/include/efi68k.h +++ /dev/null @@ -1,34 +0,0 @@ -/* efi68k.h - * - * $Id$ - */ - -#ifndef _EFI68k_H_ -#define _EFI68k_H_ - - -/* interrupt levels */ -#define WD_ISR_LEVEL 1 -#define TCP_ISR_LEVEL 4 -#define UART_ISR_LEVEL 6 -#define INTR7 7 - - -/* macro/function definitions */ -#if 0 -/* - * This prototype really should have the noreturn attribute but - * that causes a warning since it appears that the routine does - * return. - * - * void dumby_start () __attribute__ ((noreturn)); - */ - -static void reboot(void); -__inline__ static void reboot() {asm("trap #15");} -#else -#define reboot() do {asm("trap #15");} while(0) -#endif - - -#endif /* _EFI68k_H_ */ |