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+#
+# $Id$
+#
+
+Description: efi68k
+============
+CPU: MC68HC000 @16MHz
+RAM: 256k
+ROM: 256k
+
+ Based upon a 16MHz 68HC000, efi332 is a minimally configured 4x6
+inch single board computer. It includes the following major
+components: (a) 256k SRAM (km681000l), (b) 256 EPROM (27C010),
+(c) DP8570A (clock/timer/calendar), (d) MAX791 (cpu supervisory chip
+with battery backup switch-over and watch dog timer), and
+(e) NS16550DN (UART). The following interrupt functions have also been
+incorporated: UART, TIMER, Watch Dog, and Low Line voltage (trips at
+4.85V; enough time to save the cpu reg before reset is asserted on
+power down).
+ The schematic for efi68k is freely available via e-mail. Send
+"index diy_efi" to majordomo@coulomb.eng.ohio-state.edu. Retrieve the
+files related to 68hc000-1.00 with the "get diy_efi <filename>"
+command. efi68k does not have an available printed circuit board, but
+can be wire-wrapped in about four days. Cost is about $100US.
+
+For more information, I can be contacted at the address below.
+
+
+TODO:
+=====
+- add separate interrupt stack (low priority).
+
+- add the "tm27 vector" ... can we use a trap instruction?
+
+- generate include/coverhd.c to preform the tmtest.
+
+- the interrupt drive I/O should be integrated into the RTEMS.
+
+- finish the ROM memory model.
+
+ John S Gwynne
+ Gwynne.1@osu.edu
+_______________________________________________________________________________
+ T h e O h i o - S t a t e U n i v e r s i t y
+ ElectroScience Laboratory, 1320 Kinnear Road, Columbus, Ohio 43212, USA
+ Telephone: (614) 292-7981 * Fax: (614) 292-7297
+-------------------------------------------------------------------------------
+