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Diffstat (limited to 'c/src/lib/libbsp/i960/cvme961/shmsupp')
-rw-r--r--c/src/lib/libbsp/i960/cvme961/shmsupp/addrconv.c4
-rw-r--r--c/src/lib/libbsp/i960/cvme961/shmsupp/getcfg.c10
-rw-r--r--c/src/lib/libbsp/i960/cvme961/shmsupp/lock.c4
-rw-r--r--c/src/lib/libbsp/i960/cvme961/shmsupp/mpisr.c16
4 files changed, 17 insertions, 17 deletions
diff --git a/c/src/lib/libbsp/i960/cvme961/shmsupp/addrconv.c b/c/src/lib/libbsp/i960/cvme961/shmsupp/addrconv.c
index 25c7134a06..cc54dd6b54 100644
--- a/c/src/lib/libbsp/i960/cvme961/shmsupp/addrconv.c
+++ b/c/src/lib/libbsp/i960/cvme961/shmsupp/addrconv.c
@@ -28,9 +28,9 @@ void *Shm_Convert_address(
void *address
)
{
- rtems_unsigned32 workaddr = (rtems_unsigned32) address;
+ uint32_t workaddr = (uint32_t) address;
if ( workaddr >= 0xffff0000 )
workaddr = (workaddr & 0xffff) | 0xb4000000;
- return ( (rtems_unsigned32 *)workaddr );
+ return ( (uint32_t*)workaddr );
}
diff --git a/c/src/lib/libbsp/i960/cvme961/shmsupp/getcfg.c b/c/src/lib/libbsp/i960/cvme961/shmsupp/getcfg.c
index 2fac8e1567..6be8343522 100644
--- a/c/src/lib/libbsp/i960/cvme961/shmsupp/getcfg.c
+++ b/c/src/lib/libbsp/i960/cvme961/shmsupp/getcfg.c
@@ -54,17 +54,17 @@
shm_config_table BSP_shm_cfgtbl;
void Shm_Get_configuration(
- rtems_unsigned32 localnode,
+ uint32_t localnode,
shm_config_table **shmcfg
)
{
#if ( USE_ONBOARD_RAM == 1 )
if ( Shm_RTEMS_MP_Configuration->node == MASTER )
- BSP_shm_cfgtbl.base = (rtems_unsigned32 *)0x00300000;
+ BSP_shm_cfgtbl.base = (uint32_t*)0x00300000;
else
- BSP_shm_cfgtbl.base = (rtems_unsigned32 *)0x10300000;
+ BSP_shm_cfgtbl.base = (uint32_t*)0x10300000;
#else
- BSP_shm_cfgtbl.base = (rtems_unsigned32 *)0x20000000;
+ BSP_shm_cfgtbl.base = (uint32_t*)0x20000000;
#endif
BSP_shm_cfgtbl.length = 1 * MEGABYTE;
@@ -86,7 +86,7 @@ void Shm_Get_configuration(
#else
BSP_shm_cfgtbl.poll_intr = INTR_MODE;
BSP_shm_cfgtbl.Intr.address =
- (rtems_unsigned32 *) (0xffff0021|((localnode-1) << 12));
+ (uint32_t*) (0xffff0021|((localnode-1) << 12));
/* use ICMS0 */
BSP_shm_cfgtbl.Intr.value = 1;
BSP_shm_cfgtbl.Intr.length = BYTE;
diff --git a/c/src/lib/libbsp/i960/cvme961/shmsupp/lock.c b/c/src/lib/libbsp/i960/cvme961/shmsupp/lock.c
index 5e2d65815f..e1b3f3e55c 100644
--- a/c/src/lib/libbsp/i960/cvme961/shmsupp/lock.c
+++ b/c/src/lib/libbsp/i960/cvme961/shmsupp/lock.c
@@ -44,7 +44,7 @@ void Shm_Lock(
Shm_Locked_queue_Control *lq_cb
)
{
- rtems_unsigned32 isr_level, oldlock;
+ uint32_t isr_level, oldlock;
rtems_interrupt_disable( isr_level );
Shm_isrstat = isr_level;
@@ -66,7 +66,7 @@ void Shm_Unlock(
Shm_Locked_queue_Control *lq_cb
)
{
- rtems_unsigned32 isr_level;
+ uint32_t isr_level;
lq_cb->lock = SHM_UNLOCK_VALUE;
isr_level = Shm_isrstat;
diff --git a/c/src/lib/libbsp/i960/cvme961/shmsupp/mpisr.c b/c/src/lib/libbsp/i960/cvme961/shmsupp/mpisr.c
index b5f1687f48..235a375d38 100644
--- a/c/src/lib/libbsp/i960/cvme961/shmsupp/mpisr.c
+++ b/c/src/lib/libbsp/i960/cvme961/shmsupp/mpisr.c
@@ -25,15 +25,15 @@ rtems_isr Shm_isr_cvme961(
rtems_vector_number vector
)
{
- rtems_unsigned32 vic_vector;
+ uint32_t vic_vector;
/* enable_tracing(); */
- vic_vector = (*(volatile rtems_unsigned8 *)0xb6000007);
+ vic_vector = (*(volatile uint8_t*)0xb6000007);
/* reset intr by reading */
/* vector at IPL=3 */
Shm_Interrupt_count += 1;
rtems_multiprocessing_announce();
- (*(volatile rtems_unsigned8 *)0xa000005f) = 0; /* clear ICMS0 */
+ (*(volatile uint8_t*)0xa000005f) = 0; /* clear ICMS0 */
i960_clear_intr( 6 );
}
@@ -52,18 +52,18 @@ rtems_isr Shm_isr_cvme961(
void Shm_setvec()
{
- rtems_unsigned32 isrlevel;
+ uint32_t isrlevel;
rtems_interrupt_disable( isrlevel );
/* set SQSIO4 CTL REG for */
/* VME slave address */
- (*(rtems_unsigned8 *)0xc00000b0) =
+ (*(uint8_t*)0xc00000b0) =
(Shm_RTEMS_MP_Configuration->node - 1) | 0x10;
set_vector( Shm_isr_cvme961, 6, 1 );
/* set ICMS Bector Base Register */
- (*(rtems_unsigned8 *)0xa0000053) = 0x60; /* XINT6 vector is 0x62 */
+ (*(uint8_t*)0xa0000053) = 0x60; /* XINT6 vector is 0x62 */
/* set ICMS Intr Control Reg */
- (*(rtems_unsigned8 *)0xa0000047) = 0xeb; /* ICMS0 enabled, IPL=0 */
- (*(rtems_unsigned8 *)0xa000005f) = 0; /* clear ICMS0 */
+ (*(uint8_t*)0xa0000047) = 0xeb; /* ICMS0 enabled, IPL=0 */
+ (*(uint8_t*)0xa000005f) = 0; /* clear ICMS0 */
rtems_interrupt_enable( isrlevel );
}