diff options
Diffstat (limited to 'c/src/lib/libbsp/i386/force386/shmsupp')
| -rw-r--r-- | c/src/lib/libbsp/i386/force386/shmsupp/addrconv.c | 32 | ||||
| -rw-r--r-- | c/src/lib/libbsp/i386/force386/shmsupp/getcfg.c | 73 | ||||
| -rw-r--r-- | c/src/lib/libbsp/i386/force386/shmsupp/lock.c | 83 | ||||
| -rw-r--r-- | c/src/lib/libbsp/i386/force386/shmsupp/mpisr.c | 31 |
4 files changed, 219 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/i386/force386/shmsupp/addrconv.c b/c/src/lib/libbsp/i386/force386/shmsupp/addrconv.c new file mode 100644 index 0000000000..49d27200a0 --- /dev/null +++ b/c/src/lib/libbsp/i386/force386/shmsupp/addrconv.c @@ -0,0 +1,32 @@ +/* Shm_Convert_address + * + * The CPU386 has a "normal" view of the VME address space. + * No address range conversion is required. + * + * Input parameters: + * address - address to convert + * + * Output parameters: + * returns - converted address + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <shm.h> + +void *Shm_Convert_address( + void *address +) +{ + return ( address ); +} diff --git a/c/src/lib/libbsp/i386/force386/shmsupp/getcfg.c b/c/src/lib/libbsp/i386/force386/shmsupp/getcfg.c new file mode 100644 index 0000000000..8a05cdf641 --- /dev/null +++ b/c/src/lib/libbsp/i386/force386/shmsupp/getcfg.c @@ -0,0 +1,73 @@ +/* void Shm_Get_configuration( localnode, &shmcfg ) + * + * This routine initializes, if necessary, and returns a pointer + * to the Shared Memory Configuration Table for the FORCE CPU-386 + * + * INPUT PARAMETERS: + * localnode - local node number + * shmcfg - address of pointer to SHM Config Table + * + * OUTPUT PARAMETERS: + * *shmcfg - pointer to SHM Config Table + * + * NOTES: The FORCE CPU-386 does not have an interprocessor interrupt. + * + * The following table illustrates the configuration limitations: + * + * BUS MAX + * MODE ENDIAN NODES + * ========= ====== ======= + * POLLED BIG 2+ + * INTERRUPT **** NOT SUPPORTED **** + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <shm.h> +#include <bsp.h> + +#define INTERRUPT 0 +#define POLLING 1 /* FORCE CPU-386 target is polling ONLY!!! */ + + +shm_config_table BSP_shm_cfgtbl; + +void Shm_Get_configuration( + rtems_unsigned32 localnode, + shm_config_table **shmcfg +) +{ + set_segment( get_ds(), 0x00002000, 0xffffd000 ); + + BSP_shm_cfgtbl.base = i386_Physical_to_logical( + get_ds(), + (void *) 0x20000000 + ); + + BSP_shm_cfgtbl.length = 1 * MEGABYTE; + BSP_shm_cfgtbl.format = SHM_BIG; + + BSP_shm_cfgtbl.cause_intr = Shm_Cause_interrupt; + +#ifdef NEUTRAL_BIG + BSP_shm_cfgtbl.convert = NULL_CONVERT; +#else + BSP_shm_cfgtbl.convert = CPU_swap_u32; +#endif + + BSP_shm_cfgtbl.poll_intr = POLLED_MODE; + BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT; + BSP_shm_cfgtbl.Intr.value = NO_INTERRUPT; + BSP_shm_cfgtbl.Intr.length = NO_INTERRUPT; + + *shmcfg = &BSP_shm_cfgtbl; +} diff --git a/c/src/lib/libbsp/i386/force386/shmsupp/lock.c b/c/src/lib/libbsp/i386/force386/shmsupp/lock.c new file mode 100644 index 0000000000..7e1b7874d1 --- /dev/null +++ b/c/src/lib/libbsp/i386/force386/shmsupp/lock.c @@ -0,0 +1,83 @@ +/* Shared Memory Lock Routines + * + * This shared memory locked queue support routine need to be + * able to lock the specified locked queue. Interrupts are + * disabled while the queue is locked to prevent preemption + * and deadlock when two tasks poll for the same lock. + * previous level. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <shm.h> + +/* + * Shm_Initialize_lock + * + * Initialize the lock for the specified locked queue. + */ + +void Shm_Initialize_lock( + Shm_Locked_queue_Control *lq_cb +) +{ + lq_cb->lock = LQ_UNLOCKED; +} + +/* void _Shm_Lock( &lq_cb ) + * + * This shared memory locked queue support routine locks the + * specified locked queue. It disables interrupts to prevent + * a deadlock condition. + */ + +void Shm_Lock( + Shm_Locked_queue_Control *lq_cb +) +{ + rtems_unsigned32 isr_level; + volatile rtems_unsigned32 *lockptr = &lq_cb->lock; + rtems_unsigned32 lock_value; + + lock_value = SHM_LOCK_VALUE; + rtems_interrupt_disable( isr_level ); + + Shm_isrstat = isr_level; + while ( 1 ) { + asm volatile( "lock ; xchg (%0),%1" + : "=r" (lockptr), "=r" (lock_value) + : "0" (lockptr), "1" (lock_value) + ); + if ( lock_value == SHM_UNLOCK_VALUE ) + break; + delay( 10 ); /* approximately 10 microseconds */ + } +} + +/* + * Shm_Unlock + * + * Unlock the lock for the specified locked queue. + */ + +void Shm_Unlock( + Shm_Locked_queue_Control *lq_cb +) +{ + rtems_unsigned32 isr_level; + + lq_cb->lock = SHM_UNLOCK_VALUE; + isr_level = Shm_isrstat; + rtems_interrupt_enable( isr_level ); +} + diff --git a/c/src/lib/libbsp/i386/force386/shmsupp/mpisr.c b/c/src/lib/libbsp/i386/force386/shmsupp/mpisr.c new file mode 100644 index 0000000000..dc6f8433e6 --- /dev/null +++ b/c/src/lib/libbsp/i386/force386/shmsupp/mpisr.c @@ -0,0 +1,31 @@ +/* Shm_setvec + * + * This driver routine sets the SHM interrupt vector to point to the + * driver's SHM interrupt service routine. + * + * NOTE: This routine is not used by the FORCE CPU-386 because it + * only supports polling mode. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <shm.h> + +void Shm_setvec() +{ + /* NOT USED ON FORCE CPU-386!!! */ +} |