1 files changed, 67 insertions, 67 deletions
diff --git a/c/src/lib/libbsp/arm/edb7312/include/ep7312.h b/c/src/lib/libbsp/arm/edb7312/include/ep7312.h
index c81c4ce46f..b2e0b9f806 100644
--- a/c/src/lib/libbsp/arm/edb7312/include/ep7312.h
+++ b/c/src/lib/libbsp/arm/edb7312/include/ep7312.h
@@ -23,73 +23,73 @@
 
 #define EP7312_REG_BASE 0x80000000
 
-#define EP7312_PADR    ((volatile unsigned8  *)(EP7312_REG_BASE + 0x0000))
-#define EP7312_PBDR    ((volatile unsigned8  *)(EP7312_REG_BASE + 0x0001))
-#define EP7312_PDDR    ((volatile unsigned8  *)(EP7312_REG_BASE + 0x0003))
-#define EP7312_PADDR   ((volatile unsigned8  *)(EP7312_REG_BASE + 0x0040))
-#define EP7312_PBDDR   ((volatile unsigned8  *)(EP7312_REG_BASE + 0x0041))
-#define EP7312_PDDDR   ((volatile unsigned8  *)(EP7312_REG_BASE + 0x0043))
-#define EP7312_PEDR    ((volatile unsigned8  *)(EP7312_REG_BASE + 0x0080))
-#define EP7312_PEDDR   ((volatile unsigned8  *)(EP7312_REG_BASE + 0x00C0))
-#define EP7312_SYSCON1 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0100))
-#define EP7312_SYSFLG1 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0140))
-#define EP7312_MEMCFG1 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0180))
-#define EP7312_MEMCFG2 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x01C0))
-#define EP7312_INTSR1  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0240))
-#define EP7312_INTMR1  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0280))
-#define EP7312_LCDCON  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x02C0))
-#define EP7312_TC1D    ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0300))
-#define EP7312_TC2D    ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0340))
-#define EP7312_RTCDR   ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0380))
-#define EP7312_RTCMR   ((volatile unsigned32 *)(EP7312_REG_BASE + 0x03C0))
-#define EP7312_PMPCON  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0400))
-#define EP7312_CODR    ((volatile unsigned8  *)(EP7312_REG_BASE + 0x0440))
-#define EP7312_UARTDR1 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0480))
-#define EP7312_UARTCR1 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x04C0))
-#define EP7312_SYNCIO  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0500))
-#define EP7312_PALLSW  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0540))
-#define EP7312_PALMSW  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0580))
-#define EP7312_STFCLR  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x05C0))
-#define EP7312_BLEOI   ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0600))
-#define EP7312_MCEOI   ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0640))
-#define EP7312_TEOI    ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0680))
-#define EP7312_TC1EOI  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x06C0))
-#define EP7312_TC2EOI  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0700))
-#define EP7312_RTCEOI  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0740))
-#define EP7312_UMSEOI  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0780))
-#define EP7312_COEOI   ((volatile unsigned32 *)(EP7312_REG_BASE + 0x07C0))
-#define EP7312_HALT    ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0800))
-#define EP7312_STDBY   ((volatile unsigned32 *)(EP7312_REG_BASE + 0x0840))
-#define EP7312_FBADDR  ((volatile unsigned8  *)(EP7312_REG_BASE + 0x1000))
-#define EP7312_SYSCON2 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x1100))
-#define EP7312_SYSFLG2 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x1140))
-#define EP7312_INTSR2  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x1240))
-#define EP7312_INTMR2  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x1280))
-#define EP7312_UARTDR2 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x1480))
-#define EP7312_UARTCR2 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x14C0))
-#define EP7312_SS2DR   ((volatile unsigned32 *)(EP7312_REG_BASE + 0x1500))
-#define EP7312_SRXEOF  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x1600))
-#define EP7312_SS2POP  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x16C0))
-#define EP7312_KBDEOI  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x1700))
-#define EP7312_DAIR    ((volatile unsigned32 *)(EP7312_REG_BASE + 0x2000))
-#define EP7312_DAIDR0  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x2040))
-#define EP7312_DAIDR1  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x2080))
-#define EP7312_DAIDR2  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x20C0))
-#define EP7312_DAISR   ((volatile unsigned32 *)(EP7312_REG_BASE + 0x2100))
-#define EP7312_SYSCON3 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x2200))
-#define EP7312_INTSR3  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x2240))
-#define EP7312_INTMR3  ((volatile unsigned8  *)(EP7312_REG_BASE + 0x2280))
-#define EP7312_LEDFLSH ((volatile unsigned8  *)(EP7312_REG_BASE + 0x22C0))
-#define EP7312_SDCONF  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x2300))
-#define EP7312_SDRFPR  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x2340))
-#define EP7312_UNIQID  ((volatile unsigned32 *)(EP7312_REG_BASE + 0x2440))
-#define EP7312_DAI64Fs ((volatile unsigned32 *)(EP7312_REG_BASE + 0x2600))
-#define EP7312_PLLW    ((volatile unsigned8  *)(EP7312_REG_BASE + 0x2610))
-#define EP7312_PLLR    ((volatile unsigned8  *)(EP7312_REG_BASE + 0xA5A8))
-#define EP7312_RANDID0 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x2700))
-#define EP7312_RANDID1 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x2704))
-#define EP7312_RANDID2 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x2708))
-#define EP7312_RANDID3 ((volatile unsigned32 *)(EP7312_REG_BASE + 0x270C))
+#define EP7312_PADR    ((volatile uint8_t*)(EP7312_REG_BASE + 0x0000))
+#define EP7312_PBDR    ((volatile uint8_t*)(EP7312_REG_BASE + 0x0001))
+#define EP7312_PDDR    ((volatile uint8_t*)(EP7312_REG_BASE + 0x0003))
+#define EP7312_PADDR   ((volatile uint8_t*)(EP7312_REG_BASE + 0x0040))
+#define EP7312_PBDDR   ((volatile uint8_t*)(EP7312_REG_BASE + 0x0041))
+#define EP7312_PDDDR   ((volatile uint8_t*)(EP7312_REG_BASE + 0x0043))
+#define EP7312_PEDR    ((volatile uint8_t*)(EP7312_REG_BASE + 0x0080))
+#define EP7312_PEDDR   ((volatile uint8_t*)(EP7312_REG_BASE + 0x00C0))
+#define EP7312_SYSCON1 ((volatile uint32_t*)(EP7312_REG_BASE + 0x0100))
+#define EP7312_SYSFLG1 ((volatile uint32_t*)(EP7312_REG_BASE + 0x0140))
+#define EP7312_MEMCFG1 ((volatile uint32_t*)(EP7312_REG_BASE + 0x0180))
+#define EP7312_MEMCFG2 ((volatile uint32_t*)(EP7312_REG_BASE + 0x01C0))
+#define EP7312_INTSR1  ((volatile uint32_t*)(EP7312_REG_BASE + 0x0240))
+#define EP7312_INTMR1  ((volatile uint32_t*)(EP7312_REG_BASE + 0x0280))
+#define EP7312_LCDCON  ((volatile uint32_t*)(EP7312_REG_BASE + 0x02C0))
+#define EP7312_TC1D    ((volatile uint32_t*)(EP7312_REG_BASE + 0x0300))
+#define EP7312_TC2D    ((volatile uint32_t*)(EP7312_REG_BASE + 0x0340))
+#define EP7312_RTCDR   ((volatile uint32_t*)(EP7312_REG_BASE + 0x0380))
+#define EP7312_RTCMR   ((volatile uint32_t*)(EP7312_REG_BASE + 0x03C0))
+#define EP7312_PMPCON  ((volatile uint32_t*)(EP7312_REG_BASE + 0x0400))
+#define EP7312_CODR    ((volatile uint8_t*)(EP7312_REG_BASE + 0x0440))
+#define EP7312_UARTDR1 ((volatile uint32_t*)(EP7312_REG_BASE + 0x0480))
+#define EP7312_UARTCR1 ((volatile uint32_t*)(EP7312_REG_BASE + 0x04C0))
+#define EP7312_SYNCIO  ((volatile uint32_t*)(EP7312_REG_BASE + 0x0500))
+#define EP7312_PALLSW  ((volatile uint32_t*)(EP7312_REG_BASE + 0x0540))
+#define EP7312_PALMSW  ((volatile uint32_t*)(EP7312_REG_BASE + 0x0580))
+#define EP7312_STFCLR  ((volatile uint32_t*)(EP7312_REG_BASE + 0x05C0))
+#define EP7312_BLEOI   ((volatile uint32_t*)(EP7312_REG_BASE + 0x0600))
+#define EP7312_MCEOI   ((volatile uint32_t*)(EP7312_REG_BASE + 0x0640))
+#define EP7312_TEOI    ((volatile uint32_t*)(EP7312_REG_BASE + 0x0680))
+#define EP7312_TC1EOI  ((volatile uint32_t*)(EP7312_REG_BASE + 0x06C0))
+#define EP7312_TC2EOI  ((volatile uint32_t*)(EP7312_REG_BASE + 0x0700))
+#define EP7312_RTCEOI  ((volatile uint32_t*)(EP7312_REG_BASE + 0x0740))
+#define EP7312_UMSEOI  ((volatile uint32_t*)(EP7312_REG_BASE + 0x0780))
+#define EP7312_COEOI   ((volatile uint32_t*)(EP7312_REG_BASE + 0x07C0))
+#define EP7312_HALT    ((volatile uint32_t*)(EP7312_REG_BASE + 0x0800))
+#define EP7312_STDBY   ((volatile uint32_t*)(EP7312_REG_BASE + 0x0840))
+#define EP7312_FBADDR  ((volatile uint8_t*)(EP7312_REG_BASE + 0x1000))
+#define EP7312_SYSCON2 ((volatile uint32_t*)(EP7312_REG_BASE + 0x1100))
+#define EP7312_SYSFLG2 ((volatile uint32_t*)(EP7312_REG_BASE + 0x1140))
+#define EP7312_INTSR2  ((volatile uint32_t*)(EP7312_REG_BASE + 0x1240))
+#define EP7312_INTMR2  ((volatile uint32_t*)(EP7312_REG_BASE + 0x1280))
+#define EP7312_UARTDR2 ((volatile uint32_t*)(EP7312_REG_BASE + 0x1480))
+#define EP7312_UARTCR2 ((volatile uint32_t*)(EP7312_REG_BASE + 0x14C0))
+#define EP7312_SS2DR   ((volatile uint32_t*)(EP7312_REG_BASE + 0x1500))
+#define EP7312_SRXEOF  ((volatile uint32_t*)(EP7312_REG_BASE + 0x1600))
+#define EP7312_SS2POP  ((volatile uint32_t*)(EP7312_REG_BASE + 0x16C0))
+#define EP7312_KBDEOI  ((volatile uint32_t*)(EP7312_REG_BASE + 0x1700))
+#define EP7312_DAIR    ((volatile uint32_t*)(EP7312_REG_BASE + 0x2000))
+#define EP7312_DAIDR0  ((volatile uint32_t*)(EP7312_REG_BASE + 0x2040))
+#define EP7312_DAIDR1  ((volatile uint32_t*)(EP7312_REG_BASE + 0x2080))
+#define EP7312_DAIDR2  ((volatile uint32_t*)(EP7312_REG_BASE + 0x20C0))
+#define EP7312_DAISR   ((volatile uint32_t*)(EP7312_REG_BASE + 0x2100))
+#define EP7312_SYSCON3 ((volatile uint32_t*)(EP7312_REG_BASE + 0x2200))
+#define EP7312_INTSR3  ((volatile uint32_t*)(EP7312_REG_BASE + 0x2240))
+#define EP7312_INTMR3  ((volatile uint8_t*)(EP7312_REG_BASE + 0x2280))
+#define EP7312_LEDFLSH ((volatile uint8_t*)(EP7312_REG_BASE + 0x22C0))
+#define EP7312_SDCONF  ((volatile uint32_t*)(EP7312_REG_BASE + 0x2300))
+#define EP7312_SDRFPR  ((volatile uint32_t*)(EP7312_REG_BASE + 0x2340))
+#define EP7312_UNIQID  ((volatile uint32_t*)(EP7312_REG_BASE + 0x2440))
+#define EP7312_DAI64Fs ((volatile uint32_t*)(EP7312_REG_BASE + 0x2600))
+#define EP7312_PLLW    ((volatile uint8_t*)(EP7312_REG_BASE + 0x2610))
+#define EP7312_PLLR    ((volatile uint8_t*)(EP7312_REG_BASE + 0xA5A8))
+#define EP7312_RANDID0 ((volatile uint32_t*)(EP7312_REG_BASE + 0x2700))
+#define EP7312_RANDID1 ((volatile uint32_t*)(EP7312_REG_BASE + 0x2704))
+#define EP7312_RANDID2 ((volatile uint32_t*)(EP7312_REG_BASE + 0x2708))
+#define EP7312_RANDID3 ((volatile uint32_t*)(EP7312_REG_BASE + 0x270C))
 
 /* serial port bits */
 /* BITS in UBRLCR1 */