diff options
Diffstat (limited to 'c/src/lib/libbsp/arm/csb337/startup/bspstart.c')
| -rw-r--r-- | c/src/lib/libbsp/arm/csb337/startup/bspstart.c | 85 |
1 files changed, 79 insertions, 6 deletions
diff --git a/c/src/lib/libbsp/arm/csb337/startup/bspstart.c b/c/src/lib/libbsp/arm/csb337/startup/bspstart.c index 7566e32e85..5857d04429 100644 --- a/c/src/lib/libbsp/arm/csb337/startup/bspstart.c +++ b/c/src/lib/libbsp/arm/csb337/startup/bspstart.c @@ -1,26 +1,33 @@ /* - * Cogent CSB337 - AT91RM9200 Startup code + * Cogent CSB337 - AT91RM9200 Startup Code * - * Copyright (c) 2004 by Cogent Computer Systems - * Written by Jay Monkman <jtm@lopingdog.com> + * Copyright (c) 2004 by Cogent Computer Systems + * Written by Jay Monkman <jtm@lopingdog.com> * + * Modified by Joel Sherill + * from OAR Corporation and + * Fernando Nicodemos <fgnicodemos@terra.com.br> + * from NCB - Sistemas Embarcados Ltda. (Brazil) + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at - * * http://www.rtems.com/license/LICENSE. * - * * $Id$ -*/ + */ + #include <bsp.h> #include <at91rm9200.h> #include <at91rm9200_pmc.h> #include <at91rm9200_emac.h> +#include <at91rm9200_gpio.h> +#include <at91rm9200_usart.h> /* Function prototypes */ extern void rtems_irq_mngt_init(void); void bsp_libc_init( void *, uint32_t, int ); static void fix_mac_addr(void); +void bsp_usart_init(void); /* * bsp_start_default - BSP initialization function @@ -45,6 +52,11 @@ void bsp_start_default( void ) fix_mac_addr(); /* + * Init rtems PIO configuration for USARTs + */ + bsp_usart_init(); + + /* * Init rtems exceptions management */ rtems_exception_init_mngt(); @@ -85,6 +97,67 @@ static void fix_mac_addr(void) } } +/* + * + * NAME: bsp_usart_init - Function to setup the PIO in USART mode + * before startup + * + * DESCRIPTION: + * This function is called before usart driver is initialized and is + * used to setup the proper mode of PIO operation for USART. + * + * NOTES: + * The initialization could be done smarter by programming only the + * bits you need to program for each USART when the port is ENABLED. + * + */ +void bsp_usart_init(void) +{ + /* + * Configure shared pins for USARTs. + * Disables the PIO from controlling the corresponding pin. + */ + PIOA_REG(PIO_PDR) |= ( BIT5 | /* USART3 TXD3 */ + BIT6 | /* USART3 RXD3 */ + BIT17 | /* USART0 TXD0 */ + BIT18 | /* USART0 RXD0 */ + BIT22 | /* USART2 RXD2 */ + BIT23 ); /* USART2 TXD2 */ + + PIOB_REG(PIO_PDR) |= ( BIT20 | /* USART1 TXD1 */ + BIT21 ); /* USART1 RXD1 */ + + /**** PIO Controller A - Pins you want in mode B ****/ + PIOA_REG(PIO_BSR) |= ( BIT5 | /* USART3 TXD3 */ /* add */ + BIT6 ); /* USART3 RXD3 */ + PIOA_REG(PIO_ASR) &= ~( BIT5 | /* USART3 TXD3 */ + BIT6 ); /* USART3 RXD3 */ + + /**** PIO Controller A - Pins you want in mode A ****/ + PIOA_REG(PIO_ASR) |= ( BIT17 | /* USART0 TXD0 */ + BIT18 | /* USART0 RXD0 */ + BIT22 | /* USART2 RXD2 */ + BIT23 ); /* USART2 TXD2 */ + PIOA_REG(PIO_BSR) &= ~( BIT17 | /* USART0 TXD0 */ /* add */ + BIT18 | /* USART0 RXD0 */ + BIT22 | /* USART2 RXD2 */ + BIT23 ); /* USART2 TXD2 */ + + /**** PIO Controller B - Pins you want in mode A ****/ + PIOB_REG(PIO_ASR) |= ( BIT20 | /* USART1 TXD1 */ + BIT21 ); /* USART1 RXD1 */ + PIOB_REG(PIO_BSR) &= ~( BIT20 | /* USART1 TXD1 */ + BIT21 ); /* USART1 RXD1 */ + + /**** PIO Controller B - Pins you want in mode B ****/ + /**** none ****/ + + /* Enable the clock to the USARTs */ + PMC_REG(PMC_PCER) |= ( PMC_PCR_PID_US0 | /* USART 0 Peripheral Clock */ + PMC_PCR_PID_US1 | /* USART 1 Peripheral Clock */ + PMC_PCR_PID_US2 | /* USART 2 Peripheral Clock */ + PMC_PCR_PID_US3 ); /* USART 3 Peripheral Clock */ +} /* * By making this a weak alias for bsp_start_default, a brave soul |