diff options
Diffstat (limited to 'c/src/lib/libbsp/arm/beagle/include')
| -rw-r--r-- | c/src/lib/libbsp/arm/beagle/include/beagle-clock-config.h | 58 | ||||
| -rw-r--r-- | c/src/lib/libbsp/arm/beagle/include/beagle-timer.h | 159 | ||||
| -rw-r--r-- | c/src/lib/libbsp/arm/beagle/include/beagle.h | 760 | ||||
| -rw-r--r-- | c/src/lib/libbsp/arm/beagle/include/boot.h | 117 | ||||
| -rw-r--r-- | c/src/lib/libbsp/arm/beagle/include/bsp.h | 455 | ||||
| -rw-r--r-- | c/src/lib/libbsp/arm/beagle/include/i2c.h | 89 | ||||
| -rw-r--r-- | c/src/lib/libbsp/arm/beagle/include/irq.h | 184 |
7 files changed, 282 insertions, 1540 deletions
diff --git a/c/src/lib/libbsp/arm/beagle/include/beagle-clock-config.h b/c/src/lib/libbsp/arm/beagle/include/beagle-clock-config.h deleted file mode 100644 index 18a1d86f75..0000000000 --- a/c/src/lib/libbsp/arm/beagle/include/beagle-clock-config.h +++ /dev/null @@ -1,58 +0,0 @@ -/** - * @file - * - * @ingroup beagle_clock - * - * @brief Clock driver configuration. - */ - -/* - * Copyright (c) 2012 Claas Ziemke. All rights reserved. - * - * Claas Ziemke - * Kernerstrasse 11 - * 70182 Stuttgart - * Germany - * <claas.ziemke@gmx.net> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_BEAGLE_BEAGLE_CLOCK_CONFIG_H -#define LIBBSP_ARM_BEAGLE_BEAGLE_CLOCK_CONFIG_H - -#include <bsp.h> -#include <bsp/irq.h> -#include <bsp/beagle.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup beagle_clock Clock Support - * - * @ingroup beagle - * - * @brief Clock support. - * - * @{ - */ - -#define BEAGLE_CLOCK_INTERRUPT BEAGLE_IRQ_TIMER_0 - -#define BEAGLE_CLOCK_TIMER_BASE BEAGLE_BASE_TIMER_0 - -#define BEAGLE_CLOCK_REFERENCE BEAGLE_PERIPH_CLK - -#define BEAGLE_CLOCK_MODULE_ENABLE() - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_BEAGLE_BEAGLE_CLOCK_CONFIG_H */ diff --git a/c/src/lib/libbsp/arm/beagle/include/beagle-timer.h b/c/src/lib/libbsp/arm/beagle/include/beagle-timer.h deleted file mode 100644 index d053160b0d..0000000000 --- a/c/src/lib/libbsp/arm/beagle/include/beagle-timer.h +++ /dev/null @@ -1,159 +0,0 @@ -/** - * @file - * - * @ingroup beagle_timer - * - * @brief Timer API. - */ - -/* - * Copyright (c) 2012 Claas Ziemke. All rights reserved. - * - * Claas Ziemke - * Kernerstrasse 11 - * 70182 Stuttgart - * Germany - * <claas.ziemke@gmx.net> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_SHARED_BEAGLE_TIMER_H -#define LIBBSP_ARM_SHARED_BEAGLE_TIMER_H - -#include <stdint.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup beagle_timer Timer Support - * - * @ingroup beagle - * - * @brief Timer support. - * - * @{ - */ - -/** - * @name Interrupt Register Defines - * - * @{ - */ - -#define BEAGLE_TIMER_IR_MR0 0x1U -#define BEAGLE_TIMER_IR_MR1 0x2U -#define BEAGLE_TIMER_IR_MR2 0x4U -#define BEAGLE_TIMER_IR_MR3 0x8U -#define BEAGLE_TIMER_IR_CR0 0x10U -#define BEAGLE_TIMER_IR_CR1 0x20U -#define BEAGLE_TIMER_IR_CR2 0x40U -#define BEAGLE_TIMER_IR_CR3 0x80U -#define BEAGLE_TIMER_IR_ALL 0xffU - -/** @} */ - -/** - * @name Timer Control Register Defines - * - * @{ - */ - -#define BEAGLE_TIMER_TCR_EN 0x1U -#define BEAGLE_TIMER_TCR_RST 0x2U - -/** @} */ - -/** - * @name Match Control Register Defines - * - * @{ - */ - -#define BEAGLE_TIMER_MCR_MR0_INTR 0x1U -#define BEAGLE_TIMER_MCR_MR0_RST 0x2U -#define BEAGLE_TIMER_MCR_MR0_STOP 0x4U -#define BEAGLE_TIMER_MCR_MR1_INTR 0x8U -#define BEAGLE_TIMER_MCR_MR1_RST 0x10U -#define BEAGLE_TIMER_MCR_MR1_STOP 0x20U -#define BEAGLE_TIMER_MCR_MR2_INTR 0x40U -#define BEAGLE_TIMER_MCR_MR2_RST 0x80U -#define BEAGLE_TIMER_MCR_MR2_STOP 0x100U -#define BEAGLE_TIMER_MCR_MR3_INTR 0x200U -#define BEAGLE_TIMER_MCR_MR3_RST 0x400U -#define BEAGLE_TIMER_MCR_MR3_STOP 0x800U - -/** @} */ - -/** - * @name Capture Control Register Defines - * - * @{ - */ - -#define BEAGLE_TIMER_CCR_CAP0_RE 0x1U -#define BEAGLE_TIMER_CCR_CAP0_FE 0x2U -#define BEAGLE_TIMER_CCR_CAP0_INTR 0x4U -#define BEAGLE_TIMER_CCR_CAP1_RE 0x8U -#define BEAGLE_TIMER_CCR_CAP1_FE 0x10U -#define BEAGLE_TIMER_CCR_CAP1_INTR 0x20U -#define BEAGLE_TIMER_CCR_CAP2_RE 0x40U -#define BEAGLE_TIMER_CCR_CAP2_FE 0x80U -#define BEAGLE_TIMER_CCR_CAP2_INTR 0x100U -#define BEAGLE_TIMER_CCR_CAP3_RE 0x200U -#define BEAGLE_TIMER_CCR_CAP3_FE 0x400U -#define BEAGLE_TIMER_CCR_CAP3_INTR 0x800U - -/** @} */ - -/** - * @name External Match Register Defines - * - * @{ - */ - -#define BEAGLE_TIMER_EMR_EM0_RE 0x1U -#define BEAGLE_TIMER_EMR_EM1_FE 0x2U -#define BEAGLE_TIMER_EMR_EM2_INTR 0x4U -#define BEAGLE_TIMER_EMR_EM3_RE 0x8U -#define BEAGLE_TIMER_EMR_EMC0_FE 0x10U -#define BEAGLE_TIMER_EMR_EMC1_INTR 0x20U -#define BEAGLE_TIMER_EMR_EMC2_RE 0x40U -#define BEAGLE_TIMER_EMR_EMC3_FE 0x80U - -/** @} */ - -/** - * @brief Timer control block. - */ -typedef struct { - uint32_t ir; - uint32_t tcr; - uint32_t tc; - uint32_t pr; - uint32_t pc; - uint32_t mcr; - uint32_t mr0; - uint32_t mr1; - uint32_t mr2; - uint32_t mr3; - uint32_t ccr; - uint32_t cr0; - uint32_t cr1; - uint32_t cr2; - uint32_t cr3; - uint32_t emr; - uint32_t ctcr; -} beagle_timer; - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_SHARED_BEAGLE_TIMER_H */ diff --git a/c/src/lib/libbsp/arm/beagle/include/beagle.h b/c/src/lib/libbsp/arm/beagle/include/beagle.h deleted file mode 100644 index fb12211ccb..0000000000 --- a/c/src/lib/libbsp/arm/beagle/include/beagle.h +++ /dev/null @@ -1,760 +0,0 @@ -/** - * @file - * - * @ingroup beagle_reg - * - * @brief Register base addresses. - */ - -/* - * Copyright (c) 2012 Claas Ziemke. All rights reserved. - * - * Claas Ziemke - * Kernerstrasse 11 - * 70182 Stuttgart - * Germany - * <claas.ziemke@gmx.net> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_BEAGLE_BEAGLE_H -#define LIBBSP_ARM_BEAGLE_BEAGLE_H - -#include <stdint.h> - -#include <bsp/beagle-timer.h> - -#define __arch_getb(a) (*(volatile unsigned char *)(a)) -#define __arch_getw(a) (*(volatile unsigned short *)(a)) -#define __arch_getl(a) (*(volatile unsigned int *)(a)) - -#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) -#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) -/* - * TODO: do we need a barrier here? - */ - -#define writeb(v,c) ({ unsigned char __v = v; __arch_putb(__v,c); __v; }) -#define writew(v,c) ({ unsigned short __v = v; __arch_putw(__v,c); __v; }) -#define writel(v,c) ({ unsigned int __v = v; __arch_putl(__v,c); __v; }) - -#define readb(c) ({ unsigned char __v = __arch_getb(c); __v; }) -#define readw(c) ({ unsigned short __v = __arch_getw(c); __v; }) -#define readl(c) ({ unsigned int __v = __arch_getl(c); __v; }) - -#define SYSTEM_CLOCK_12 12000000 -#define SYSTEM_CLOCK_13 13000000 -#define SYSTEM_CLOCK_192 19200000 -#define SYSTEM_CLOCK_96 96000000 - -#define OMAP34XX_CORE_L4_IO_BASE 0x48000000 - -#define BEAGLE_BASE_UART_1 0x4806A000 -#define BEAGLE_BASE_UART_2 0x4806C000 -#define BEAGLE_BASE_UART_3 0x49020000 -#define BEAGLE_BASE_UART_4 0x49020000 -#define BEAGLE_BASE_UART_5 0x49020000 -#define BEAGLE_BASE_UART_5 0x49020000 -#define BEAGLE_BASE_UART_6 0x49020000 -#define BEAGLE_BASE_UART_7 0x49020000 - -#define BEAGLE_UART_DLL_REG_OFFSET 0x000 -#define BEAGLE_UART_RHR_REG_OFFSET 0x000 -#define BEAGLE_UART_THR_REG_OFFSET 0x000 -#define BEAGLE_UART_DLH_REG_OFFSET 0x004 -#define BEAGLE_UART_IER_REG_OFFSET 0x004 -#define BEAGLE_UART_IIR_REG_OFFSET 0x008 -#define BEAGLE_UART_FCR_REG_OFFSET 0x008 -#define BEAGLE_UART_EFR_REG_OFFSET 0x008 -#define BEAGLE_UART_LCR_REG_OFFSET 0x00C -#define BEAGLE_UART_MCR_REG_OFFSET 0x010 -#define BEAGLE_UART_XON1_ADDR1_REG_OFFSET 0x010 -#define BEAGLE_UART_LSR_REG_OFFSET 0x014 -#define BEAGLE_UART_XON2_ADDR2_REG_OFFSET 0x014 -#define BEAGLE_UART_MSR_REG_OFFSET 0x018 -#define BEAGLE_UART_TCR_REG_OFFSET 0x018 -#define BEAGLE_UART_XOFF1_REG_OFFSET 0x018 -#define BEAGLE_UART_SPR_REG_OFFSET 0x01C -#define BEAGLE_UART_TLR_REG_OFFSET 0x01C -#define BEAGLE_UART_XOFF2_REG_OFFSET 0x01C -#define BEAGLE_UART_MDR1_REG_OFFSET 0x020 -#define BEAGLE_UART_MDR2_REG_OFFSET 0x024 -#define BEAGLE_UART_SFLSR_REG_OFFSET 0x028 -#define BEAGLE_UART_TXFLL_REG_OFFSET 0x028 -#define BEAGLE_UART_RESUME_REG_OFFSET 0x02C -#define BEAGLE_UART_TXFLH_REG_OFFSET 0x02C -#define BEAGLE_UART_SFREGL_REG_OFFSET 0x030 -#define BEAGLE_UART_RXFLL_REG_OFFSET 0x030 -#define BEAGLE_UART_SFREGH_REG_OFFSET 0x034 -#define BEAGLE_UART_RXFLH_REG_OFFSET 0x034 -#define BEAGLE_UART_UASR_REG_OFFSET 0x038 -#define BEAGLE_UART_BLR_REG_OFFSET 0x038 -#define BEAGLE_UART_ACREG_REG_OFFSET 0x03C -#define BEAGLE_UART_SCR_REG_OFFSET 0x040 -#define BEAGLE_UART_SSR_REG_OFFSET 0x044 -#define BEAGLE_UART_EBLR_REG_OFFSET 0x048 -#define BEAGLE_UART_MVR_REG_OFFSET 0x050 -#define BEAGLE_UART_SYSC_REG_OFFSET 0x054 -#define BEAGLE_UART_SYSS_REG_OFFSET 0x058 -#define BEAGLE_UART_WER_REG_OFFSET 0x05C -#define BEAGLE_UART_CFPS_REG_OFFSET 0x060 - -#define BEAGLE_UART5_DLL = BAGLE_BASE_UART5 + BEAGLE_UART_DLL_REG_OFFSET -#define BEAGLE_UART5_RHR = BAGLE_BASE_UART5 + \ - BEAGLE_UART_BEAGLE_UART_RHR_REG_OFFSET -#define BEAGLE_UART5_THR = BAGLE_BASE_UART5 + BEAGLE_UART_THR_REG_OFFSET -#define BEAGLE_UART5_DLH = BAGLE_BASE_UART5 + BEAGLE_UART_DLH_REG_OFFSET -#define BEAGLE_UART5_IER = BAGLE_BASE_UART5 + BEAGLE_UART_IER_REG_OFFSET -#define BEAGLE_UART5_IIR = BAGLE_BASE_UART5 + BEAGLE_UART_IIR_REG_OFFSET -#define BEAGLE_UART5_FCR = BAGLE_BASE_UART5 + BEAGLE_UART_FCR_REG_OFFSET -#define BEAGLE_UART5_EFR = BAGLE_BASE_UART5 + BEAGLE_UART_EFR_REG_OFFSET -#define BEAGLE_UART5_LCR = BAGLE_BASE_UART5 + BEAGLE_UART_LCR_REG_OFFSET -#define BEAGLE_UART5_MCR = BAGLE_BASE_UART5 + BEAGLE_UART_MCR_REG_OFFSET -#define BEAGLE_UART5_XON1_ADDR1 = BAGLE_BASE_UART5 + \ - BEAGLE_UART_XON1_ADDR1_REG_OFFSET -#define BEAGLE_UART5_LSR = BAGLE_BASE_UART5 + BEAGLE_UART_LSR_REG_OFFSET -#define BEAGLE_UART5_XON2_ADDR2 = BAGLE_BASE_UART5 + \ - BEAGLE_UART_XON2_ADDR2_REG_OFFSET -#define BEAGLE_UART5_MSR = BAGLE_BASE_UART5 + BEAGLE_UART_MSR_REG_OFFSET -#define BEAGLE_UART5_TCR = BAGLE_BASE_UART5 + BEAGLE_UART_TCR_REG_OFFSET -#define BEAGLE_UART5_XOFF1 = BAGLE_BASE_UART5 + BEAGLE_UART_XOFF1_REG_OFFSET -#define BEAGLE_UART5_SPR = BAGLE_BASE_UART5 + BEAGLE_UART_SPR_REG_OFFSET -#define BEAGLE_UART5_TLR = BAGLE_BASE_UART5 + BEAGLE_UART_TLR_REG_OFFSET -#define BEAGLE_UART5_XOFF2 = BAGLE_BASE_UART5 + BEAGLE_UART_XOFF2_REG_OFFSET -#define BEAGLE_UART5_MDR1 = BAGLE_BASE_UART5 + BEAGLE_UART_MDR1_REG_OFFSET -#define BEAGLE_UART5_MDR2 = BAGLE_BASE_UART5 + BEAGLE_UART_MDR2_REG_OFFSET -#define BEAGLE_UART5_SFLSR = BAGLE_BASE_UART5 + BEAGLE_UART_SFLSR_REG_OFFSET -#define BEAGLE_UART5_TXFLL = BAGLE_BASE_UART5 + BEAGLE_UART_TXFLL_REG_OFFSET -#define BEAGLE_UART5_RESUME = BAGLE_BASE_UART5 + BEAGLE_UART_RESUME_REG_OFFSET -#define BEAGLE_UART5_TXFLH = BAGLE_BASE_UART5 + BEAGLE_UART_TXFLH_REG_OFFSET -#define BEAGLE_UART5_SFREGL = BAGLE_BASE_UART5 + BEAGLE_UART_SFREGL_REG_OFFSET -#define BEAGLE_UART5_RXFLL = BAGLE_BASE_UART5 + BEAGLE_UART_RXFLL_REG_OFFSET -#define BEAGLE_UART5_SFREGH = BAGLE_BASE_UART5 + BEAGLE_UART_SFREGH_REG_OFFSET -#define BEAGLE_UART5_RXFLH = BAGLE_BASE_UART5 + BEAGLE_UART_RXFLH_REG_OFFSET -#define BEAGLE_UART5_UASR = BAGLE_BASE_UART5 + BEAGLE_UART_UASR_REG_OFFSET -#define BEAGLE_UART5_BLR = BAGLE_BASE_UART5 + BEAGLE_UART_BLR_REG_OFFSET -#define BEAGLE_UART5_ACREG = BAGLE_BASE_UART5 + BEAGLE_UART_ACREG_REG_OFFSET -#define BEAGLE_UART5_SCR = BAGLE_BASE_UART5 + BEAGLE_UART_SCR_REG_OFFSET -#define BEAGLE_UART5_SSR = BAGLE_BASE_UART5 + BEAGLE_UART_SSR_REG_OFFSET -#define BEAGLE_UART5_EBLR = BAGLE_BASE_UART5 + BEAGLE_UART_EBLR_REG_OFFSET -#define BEAGLE_UART5_MVR = BAGLE_BASE_UART5 + BEAGLE_UART_MVR_REG_OFFSET -#define BEAGLE_UART5_SYSC = BAGLE_BASE_UART5 + BEAGLE_UART_SYSC_REG_OFFSET -#define BEAGLE_UART5_SYSS = BAGLE_BASE_UART5 + BEAGLE_UART_SYSS_REG_OFFSET -#define BEAGLE_UART5_WER = BAGLE_BASE_UART5 + BEAGLE_UART_WER_REG_OFFSET -#define BEAGLE_UART5_CFPS = BAGLE_BASE_UART5 + BEAGLE_UART_CFPS_REG_OFFSET - -/** - * @defgroup beagle_reg Register Definitions - * - * @ingroup beagle - * - * @brief Register definitions. - * - * @{ - */ - -/** - * @name Register Base Addresses - * - * @{ - */ - -#define BEAGLE_BASE_ADC 0x40048000 -#define BEAGLE_BASE_SYSCON 0x40004000 -#define BEAGLE_BASE_DEBUG_CTRL 0x40040000 -#define BEAGLE_BASE_DMA 0x31000000 -#define BEAGLE_BASE_EMC 0x31080000 -#define BEAGLE_BASE_EMC_CS_0 0xe0000000 -#define BEAGLE_BASE_EMC_CS_1 0xe1000000 -#define BEAGLE_BASE_EMC_CS_2 0xe2000000 -#define BEAGLE_BASE_EMC_CS_3 0xe3000000 -#define BEAGLE_BASE_EMC_DYCS_0 0x80000000 -#define BEAGLE_BASE_EMC_DYCS_1 0xa0000000 -#define BEAGLE_BASE_ETB_CFG 0x310c0000 -#define BEAGLE_BASE_ETB_DATA 0x310e0000 -#define BEAGLE_BASE_ETHERNET 0x31060000 -#define BEAGLE_BASE_GPIO 0x40028000 -#define BEAGLE_BASE_I2C_1 0x400a0000 -#define BEAGLE_BASE_I2C_2 0x400a8000 -#define BEAGLE_BASE_I2S_0 0x20094000 -#define BEAGLE_BASE_I2S_1 0x2009c000 -#define BEAGLE_BASE_IRAM 0x08000000 -#define BEAGLE_BASE_IROM 0x0c000000 -#define BEAGLE_BASE_KEYSCAN 0x40050000 -#define BEAGLE_BASE_LCD 0x31040000 -#define BEAGLE_BASE_MCPWM 0x400e8000 -#define BEAGLE_BASE_MIC 0x40008000 -#define BEAGLE_BASE_NAND_MLC 0x200a8000 -#define BEAGLE_BASE_NAND_SLC 0x20020000 -#define BEAGLE_BASE_PWM_1 0x4005c000 -#define BEAGLE_BASE_PWM_2 0x4005c004 -#define BEAGLE_BASE_PWM_3 0x4002c000 -#define BEAGLE_BASE_PWM_4 0x40030000 -#define BEAGLE_BASE_RTC 0x40024000 -#define BEAGLE_BASE_RTC_RAM 0x40024080 -#define BEAGLE_BASE_SDCARD 0x20098000 -#define BEAGLE_BASE_SIC_1 0x4000c000 -#define BEAGLE_BASE_SIC_2 0x40010000 -#define BEAGLE_BASE_SPI_1 0x20088000 -#define BEAGLE_BASE_SPI_2 0x20090000 -#define BEAGLE_BASE_SSP_0 0x20084000 -#define BEAGLE_BASE_SSP_1 0x2008c000 -#define BEAGLE_BASE_TIMER_0 0x40044000 -#define BEAGLE_BASE_TIMER_1 0x4004c000 -#define BEAGLE_BASE_TIMER_2 0x40058000 -#define BEAGLE_BASE_TIMER_3 0x40060000 -#define BEAGLE_BASE_TIMER_5 0x4002c000 -#define BEAGLE_BASE_TIMER_6 0x40030000 -#define BEAGLE_BASE_TIMER_HS 0x40038000 -#define BEAGLE_BASE_TIMER_MS 0x40034000 - -//#define BEAGLE_BASE_UART_1 0x40014000 -//#define BEAGLE_BASE_UART_2 0x40018000 -//#define BEAGLE_BASE_UART_3 0x40080000 -//#define BEAGLE_BASE_UART_4 0x40088000 -//#define BEAGLE_BASE_UART_5 0x40090000 -//#define BEAGLE_BASE_UART_5 0x49020000 -//#define BEAGLE_BASE_UART_6 0x40098000 -//#define BEAGLE_BASE_UART_7 0x4001c000 - -#define BEAGLE_BASE_USB 0x31020000 -#define BEAGLE_BASE_USB_OTG_I2C 0x31020300 -#define BEAGLE_BASE_WDT 0x4003c000 - -/** @} */ - -/** - * @name Miscanellanous Registers - * - * @{ - */ - -#define BEAGLE_U3CLK (*(volatile uint32_t *) 0x400040d0) -#define BEAGLE_U4CLK (*(volatile uint32_t *) 0x400040d4) -#define BEAGLE_U5CLK (*(volatile uint32_t *) 0x400040d8) -#define BEAGLE_U6CLK (*(volatile uint32_t *) 0x400040dc) -#define BEAGLE_IRDACLK (*(volatile uint32_t *) 0x400040e0) -#define BEAGLE_UART_CTRL (*(volatile uint32_t *) 0x40054000) -#define BEAGLE_UART_CLKMODE (*(volatile uint32_t *) 0x40054004) -#define BEAGLE_UART_LOOP (*(volatile uint32_t *) 0x40054008) - -#define BEAGLE_SW_INT (*(volatile uint32_t *) 0x400040a8) -#define BEAGLE_MAC_CLK_CTRL (*(volatile uint32_t *) 0x40004090) -#define BEAGLE_USB_DIV (*(volatile uint32_t *) 0x4000401c) -#define BEAGLE_OTG_CLK_CTRL (*(volatile uint32_t *) 0x31020ff4) -#define BEAGLE_OTG_CLK_STAT (*(volatile uint32_t *) 0x31020ff8) -#define BEAGLE_OTG_STAT_CTRL (*(volatile uint32_t *) 0x31020110) -#define BEAGLE_I2C_RX (*(volatile uint32_t *) 0x31020300) -#define BEAGLE_I2C_TX (*(volatile uint32_t *) 0x31020300) -#define BEAGLE_I2C_STS (*(volatile uint32_t *) 0x31020304) -#define BEAGLE_I2C_CTL (*(volatile uint32_t *) 0x31020308) -#define BEAGLE_I2C_CLKHI (*(volatile uint32_t *) 0x3102030c) -#define BEAGLE_I2C_CLKLO (*(volatile uint32_t *) 0x31020310) -#define BEAGLE_PWR_CTRL (*(volatile uint32_t *) 0x40004044) -#define BEAGLE_OSC_CTRL (*(volatile uint32_t *) 0x4000404c) -#define BEAGLE_SYSCLK_CTRL (*(volatile uint32_t *) 0x40004050) -#define BEAGLE_PLL397_CTRL (*(volatile uint32_t *) 0x40004048) -#define BEAGLE_HCLKPLL_CTRL (*(volatile uint32_t *) 0x40004058) -#define BEAGLE_HCLKDIV_CTRL (*(volatile uint32_t *) 0x40004040) -#define BEAGLE_TEST_CLK (*(volatile uint32_t *) 0x400040a4) -#define BEAGLE_AUTOCLK_CTRL (*(volatile uint32_t *) 0x400040ec) -#define BEAGLE_START_ER_PIN (*(volatile uint32_t *) 0x40004030) -#define BEAGLE_START_ER_INT (*(volatile uint32_t *) 0x40004020) -#define BEAGLE_P0_INTR_ER (*(volatile uint32_t *) 0x40004018) -#define BEAGLE_START_SR_PIN (*(volatile uint32_t *) 0x40004038) -#define BEAGLE_START_SR_INT (*(volatile uint32_t *) 0x40004028) -#define BEAGLE_START_RSR_PIN (*(volatile uint32_t *) 0x40004034) -#define BEAGLE_START_RSR_INT (*(volatile uint32_t *) 0x40004024) -#define BEAGLE_START_APR_PIN (*(volatile uint32_t *) 0x4000403c) -#define BEAGLE_START_APR_INT (*(volatile uint32_t *) 0x4000402c) -#define BEAGLE_USB_CTRL (*(volatile uint32_t *) 0x40004064) -#define BEAGLE_USBDIV_CTRL (*(volatile uint32_t *) 0x4000401c) -#define BEAGLE_MS_CTRL (*(volatile uint32_t *) 0x40004080) -#define BEAGLE_DMACLK_CTRL (*(volatile uint32_t *) 0x400040e8) -#define BEAGLE_FLASHCLK_CTRL (*(volatile uint32_t *) 0x400040c8) -#define BEAGLE_MACCLK_CTRL (*(volatile uint32_t *) 0x40004090) -#define BEAGLE_LCDCLK_CTRL (*(volatile uint32_t *) 0x40004054) -#define BEAGLE_I2S_CTRL (*(volatile uint32_t *) 0x4000407c) -#define BEAGLE_SSP_CTRL (*(volatile uint32_t *) 0x40004078) -#define BEAGLE_SPI_CTRL (*(volatile uint32_t *) 0x400040c4) -#define BEAGLE_I2CCLK_CTRL (*(volatile uint32_t *) 0x400040ac) -#define BEAGLE_TIMCLK_CTRL1 (*(volatile uint32_t *) 0x400040c0) -#define BEAGLE_TIMCLK_CTRL (*(volatile uint32_t *) 0x400040bc) -#define BEAGLE_ADCLK_CTRL (*(volatile uint32_t *) 0x400040b4) -#define BEAGLE_ADCLK_CTRL1 (*(volatile uint32_t *) 0x40004060) -#define BEAGLE_KEYCLK_CTRL (*(volatile uint32_t *) 0x400040b0) -#define BEAGLE_PWMCLK_CTRL (*(volatile uint32_t *) 0x400040b8) -#define BEAGLE_UARTCLK_CTRL (*(volatile uint32_t *) 0x400040e4) -#define BEAGLE_POS0_IRAM_CTRL (*(volatile uint32_t *) 0x40004110) -#define BEAGLE_POS1_IRAM_CTRL (*(volatile uint32_t *) 0x40004114) -#define BEAGLE_SDRAMCLK_CTRL (*(volatile uint32_t *) 0x40004068) - -/** @} */ - -/** - * @name Power Control Register (PWR_CTRL) - * - * @{ - */ - -#define PWR_STOP BSP_BIT32(0) -#define PWR_HIGHCORE_ALWAYS BSP_BIT32(1) -#define PWR_NORMAL_RUN_MODE BSP_BIT32(2) -#define PWR_SYSCLKEN_ALWAYS BSP_BIT32(3) -#define PWR_SYSCLKEN_HIGH BSP_BIT32(4) -#define PWR_HIGHCORE_HIGH BSP_BIT32(5) -#define PWR_SDRAM_AUTO_REFRESH BSP_BIT32(7) -#define PWR_UPDATE_EMCSREFREQ BSP_BIT32(8) -#define PWR_EMCSREFREQ BSP_BIT32(9) -#define PWR_HCLK_USES_PERIPH_CLK BSP_BIT32(10) - -/** @} */ - -/** - * @name HCLK PLL Control Register (HCLKPLL_CTRL) - * - * @{ - */ - -#define HCLK_PLL_LOCK BSP_BIT32(0) -#define HCLK_PLL_M(val) BSP_FLD32(val, 1, 8) -#define HCLK_PLL_M_GET(reg) BSP_FLD32GET(reg, 1, 8) -#define HCLK_PLL_N(val) BSP_FLD32(val, 9, 10) -#define HCLK_PLL_N_GET(reg) BSP_FLD32GET(reg, 9, 10) -#define HCLK_PLL_P(val) BSP_FLD32(val, 11, 12) -#define HCLK_PLL_P_GET(reg) BSP_FLD32GET(reg, 11, 12) -#define HCLK_PLL_FBD_FCLKOUT BSP_BIT32(13) -#define HCLK_PLL_DIRECT BSP_BIT32(14) -#define HCLK_PLL_BYPASS BSP_BIT32(15) -#define HCLK_PLL_POWER BSP_BIT32(16) - -/** @} */ - -/** - * @name HCLK Divider Control Register (HCLKDIV_CTRL) - * - * @{ - */ - -#define HCLK_DIV_HCLK(val) BSP_FLD32(val, 0, 1) -#define HCLK_DIV_HCLK_GET(reg) BSP_FLD32GET(reg, 0, 1) -#define HCLK_DIV_PERIPH_CLK(val) BSP_FLD32(val, 2, 6) -#define HCLK_DIV_PERIPH_CLK_GET(reg) BSP_FLD32GET(reg, 2, 6) -#define HCLK_DIV_DDRAM_CLK(val) BSP_FLD32(val, 7, 8) -#define HCLK_DIV_DDRAM_CLK_GET(reg) BSP_FLD32GET(reg, 7, 8) - -/** @} */ - -/** - * @name Timer Clock Control Register (TIMCLK_CTRL) - * - * @{ - */ - -#define TIMCLK_CTRL_WDT BSP_BIT32(0) -#define TIMCLK_CTRL_HST BSP_BIT32(1) - -/** @} */ - -#define BEAGLE_FILL(a, b, s) uint8_t reserved_ ## b [b - a - sizeof(s)] -#define BEAGLE_RESERVE(a, b) uint8_t reserved_ ## b [b - a] - -typedef struct { -} beagle_nand_slc; - -typedef struct { -} beagle_ssp; - -typedef struct { -} beagle_spi; - -typedef struct { -} beagle_sd_card; - -typedef struct { -} beagle_usb; - -typedef struct { -} beagle_lcd; - -typedef struct { -} beagle_etb; - -typedef struct { -} beagle_syscon; - -typedef struct { -} beagle_uart_ctrl; - -typedef struct { -} beagle_uart; - -typedef struct { -} beagle_ms_timer; - -typedef struct { -} beagle_hs_timer; - -/** - * @name Watchdog Timer Interrupt Status Register (WDTIM_INT) - * - * @{ - */ - -#define WDTTIM_INT_MATCH_INT BSP_BIT32(0) - -/** @} */ - -/** - * @name Watchdog Timer Control Register (WDTIM_CTRL) - * - * @{ - */ - -#define WDTTIM_CTRL_COUNT_ENAB BSP_BIT32(0) -#define WDTTIM_CTRL_RESET_COUNT BSP_BIT32(1) -#define WDTTIM_CTRL_PAUSE_EN BSP_BIT32(2) - -/** @} */ - -/** - * @name Watchdog Timer Match Control Register (WDTIM_MCTRL) - * - * @{ - */ - -#define WDTTIM_MCTRL_MR0_INT BSP_BIT32(0) -#define WDTTIM_MCTRL_RESET_COUNT0 BSP_BIT32(1) -#define WDTTIM_MCTRL_STOP_COUNT0 BSP_BIT32(2) -#define WDTTIM_MCTRL_M_RES1 BSP_BIT32(3) -#define WDTTIM_MCTRL_M_RES2 BSP_BIT32(4) -#define WDTTIM_MCTRL_RESFRC1 BSP_BIT32(5) -#define WDTTIM_MCTRL_RESFRC2 BSP_BIT32(6) - -/** @} */ - -/** - * @name Watchdog Timer External Match Control Register (WDTIM_EMR) - * - * @{ - */ - -#define WDTTIM_EMR_EXT_MATCH0 BSP_BIT32(0) -#define WDTTIM_EMR_MATCH_CTRL(val) BSP_FLD32(val, 4, 5) -#define WDTTIM_EMR_MATCH_CTRL_SET(reg, val) BSP_FLD32SET(reg, val, 4, 5) - -/** @} */ - -/** - * @name Watchdog Timer Reset Source Register (WDTIM_RES) - * - * @{ - */ - -#define WDTTIM_RES_WDT BSP_BIT32(0) - -/** @} */ - -typedef struct { - uint32_t intr; - uint32_t ctrl; - uint32_t counter; - uint32_t mctrl; - uint32_t match0; - uint32_t emr; - uint32_t pulse; - uint32_t res; -} beagle_wdt; - -typedef struct { -} beagle_debug; - -typedef struct { -} beagle_adc; - -typedef struct { -} beagle_keyscan; - -typedef struct { -} beagle_pwm; - -typedef struct { -} beagle_mcpwm; - -typedef struct { - uint32_t mac1; - uint32_t mac2; - uint32_t ipgt; - uint32_t ipgr; - uint32_t clrt; - uint32_t maxf; - uint32_t supp; - uint32_t test; - uint32_t mcfg; - uint32_t mcmd; - uint32_t madr; - uint32_t mwtd; - uint32_t mrdd; - uint32_t mind; - uint32_t reserved_0 [2]; - uint32_t sa0; - uint32_t sa1; - uint32_t sa2; - uint32_t reserved_1 [45]; - uint32_t command; - uint32_t status; - uint32_t rxdescriptor; - uint32_t rxstatus; - uint32_t rxdescriptornum; - uint32_t rxproduceindex; - uint32_t rxconsumeindex; - uint32_t txdescriptor; - uint32_t txstatus; - uint32_t txdescriptornum; - uint32_t txproduceindex; - uint32_t txconsumeindex; - uint32_t reserved_2 [10]; - uint32_t tsv0; - uint32_t tsv1; - uint32_t rsv; - uint32_t reserved_3 [3]; - uint32_t flowcontrolcnt; - uint32_t flowcontrolsts; - uint32_t reserved_4 [34]; - uint32_t rxfilterctrl; - uint32_t rxfilterwolsts; - uint32_t rxfilterwolclr; - uint32_t reserved_5 [1]; - uint32_t hashfilterl; - uint32_t hashfilterh; - uint32_t reserved_6 [882]; - uint32_t intstatus; - uint32_t intenable; - uint32_t intclear; - uint32_t intset; - uint32_t reserved_7 [1]; - uint32_t powerdown; -} beagle_eth; - -typedef struct { - uint32_t er; - uint32_t rsr; - uint32_t sr; - uint32_t apr; - uint32_t atr; - uint32_t itr; -} beagle_irq; - -typedef struct { - uint32_t p3_inp_state; - uint32_t p3_outp_set; - uint32_t p3_outp_clr; - uint32_t p3_outp_state; - uint32_t p2_dir_set; - uint32_t p2_dir_clr; - uint32_t p2_dir_state; - uint32_t p2_inp_state; - uint32_t p2_outp_set; - uint32_t p2_outp_clr; - uint32_t p2_mux_set; - uint32_t p2_mux_clr; - uint32_t p2_mux_state; - BEAGLE_RESERVE(0x034, 0x040); - uint32_t p0_inp_state; - uint32_t p0_outp_set; - uint32_t p0_outp_clr; - uint32_t p0_outp_state; - uint32_t p0_dir_set; - uint32_t p0_dir_clr; - uint32_t p0_dir_state; - BEAGLE_RESERVE(0x05c, 0x060); - uint32_t p1_inp_state; - uint32_t p1_outp_set; - uint32_t p1_outp_clr; - uint32_t p1_outp_state; - uint32_t p1_dir_set; - uint32_t p1_dir_clr; - uint32_t p1_dir_state; - BEAGLE_RESERVE(0x07c, 0x110); - uint32_t p3_mux_set; - uint32_t p3_mux_clr; - uint32_t p3_mux_state; - uint32_t p0_mux_set; - uint32_t p0_mux_clr; - uint32_t p0_mux_state; - uint32_t p1_mux_set; - uint32_t p1_mux_clr; - uint32_t p1_mux_state; -} beagle_gpio; - -typedef struct { - uint32_t rx_or_tx; - uint32_t stat; - uint32_t ctrl; - uint32_t clk_hi; - uint32_t clk_lo; - uint32_t adr; - uint32_t rxfl; - uint32_t txfl; - uint32_t rxb; - uint32_t txb; - uint32_t s_tx; - uint32_t s_txfl; -} beagle_i2c; - -typedef struct { - uint32_t ucount; - uint32_t dcount; - uint32_t match0; - uint32_t match1; - uint32_t ctrl; - uint32_t intstat; - uint32_t key; - uint32_t sram [32]; -} beagle_rtc; - -typedef struct { - uint32_t control; - uint32_t status; - uint32_t timeout; - uint32_t reserved_0 [5]; -} beagle_emc_ahb; - -typedef struct { - union { - uint32_t w32; - uint16_t w16; - uint8_t w8; - } buff; - uint32_t reserved_0 [8191]; - union { - uint32_t w32; - uint16_t w16; - uint8_t w8; - } data; - uint32_t reserved_1 [8191]; - uint32_t cmd; - uint32_t addr; - uint32_t ecc_enc; - uint32_t ecc_dec; - uint32_t ecc_auto_enc; - uint32_t ecc_auto_dec; - uint32_t rpr; - uint32_t wpr; - uint32_t rubp; - uint32_t robp; - uint32_t sw_wp_add_low; - uint32_t sw_wp_add_hig; - uint32_t icr; - uint32_t time; - uint32_t irq_mr; - uint32_t irq_sr; - uint32_t reserved_2; - uint32_t lock_pr; - uint32_t isr; - uint32_t ceh; -} beagle_nand_mlc; - -typedef struct { - beagle_nand_slc nand_slc; - BEAGLE_FILL(0x20020000, 0x20084000, beagle_nand_slc); - beagle_ssp ssp_0; - BEAGLE_FILL(0x20084000, 0x20088000, beagle_ssp); - beagle_spi spi_1; - BEAGLE_FILL(0x20088000, 0x2008c000, beagle_spi); - beagle_ssp ssp_1; - BEAGLE_FILL(0x2008c000, 0x20090000, beagle_ssp); - beagle_spi spi_2; - BEAGLE_FILL(0x20090000, 0x20094000, beagle_spi); - //beagle_i2s i2s_0; - //BEAGLE_FILL(0x20094000, 0x20098000, beagle_i2s); - beagle_sd_card sd_card; - BEAGLE_FILL(0x20098000, 0x2009c000, beagle_sd_card); - //beagle_i2s i2s_1; - //BEAGLE_FILL(0x2009c000, 0x200a8000, beagle_i2s); - beagle_nand_mlc nand_mlc; - BEAGLE_FILL(0x200a8000, 0x31000000, beagle_nand_mlc); - //beagle_dma dma; - //BEAGLE_FILL(0x31000000, 0x31020000, beagle_dma); - beagle_usb usb; - BEAGLE_FILL(0x31020000, 0x31040000, beagle_usb); - beagle_lcd lcd; - BEAGLE_FILL(0x31040000, 0x31060000, beagle_lcd); - beagle_eth eth; - BEAGLE_FILL(0x31060000, 0x31080000, beagle_eth); - //beagle_emc emc; - //BEAGLE_FILL(0x31080000, 0x31080400, beagle_emc); - beagle_emc_ahb emc_ahb [5]; - BEAGLE_FILL(0x31080400, 0x310c0000, beagle_emc_ahb [5]); - beagle_etb etb; - BEAGLE_FILL(0x310c0000, 0x40004000, beagle_etb); - beagle_syscon syscon; - BEAGLE_FILL(0x40004000, 0x40008000, beagle_syscon); - beagle_irq mic; - BEAGLE_FILL(0x40008000, 0x4000c000, beagle_irq); - beagle_irq sic_1; - BEAGLE_FILL(0x4000c000, 0x40010000, beagle_irq); - beagle_irq sic_2; - BEAGLE_FILL(0x40010000, 0x40014000, beagle_irq); - beagle_uart uart_1; - BEAGLE_FILL(0x40014000, 0x40018000, beagle_uart); - beagle_uart uart_2; - BEAGLE_FILL(0x40018000, 0x4001c000, beagle_uart); - beagle_uart uart_7; - BEAGLE_FILL(0x4001c000, 0x40024000, beagle_uart); - beagle_rtc rtc; - BEAGLE_FILL(0x40024000, 0x40028000, beagle_rtc); - beagle_gpio gpio; - BEAGLE_FILL(0x40028000, 0x4002c000, beagle_gpio); - beagle_timer timer_4; - BEAGLE_FILL(0x4002c000, 0x40030000, beagle_timer); - beagle_timer timer_5; - BEAGLE_FILL(0x40030000, 0x40034000, beagle_timer); - beagle_ms_timer ms_timer; - BEAGLE_FILL(0x40034000, 0x40038000, beagle_ms_timer); - beagle_hs_timer hs_timer; - BEAGLE_FILL(0x40038000, 0x4003c000, beagle_hs_timer); - beagle_wdt wdt; - BEAGLE_FILL(0x4003c000, 0x40040000, beagle_wdt); - beagle_debug debug; - BEAGLE_FILL(0x40040000, 0x40044000, beagle_debug); - beagle_timer timer_0; - BEAGLE_FILL(0x40044000, 0x40048000, beagle_timer); - beagle_adc adc; - BEAGLE_FILL(0x40048000, 0x4004c000, beagle_adc); - beagle_timer timer_1; - BEAGLE_FILL(0x4004c000, 0x40050000, beagle_timer); - beagle_keyscan keyscan; - BEAGLE_FILL(0x40050000, 0x40054000, beagle_keyscan); - beagle_uart_ctrl uart_ctrl; - BEAGLE_FILL(0x40054000, 0x40058000, beagle_uart_ctrl); - beagle_timer timer_2; - BEAGLE_FILL(0x40058000, 0x4005c000, beagle_timer); - beagle_pwm pwm_1_and_pwm_2; - BEAGLE_FILL(0x4005c000, 0x40060000, beagle_pwm); - beagle_timer timer3; - BEAGLE_FILL(0x40060000, 0x40080000, beagle_timer); - beagle_uart uart_3; - BEAGLE_FILL(0x40080000, 0x40088000, beagle_uart); - beagle_uart uart_4; - BEAGLE_FILL(0x40088000, 0x40090000, beagle_uart); - beagle_uart uart_5; - BEAGLE_FILL(0x40090000, 0x40098000, beagle_uart); - beagle_uart uart_6; - BEAGLE_FILL(0x40098000, 0x400a0000, beagle_uart); - beagle_i2c i2c_1; - BEAGLE_FILL(0x400a0000, 0x400a8000, beagle_i2c); - beagle_i2c i2c_2; - BEAGLE_FILL(0x400a8000, 0x400e8000, beagle_i2c); - beagle_mcpwm mcpwm; -} beagle_registers; - -extern volatile beagle_registers beagle; - -/** @} */ - -#endif /* LIBBSP_ARM_BEAGLE_BEAGLE_H */ diff --git a/c/src/lib/libbsp/arm/beagle/include/boot.h b/c/src/lib/libbsp/arm/beagle/include/boot.h deleted file mode 100644 index 32e4f0013c..0000000000 --- a/c/src/lib/libbsp/arm/beagle/include/boot.h +++ /dev/null @@ -1,117 +0,0 @@ -/** - * @file - * - * @ingroup beagle_boot - * - * @brief Boot support API. - */ - -/* - * Copyright (c) 2012 Claas Ziemke. All rights reserved. - * - * Claas Ziemke - * Kernerstrasse 11 - * 70182 Stuttgart - * Germany - * <claas.ziemke@gmx.net> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_BEAGLE_BOOT_H -#define LIBBSP_ARM_BEAGLE_BOOT_H - -#include <stdint.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup beagle_boot Boot Support - * - * @ingroup beagle - * - * @brief Boot support. - * - * The NXP internal boot program shall be the "stage-0 program". - * - * The boot program within the first page of the first or second block shall be - * "stage-1 program". It will be invoked by the stage-0 program from NXP. - * - * The program loaded by the stage-1 program will be the "stage-2 program" or - * the "boot loader". - * - * The program loaded by the stage-2 program will be the "stage-3 program" or - * the "application". - * - * The stage-1 program image must have a format specified by NXP. - * - * The stage-2 and stage-3 program images may have any format. - * - * @{ - */ - - -#define MLC_SMALL_DATA_SIZE 512 -#define MLC_SMALL_DATA_WORD_COUNT (MLC_SMALL_DATA_SIZE / 4) - -#define BEAGLE_BOOT_BLOCK_0 0 -#define BEAGLE_BOOT_BLOCK_1 1 - -#define BEAGLE_BOOT_ICR_SP_3AC_8IF 0xf0 -#define BEAGLE_BOOT_ICR_SP_4AC_8IF 0xd2 -#define BEAGLE_BOOT_ICR_LP_4AC_8IF 0xb4 -#define BEAGLE_BOOT_ICR_LP_5AC_8IF 0x96 - -typedef union { - struct { - uint8_t d0; - uint8_t reserved_0 [3]; - uint8_t d1; - uint8_t reserved_1 [3]; - uint8_t d2; - uint8_t reserved_2 [3]; - uint8_t d3; - uint8_t reserved_3 [3]; - uint8_t d4; - uint8_t reserved_4 [3]; - uint8_t d5; - uint8_t reserved_5 [3]; - uint8_t d6; - uint8_t reserved_6 [3]; - uint8_t d7; - uint8_t reserved_7 [3]; - uint8_t d8; - uint8_t reserved_8 [3]; - uint8_t d9; - uint8_t reserved_9 [3]; - uint8_t d10; - uint8_t reserved_10 [3]; - uint8_t d11; - uint8_t reserved_11 [3]; - uint8_t d12; - uint8_t reserved_12 [463]; - } field; - uint32_t data [MLC_SMALL_DATA_WORD_COUNT]; -} beagle_boot_block; - -void beagle_setup_boot_block( - beagle_boot_block *boot_block, - uint8_t icr, - uint8_t page_count -); - -void beagle_set_boot_block_bad( - beagle_boot_block *boot_block -); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_BEAGLE_BOOT_H */ diff --git a/c/src/lib/libbsp/arm/beagle/include/bsp.h b/c/src/lib/libbsp/arm/beagle/include/bsp.h index 393b75d498..e235efa901 100644 --- a/c/src/lib/libbsp/arm/beagle/include/bsp.h +++ b/c/src/lib/libbsp/arm/beagle/include/bsp.h @@ -1,7 +1,7 @@ /** * @file * - * @ingroup beagle + * @ingroup arm_beagle * * @brief Global BSP definitions. */ @@ -18,232 +18,329 @@ * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. + * + * Modified by Ben Gras <beng@shrike-systems.com> to add lots + * of beagleboard/beaglebone definitions, delete lpc32xx specific + * ones, and merge with some other header files. */ #ifndef LIBBSP_ARM_BEAGLE_BSP_H #define LIBBSP_ARM_BEAGLE_BSP_H #include <bspopts.h> +#include <stdint.h> +#include <bsp/start.h> +#include <bsp/default-initial-extension.h> #include <rtems.h> -//#include <rtems/console.h> -//#include <rtems/clockdrv.h> - -#include <bsp/beagle.h> +#include <rtems/irq-extension.h> -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ +#include <libcpu/omap3.h> +#include <libcpu/am335x.h> #define BSP_FEATURE_IRQ_EXTENSION -#ifndef ASM +/* UART base clock frequency */ +#define UART_CLOCK 48000000 -struct rtems_bsdnet_ifconfig; +/* Access memory-mapped I/O devices */ +#define mmio_read(a) (*(volatile uint32_t *)(a)) +#define mmio_write(a,v) (*(volatile uint32_t *)(a) = (v)) +#define mmio_set(a,v) mmio_write((a), mmio_read((a)) | (v)) +#define mmio_clear(a,v) mmio_write((a), mmio_read((a)) & ~(v)) -/** - * @defgroup beagle BEAGLE Support - * - * @ingroup bsp_kit - * - * @brief BEAGLE support package. - * - * @{ - */ +#define REG16(x)(*((volatile uint16_t *)(x))) +#define REG(x)(*((volatile uint32_t *)(x))) +#define BIT(x)(0x1 << x) -/** - * @brief Network driver attach and detach function. - */ -int beagle_eth_attach_detach( - struct rtems_bsdnet_ifconfig *config, - int attaching -); +#define udelay(u) rtems_task_wake_after(1 + ((u)/rtems_configuration_get_microseconds_per_tick())) -/** - * @brief Standard network driver attach and detach function. - */ -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH beagle_eth_attach_detach +/* Write a uint32_t value to a memory address. */ +static inline void +write32(uint32_t address, uint32_t value) +{ + REG(address) = value; +} -/** - * @brief Standard network driver name. - */ -#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" +/* Read an uint32_t from a memory address */ +static inline uint32_t +read32(uint32_t address) +{ + return REG(address); +} -/** - * @brief Optimized idle task. - * - * This idle task sets the power mode to idle. This causes the processor clock - * to be stopped, while on-chip peripherals remain active. Any enabled - * interrupt from a peripheral or an external interrupt source will cause the - * processor to resume execution. - * - * To enable the idle task use the following in the system configuration: - * - * @code - * #include <bsp.h> - * - * #define CONFIGURE_INIT - * - * #define CONFIGURE_IDLE_TASK_BODY beagle_idle - * - * #include <confdefs.h> - * @endcode - */ -void *beagleboard_idle(uintptr_t ignored); +/* Set a 32 bits value depending on a mask */ +static inline void +set32(uint32_t address, uint32_t mask, uint32_t value) +{ + uint32_t val; + val = read32(address); + /* clear the bits */ + val &= ~(mask); + /* apply the value using the mask */ + val |= (value & mask); + write32(address, val); +} -#define BEAGLE_STANDARD_TIMER (&beagle.timer_1) +/* Write a uint16_t value to a memory address. */ +static inline void +write16(uint32_t address, uint16_t value) +{ + REG16(address) = value; +} -static inline unsigned beagleboard_timer(void) +/* Read an uint16_t from a memory address */ +static inline uint16_t +read16(uint32_t address) { - volatile beagle_timer *timer = BEAGLE_STANDARD_TIMER; + return REG16(address); +} - return timer->tc; +/* Data synchronization barrier */ +static inline void dsb(void) +{ + asm volatile("dsb" : : : "memory"); } -static inline void beagleboard_micro_seconds_delay(unsigned us) +/* Instruction synchronization barrier */ +static inline void isb(void) { - unsigned start = beagleboard_timer(); - unsigned delay = us * (BEAGLE_PERIPH_CLK / 1000000); - unsigned elapsed = 0; + asm volatile("isb" : : : "memory"); +} - do { - elapsed = beagleboard_timer() - start; - } while (elapsed < delay); +/* flush data cache */ +static inline void flush_data_cache(void) +{ + asm volatile("mov r0, #0; mcr p15, #0, r0, c7, c10, #4" : : : "memory"); } -#if BEAGLE_OSCILLATOR_MAIN == 13000000U - #define BEAGLE_HCLKPLL_CTRL_INIT_VALUE \ - (HCLK_PLL_POWER | HCLK_PLL_DIRECT | HCLK_PLL_M(16 - 1)) - #define BEAGLE_HCLKDIV_CTRL_INIT_VALUE \ - (HCLK_DIV_HCLK(2 - 1) | \ - HCLK_DIV_PERIPH_CLK(16 - 1) | \ - HCLK_DIV_DDRAM_CLK(1)) -#else - #error "unexpected main oscillator frequency" + +#define TIMER_FREQ 1000 /* clock frequency for OMAP timer (1ms) */ +#define TIMER_COUNT(freq) (TIMER_FREQ/(freq)) /* initial value for counter*/ + +#define __arch_getb(a) (*(volatile unsigned char *)(a)) +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_getl(a) (*(volatile unsigned int *)(a)) + +#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) +#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) +#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) + +#define writeb(v,c) ({ unsigned char __v = v; __arch_putb(__v,c); __v; }) +#define writew(v,c) ({ unsigned short __v = v; __arch_putw(__v,c); __v; }) +#define writel(v,c) ({ unsigned int __v = v; __arch_putl(__v,c); __v; }) + +#define readb(c) ({ unsigned char __v = __arch_getb(c); __v; }) +#define readw(c) ({ unsigned short __v = __arch_getw(c); __v; }) +#define readl(c) ({ unsigned int __v = __arch_getl(c); __v; }) + +#define SYSTEM_CLOCK_12 12000000 +#define SYSTEM_CLOCK_13 13000000 +#define SYSTEM_CLOCK_192 19200000 +#define SYSTEM_CLOCK_96 96000000 + +#if !defined(IS_DM3730) && !defined(IS_AM335X) +#error Unrecognized BSP configured. #endif -bool beagleboard_start_pll_setup( - uint32_t hclkpll_ctrl, - uint32_t hclkdiv_ctrl, - bool force -); +#if IS_DM3730 +#define BSP_DEVICEMEM_START 0x48000000 +#define BSP_DEVICEMEM_END 0x5F000000 +#endif -uint32_t beagleboard__sysclk(void); +#if IS_AM335X +#define BSP_DEVICEMEM_START 0x44000000 +#define BSP_DEVICEMEM_END 0x57000000 +#endif -uint32_t beagleboard_hclkpll_clk(void); +/* per-target uart config */ +#if IS_AM335X +#define BSP_CONSOLE_UART 1 +#define BSP_CONSOLE_UART_BASE BEAGLE_BASE_UART_1 +#define BSP_CONSOLE_UART_IRQ OMAP3_UART1_IRQ +#define BEAGLE_BASE_UART_1 0x44E09000 +#define BEAGLE_BASE_UART_2 0x48022000 +#define BEAGLE_BASE_UART_3 0x48024000 +#endif -uint32_t beagleboard_periph_clk(void); +/* per-target uart config */ +#if IS_DM3730 +#define BSP_CONSOLE_UART 3 +#define BSP_CONSOLE_UART_BASE BEAGLE_BASE_UART_3 +#define BSP_CONSOLE_UART_IRQ OMAP3_UART3_IRQ +#define BEAGLE_BASE_UART_1 0x4806A000 +#define BEAGLE_BASE_UART_2 0x4806C000 +#define BEAGLE_BASE_UART_3 0x49020000 +#endif -uint32_t beagleboard_hclk(void); +/* i2c stuff */ +typedef struct { + uint32_t rx_or_tx; + uint32_t stat; + uint32_t ctrl; + uint32_t clk_hi; + uint32_t clk_lo; + uint32_t adr; + uint32_t rxfl; + uint32_t txfl; + uint32_t rxb; + uint32_t txb; + uint32_t s_tx; + uint32_t s_txfl; +} beagle_i2c; + +/* sctlr */ +/* Read System Control Register */ +static inline uint32_t read_sctlr() +{ + uint32_t ctl; -uint32_t beagleboard_arm_clk(void); + asm volatile("mrc p15, 0, %[ctl], c1, c0, 0 @ Read SCTLR\n\t" + : [ctl] "=r" (ctl)); + return ctl; +} -uint32_t beagleboard_dram_clk(void); +/* Write System Control Register */ +static inline void write_sctlr(uint32_t ctl) +{ + asm volatile("mcr p15, 0, %[ctl], c1, c0, 0 @ Write SCTLR\n\t" + : : [ctl] "r" (ctl)); + isb(); +} -void bsp_restart(void *addr); +/* Read Auxiliary Control Register */ +static inline uint32_t read_actlr() +{ + uint32_t ctl; -#define BSP_CONSOLE_UART_BASE BEAGLE_BASE_UART_5 + asm volatile("mrc p15, 0, %[ctl], c1, c0, 1 @ Read ACTLR\n\t" + : [ctl] "=r" (ctl)); + return ctl; +} -/** - * @brief Begin of magic zero area. - * - * A read from this area returns zero. Writes have no effect. - */ -//extern uint32_t beagle_magic_zero_begin []; +/* Write Auxiliary Control Register */ +static inline void write_actlr(uint32_t ctl) +{ + asm volatile("mcr p15, 0, %[ctl], c1, c0, 1 @ Write ACTLR\n\t" + : : [ctl] "r" (ctl)); + isb(); +} -/** - * @brief End of magic zero area. - * - * A read from this area returns zero. Writes have no effect. - */ -//extern uint32_t beagle_magic_zero_end []; +/* Write Translation Table Base Control Register */ +static inline void write_ttbcr(uint32_t bcr) +{ + asm volatile("mcr p15, 0, %[bcr], c2, c0, 2 @ Write TTBCR\n\t" + : : [bcr] "r" (bcr)); -/** - * @brief Size of magic zero area. - * - * A read from this area returns zero. Writes have no effect. + isb(); +} + +/* Read Domain Access Control Register */ +static inline uint32_t read_dacr() +{ + uint32_t dacr; + + asm volatile("mrc p15, 0, %[dacr], c3, c0, 0 @ Read DACR\n\t" + : [dacr] "=r" (dacr)); + + return dacr; +} + + +/* Write Domain Access Control Register */ +static inline void write_dacr(uint32_t dacr) +{ + asm volatile("mcr p15, 0, %[dacr], c3, c0, 0 @ Write DACR\n\t" + : : [dacr] "r" (dacr)); + + isb(); +} + +static inline void refresh_tlb(void) +{ + dsb(); + + /* Invalidate entire unified TLB */ + asm volatile("mcr p15, 0, %[zero], c8, c7, 0 @ TLBIALL\n\t" + : : [zero] "r" (0)); + + /* Invalidate all instruction caches to PoU. + * Also flushes branch target cache. */ + asm volatile("mcr p15, 0, %[zero], c7, c5, 0" + : : [zero] "r" (0)); + + /* Invalidate entire branch predictor array */ + asm volatile("mcr p15, 0, %[zero], c7, c5, 6" + : : [zero] "r" (0)); /* flush BTB */ + + dsb(); + isb(); +} + +/* Read Translation Table Base Register 0 */ +static inline uint32_t read_ttbr0() +{ + uint32_t bar; + + asm volatile("mrc p15, 0, %[bar], c2, c0, 0 @ Read TTBR0\n\t" + : [bar] "=r" (bar)); + + return bar & ARM_TTBR_ADDR_MASK; +} + + +/* Read Translation Table Base Register 0 */ +static inline uint32_t read_ttbr0_unmasked() +{ + uint32_t bar; + + asm volatile("mrc p15, 0, %[bar], c2, c0, 0 @ Read TTBR0\n\t" + : [bar] "=r" (bar)); + + return bar; +} + +/* Write Translation Table Base Register 0 */ +static inline void write_ttbr0(uint32_t bar) +{ + dsb(); + isb(); + /* In our setup TTBR contains the base address *and* the flags + but other pieces of the kernel code expect ttbr to be the + base address of the l1 page table. We therefore add the + flags here and remove them in the read_ttbr0 */ + uint32_t v = (bar & ARM_TTBR_ADDR_MASK ) | ARM_TTBR_FLAGS_CACHED; + asm volatile("mcr p15, 0, %[bar], c2, c0, 0 @ Write TTBR0\n\t" + : : [bar] "r" (v)); + + refresh_tlb(); +} + +/* Behaviour on fatal error; default: test-friendly. + * set breakpoint to bsp_fatal_extension. */ -//extern uint32_t beagle_magic_zero_size []; - -#ifdef BEAGLE_SCRATCH_AREA_SIZE - /** - * @rief Scratch area. - * - * The usage is application specific. - */ - //extern uint8_t beagle_scratch_area [BEAGLE_SCRATCH_AREA_SIZE]; -#endif +/* Enabling BSP_PRESS_KEY_FOR_RESET prevents noninteractive testing */ +/*#define BSP_PRESS_KEY_FOR_RESET 1 */ +#define BSP_PRINT_EXCEPTION_CONTEXT 1 + /* human-readable exception info */ +#define BSP_RESET_BOARD_AT_EXIT 1 + /* causes qemu to exit, signaling end of test */ -#define BEAGLE_DO_STOP_GPDMA \ - do { \ - if ((BEAGLE_DMACLK_CTRL & 0x1) != 0) { \ - if ((beagle.dma.cfg & DMA_CFG_E) != 0) { \ - int i = 0; \ - for (i = 0; i < 8; ++i) { \ - beagle.dma.channels [i].cfg = 0; \ - } \ - beagle.dma.cfg &= ~DMA_CFG_E; \ - } \ - BEAGLE_DMACLK_CTRL = 0; \ - } \ - } while (0) - -#define BEAGLE_DO_STOP_ETHERNET \ - do { \ - if ((BEAGLE_MAC_CLK_CTRL & 0x7) == 0x7) { \ - beagle.eth.command = 0x38; \ - beagle.eth.mac1 = 0xcf00; \ - beagle.eth.mac1 = 0; \ - BEAGLE_MAC_CLK_CTRL = 0; \ - } \ - } while (0) - -#define BEAGLE_DO_STOP_USB \ - do { \ - if ((BEAGLE_USB_CTRL & 0x010e8000) != 0) { \ - BEAGLE_OTG_CLK_CTRL = 0; \ - BEAGLE_USB_CTRL = 0x80000; \ - } \ - } while (0) - -#define BEAGLE_DO_RESTART(addr) \ - do { \ - ARM_SWITCH_REGISTERS; \ - rtems_interrupt_level level; \ - uint32_t ctrl = 0; \ - \ - rtems_interrupt_disable(level); \ - \ - arm_cp15_data_cache_test_and_clean(); \ - arm_cp15_instruction_cache_invalidate(); \ - \ - ctrl = arm_cp15_get_control(); \ - ctrl &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M); \ - arm_cp15_set_control(ctrl); \ - \ - __asm__ volatile ( \ - ARM_SWITCH_TO_ARM \ - "mov pc, %[addr]\n" \ - ARM_SWITCH_BACK \ - : ARM_SWITCH_OUTPUT \ - : [addr] "r" (addr) \ - ); \ - } while (0) - -/** @} */ /** - * @defgroup beagle BEAGLE Support + * @defgroup arm_beagle Beaglebone, Beagleboard Support * - * @ingroup beagle + * @ingroup bsp_arm + * + * @brief Beaglebones and beagleboards support package * - * @brief BEAGLE support package. */ -#endif /* ASM */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ +/** + * @brief Beagleboard specific set up of the MMU. + * + * Provide in the application to override. + */ +BSP_START_TEXT_SECTION void beagle_setup_mmu_and_cache(void); #endif /* LIBBSP_ARM_BEAGLE_BSP_H */ diff --git a/c/src/lib/libbsp/arm/beagle/include/i2c.h b/c/src/lib/libbsp/arm/beagle/include/i2c.h index 59b9364aba..dbd066a984 100644 --- a/c/src/lib/libbsp/arm/beagle/include/i2c.h +++ b/c/src/lib/libbsp/arm/beagle/include/i2c.h @@ -1,7 +1,7 @@ /** * @file * - * @ingroup beagle_i2c + * @ingroup arm_beagle * * @brief I2C support API. */ @@ -25,7 +25,7 @@ #include <rtems.h> -#include <bsp/beagle.h> +#include <bsp.h> #ifdef __cplusplus extern "C" { @@ -215,89 +215,6 @@ static int imw ( unsigned char chip, unsigned long addr, unsigned char byte ); static int imd( unsigned char chip, unsigned int addr, unsigned int length ); /** - * @defgroup beagle_i2c I2C Support - * - * @ingroup beagle - * - * @brief I2C Support - * - * All writes and reads will be performed in master mode. Exclusive bus access - * will be assumed. - * - * @{ - */ - -/** - * @name I2C Clock Control Register (I2CCLK_CTRL) - * - * @{ - */ - -//#define I2CCLK_1_EN BSP_BIT32(0) -//#define I2CCLK_2_EN BSP_BIT32(1) -//#define I2CCLK_1_HIGH_DRIVE BSP_BIT32(2) -//#define I2CCLK_2_HIGH_DRIVE BSP_BIT32(3) -//#define I2CCLK_USB_HIGH_DRIVE BSP_BIT32(4) - -/** @} */ - -/** - * @name I2C TX Data FIFO Register (I2Cn_TX) - * - * @{ - */ - -//#define I2C_TX_READ BSP_BIT32(0) -//#define I2C_TX_ADDR(val) BSP_FLD32(val, 1, 7) -//#define I2C_TX_START BSP_BIT32(8) -//#define I2C_TX_STOP BSP_BIT32(9) - -/** @} */ - -/** - * @name I2C Status Register (I2Cn_STAT) - * - * @{ - */ - -//#define I2C_STAT_TDI BSP_BIT32(0) -//#define I2C_STAT_AFI BSP_BIT32(1) -//#define I2C_STAT_NAI BSP_BIT32(2) -//#define I2C_STAT_DRMI BSP_BIT32(3) -//#define I2C_STAT_DRSI BSP_BIT32(4) -//#define I2C_STAT_ACTIVE BSP_BIT32(5) -//#define I2C_STAT_SCL BSP_BIT32(6) -//#define I2C_STAT_SDA BSP_BIT32(7) -//#define I2C_STAT_RFF BSP_BIT32(8) -//#define I2C_STAT_RFE BSP_BIT32(9) -//#define I2C_STAT_TFF BSP_BIT32(10) -//#define I2C_STAT_TFE BSP_BIT32(11) -//#define I2C_STAT_TFFS BSP_BIT32(12) -//#define I2C_STAT_TFES BSP_BIT32(13) - -/** @} */ - -/** - * @name I2C Control Register (I2Cn_CTRL) - * - * @{ - */ - -//#define I2C_CTRL_TDIE BSP_BIT32(0) -//#define I2C_CTRL_AFIE BSP_BIT32(1) -//#define I2C_CTRL_NAIE BSP_BIT32(2) -//#define I2C_CTRL_DRMIE BSP_BIT32(3) -//#define I2C_CTRL_DRSIE BSP_BIT32(4) -//#define I2C_CTRL_RFFIE BSP_BIT32(5) -//#define I2C_CTRL_RFDAIE BSP_BIT32(6) -//#define I2C_CTRL_TFFIO BSP_BIT32(7) -//#define I2C_CTRL_RESET BSP_BIT32(8) -//#define I2C_CTRL_SEVEN BSP_BIT32(9) -//#define I2C_CTRL_TFFSIE BSP_BIT32(10) - -/** @} */ - -/** * @brief Initializes the I2C module @a i2c. * * Valid @a clock_in_hz values are 100000 and 400000. @@ -444,8 +361,6 @@ static inline rtems_status_code beagle_i2c_read( return beagle_i2c_write_and_read(i2c, addr, NULL, 0, in, in_size); } -/** @} */ - #ifdef __cplusplus } #endif /* __cplusplus */ diff --git a/c/src/lib/libbsp/arm/beagle/include/irq.h b/c/src/lib/libbsp/arm/beagle/include/irq.h index c25939aa1c..4cbf3a271f 100644 --- a/c/src/lib/libbsp/arm/beagle/include/irq.h +++ b/c/src/lib/libbsp/arm/beagle/include/irq.h @@ -1,23 +1,9 @@ /** * @file * - * @ingroup bsp_interrupt + * @ingroup arm_beagle * - * @brief Interrupt definitions. - */ - -/* - * Copyright (c) 2012 Claas Ziemke. All rights reserved. - * - * Claas Ziemke - * Kernerstrasse 11 - * 70182 Stuttgart - * Germany - * <claas.ziemke@gmx.net> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. + * @brief Basic BSP IRQ info. */ #ifndef LIBBSP_ARM_BEAGLE_IRQ_H @@ -29,170 +15,8 @@ #include <rtems/irq.h> #include <rtems/irq-extension.h> -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @addtogroup bsp_interrupt - * - * @{ - */ - -#define BEAGLE_IRQ_INDEX(module, subindex) ((module) + (subindex)) - -#define BEAGLE_IRQ_MODULE_MIC 0U -#define BEAGLE_IRQ_MODULE_SIC_1 32U -#define BEAGLE_IRQ_MODULE_SIC_2 64U -#define BEAGLE_IRQ_MODULE_COUNT 3U - -/* MIC interrupts */ -#define BEAGLE_IRQ_SIC_1_IRQ BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 0) -#define BEAGLE_IRQ_SIC_2_IRQ BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 1) -#define BEAGLE_IRQ_TIMER_4_OR_MCPWM BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 3) -#define BEAGLE_IRQ_TIMER_5 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 4) -#define BEAGLE_IRQ_TIMER_HS BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 5) -#define BEAGLE_IRQ_WDG BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 6) - -#define BEAGLE_IRQ_UART_3 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 7) -#define BEAGLE_IRQ_UART_4 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 8) -#define BEAGLE_IRQ_UART_5 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 9) -#define BEAGLE_IRQ_UART_6 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 10) - -#define BEAGLE_IRQ_NAND_FLASH BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 11) -#define BEAGLE_IRQ_SDCARD_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 13) -#define BEAGLE_IRQ_LCD BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 14) -#define BEAGLE_IRQ_SDCARD_2 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 15) -#define BEAGLE_IRQ_TIMER_0 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 16) -#define BEAGLE_IRQ_TIMER_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 17) -#define BEAGLE_IRQ_TIMER_2 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 18) -#define BEAGLE_IRQ_TIMER_3 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 19) -#define BEAGLE_IRQ_SSP_0 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 20) -#define BEAGLE_IRQ_SSP_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 21) -#define BEAGLE_IRQ_I2S_0 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 22) -#define BEAGLE_IRQ_I2S_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 23) - -#define BEAGLE_IRQ_UART_7 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 24) -#define BEAGLE_IRQ_UART_2 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 25) -#define BEAGLE_IRQ_UART_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 26) - -#define BEAGLE_IRQ_TIMER_MS BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 27) -#define BEAGLE_IRQ_DMA BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 28) -#define BEAGLE_IRQ_ETHERNET BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 29) -#define BEAGLE_IRQ_SIC_1_FIQ BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 30) -#define BEAGLE_IRQ_SIC_2_FIQ BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 31) - -/* SIC 1 interrupts */ -#define BEAGLE_IRQ_JTAG_COMM_TX BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 1) -#define BEAGLE_IRQ_JTAG_COMM_RX BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 2) -#define BEAGLE_IRQ_GPI_28 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 4) -#define BEAGLE_IRQ_TS_P BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 6) -#define BEAGLE_IRQ_TS_IRQ_OR_ADC BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 7) -#define BEAGLE_IRQ_TS_AUX BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 8) -#define BEAGLE_IRQ_SPI_2 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 12) -#define BEAGLE_IRQ_PLL_USB BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 13) -#define BEAGLE_IRQ_PLL_HCLK BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 14) -#define BEAGLE_IRQ_PLL_397 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 17) -#define BEAGLE_IRQ_I2C_2 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 18) -#define BEAGLE_IRQ_I2C_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 19) -#define BEAGLE_IRQ_RTC BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 20) -#define BEAGLE_IRQ_KEYSCAN BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 22) -#define BEAGLE_IRQ_SPI_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 23) -#define BEAGLE_IRQ_SW BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 24) -#define BEAGLE_IRQ_USB_OTG_TIMER BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 25) -#define BEAGLE_IRQ_USB_OTG_ATX BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 26) -#define BEAGLE_IRQ_USB_HOST BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 27) -#define BEAGLE_IRQ_USB_DEV_DMA BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 28) -#define BEAGLE_IRQ_USB_DEV_LP BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 29) -#define BEAGLE_IRQ_USB_DEV_HP BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 30) -#define BEAGLE_IRQ_USB_I2C BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 31) - -/* SIC 2 interrupts */ -#define BEAGLE_IRQ_GPIO_0 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 0) -#define BEAGLE_IRQ_GPIO_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 1) -#define BEAGLE_IRQ_GPIO_2 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 2) -#define BEAGLE_IRQ_GPIO_3 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 3) -#define BEAGLE_IRQ_GPIO_4 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 4) -#define BEAGLE_IRQ_GPIO_5 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 5) -#define BEAGLE_IRQ_SPI_2_DATAIN BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 6) - -#define BEAGLE_IRQ_UART_2_HCTS BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 7) - -#define BEAGLE_IRQ_GPIO_P0_P1_IRQ BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 8) -#define BEAGLE_IRQ_GPI_8 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 9) -#define BEAGLE_IRQ_GPI_9 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 10) -#define BEAGLE_IRQ_GPI_19 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 11) - -#define BEAGLE_IRQ_UART_7_HCTS BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 12) - -#define BEAGLE_IRQ_GPI_7 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 15) -#define BEAGLE_IRQ_SDIO BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 18) - -#define BEAGLE_IRQ_UART_5_RX BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 19) - -#define BEAGLE_IRQ_SPI_1_DATAIN BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 20) -#define BEAGLE_IRQ_GPI_0 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 22) -#define BEAGLE_IRQ_GPI_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 23) -#define BEAGLE_IRQ_GPI_2 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 24) -#define BEAGLE_IRQ_GPI_3 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 25) -#define BEAGLE_IRQ_GPI_4 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 26) -#define BEAGLE_IRQ_GPI_5 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 27) -#define BEAGLE_IRQ_GPI_6 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 28) -#define BEAGLE_IRQ_SYSCLK BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 31) - -#define BEAGLE_IRQ_PRIORITY_VALUE_MIN 0U -#define BEAGLE_IRQ_PRIORITY_VALUE_MAX 15U -#define BEAGLE_IRQ_PRIORITY_COUNT (BEAGLE_IRQ_PRIORITY_VALUE_MAX + 1U) -#define BEAGLE_IRQ_PRIORITY_HIGHEST BEAGLE_IRQ_PRIORITY_VALUE_MIN -#define BEAGLE_IRQ_PRIORITY_LOWEST BEAGLE_IRQ_PRIORITY_VALUE_MAX - -#define BSP_INTERRUPT_VECTOR_MIN BEAGLE_IRQ_SIC_1_IRQ -#define BSP_INTERRUPT_VECTOR_MAX BEAGLE_IRQ_SYSCLK - -#define BEAGLE_IRQ_COUNT (BSP_INTERRUPT_VECTOR_MAX + 1) - -void beagle_irq_set_priority(rtems_vector_number vector, unsigned priority); - -unsigned beagle_irq_get_priority(rtems_vector_number vector); - -typedef enum { - BEAGLE_IRQ_ACTIVE_LOW_OR_FALLING_EDGE, - BEAGLE_IRQ_ACTIVE_HIGH_OR_RISING_EDGE -} beagle_irq_activation_polarity; - -void beagle_irq_set_activation_polarity( - rtems_vector_number vector, - beagle_irq_activation_polarity activation_polarity -); - -beagle_irq_activation_polarity beagle_irq_get_activation_polarity( - rtems_vector_number vector -); - -typedef enum { - BEAGLE_IRQ_LEVEL_SENSITIVE, - BEAGLE_IRQ_EDGE_SENSITIVE -} beagle_irq_activation_type; - -void beagle_irq_set_activation_type( - rtems_vector_number vector, - beagle_irq_activation_type activation_type -); - -beagle_irq_activation_type beagle_irq_get_activation_type( - rtems_vector_number vector -); - -void beagle_set_exception_handler( - Arm_symbolic_exception_name exception, - void (*handler)(void) -); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ +#define BSP_INTERRUPT_VECTOR_MIN 0 +#define BSP_INTERRUPT_VECTOR_MAX 127 #endif /* ASM */ |