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Diffstat (limited to 'c/src/exec/score/cpu/sparc/cpu_asm.s')
-rw-r--r--c/src/exec/score/cpu/sparc/cpu_asm.s19
1 files changed, 18 insertions, 1 deletions
diff --git a/c/src/exec/score/cpu/sparc/cpu_asm.s b/c/src/exec/score/cpu/sparc/cpu_asm.s
index d9af28e19e..2376ea53bf 100644
--- a/c/src/exec/score/cpu/sparc/cpu_asm.s
+++ b/c/src/exec/score/cpu/sparc/cpu_asm.s
@@ -489,7 +489,24 @@ dont_switch_stacks:
sub %sp, CPU_MINIMUM_STACK_FRAME_SIZE, %sp
- wr %l0, SPARC_PSR_ET_MASK, %psr ! **** ENABLE TRAPS ****
+ /*
+ * Check if we have an external interrupt (trap 0x11 - 0x1f). If so,
+ * set the PIL in the %psr to mask off interrupts with lower priority.
+ * The original %psr in %l0 is not modified since it will be restored
+ * when the interrupt handler returns.
+ */
+
+ mov %l0, %g5
+ subcc %l3, 0x11, %g0
+ bl dont_fix_pil
+ subcc %l3, 0x1f, %g0
+ bg dont_fix_pil
+ sll %l3, 8, %g4
+ and %g4, SPARC_PSR_PIL_MASK, %g4
+ andn %l0, SPARC_PSR_PIL_MASK, %g5
+ or %g4, %g5, %g5
+dont_fix_pil:
+ wr %g5, SPARC_PSR_ET_MASK, %psr ! **** ENABLE TRAPS ****
/*
* Vector to user's handler.