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-rw-r--r--c/src/exec/score/cpu/powerpc/mpc750/cpu.c2
-rw-r--r--c/src/exec/score/cpu/powerpc/mpc750/cpu.h18
2 files changed, 17 insertions, 3 deletions
diff --git a/c/src/exec/score/cpu/powerpc/mpc750/cpu.c b/c/src/exec/score/cpu/powerpc/mpc750/cpu.c
index b675f9e417..e1c6eac4fd 100644
--- a/c/src/exec/score/cpu/powerpc/mpc750/cpu.c
+++ b/c/src/exec/score/cpu/powerpc/mpc750/cpu.c
@@ -58,8 +58,6 @@ void _CPU_Initialize(
* _CPU_Context_Initialize
*/
-#define CPU_MINIMUM_STACK_FRAME_SIZE 8
-
void _CPU_Context_Initialize(
Context_Control *the_context,
unsigned32 *stack_base,
diff --git a/c/src/exec/score/cpu/powerpc/mpc750/cpu.h b/c/src/exec/score/cpu/powerpc/mpc750/cpu.h
index 3d5cc299b4..3d4afc4f06 100644
--- a/c/src/exec/score/cpu/powerpc/mpc750/cpu.h
+++ b/c/src/exec/score/cpu/powerpc/mpc750/cpu.h
@@ -344,6 +344,8 @@ extern "C" {
* a debugger such as gdb. But that is another problem.
*/
+#ifndef ASM
+
typedef struct {
unsigned32 gpr1; /* Stack pointer for all */
unsigned32 gpr2; /* TOC in PowerOpen, reserved SVR4, section ptr EABI + */
@@ -465,6 +467,8 @@ typedef struct {
SCORE_EXTERN void *_CPU_Interrupt_stack_low;
SCORE_EXTERN void *_CPU_Interrupt_stack_high;
+#endif /* ndef ASM */
+
/*
* This defines the number of levels and the mask used to pick those
* bits out of a thread mode.
@@ -489,7 +493,8 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high;
* Nothing prevents the porter from declaring more CPU specific variables.
*/
-
+#ifndef ASM
+
SCORE_EXTERN struct {
unsigned32 *Disable_level;
void *Stack;
@@ -498,6 +503,8 @@ SCORE_EXTERN struct {
} _CPU_IRQ_info CPU_STRUCTURE_ALIGNMENT;
+#endif /* ndef ASM */
+
/*
* The size of the floating point context area. On some CPUs this
* will not be a "sizeof" because the format of the floating point
@@ -584,6 +591,12 @@ SCORE_EXTERN struct {
#define CPU_STACK_ALIGNMENT (PPC_STACK_ALIGNMENT)
+/*
+ * Needed for Interrupt stack
+ */
+#define CPU_MINIMUM_STACK_FRAME_SIZE 8
+
+
/* ISR handler macros */
/*
@@ -593,6 +606,7 @@ SCORE_EXTERN struct {
#define loc_string(a,b) a " (" #b ")\n"
+#ifndef ASM
static inline unsigned32 _CPU_ISR_Get_level( void )
{
@@ -941,6 +955,8 @@ static inline unsigned64 PPC_Get_timebase_register( void )
return tbr;
}
+#endif /* ndef ASM */
+
#ifdef __cplusplus
}
#endif