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-rw-r--r--c/src/exec/score/cpu/mips/ChangeLog5
1 files changed, 5 insertions, 0 deletions
diff --git a/c/src/exec/score/cpu/mips/ChangeLog b/c/src/exec/score/cpu/mips/ChangeLog
index 0a3eca1838..c90be4053a 100644
--- a/c/src/exec/score/cpu/mips/ChangeLog
+++ b/c/src/exec/score/cpu/mips/ChangeLog
@@ -1,3 +1,8 @@
+2001-01-12 Joel Sherrill <joel@OARcorp.com>
+
+ * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
+ register constraints from "general" to "register".
+
2001-01-09 Joel Sherrill <joel@OARcorp.com>
* cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants