diff options
Diffstat (limited to 'c/src/exec/score/cpu/hppa1.1')
-rw-r--r-- | c/src/exec/score/cpu/hppa1.1/cpu.c | 21 | ||||
-rw-r--r-- | c/src/exec/score/cpu/hppa1.1/cpu.h | 9 | ||||
-rw-r--r-- | c/src/exec/score/cpu/hppa1.1/cpu_asm.s | 12 | ||||
-rw-r--r-- | c/src/exec/score/cpu/hppa1.1/hppa.h | 40 |
4 files changed, 63 insertions, 19 deletions
diff --git a/c/src/exec/score/cpu/hppa1.1/cpu.c b/c/src/exec/score/cpu/hppa1.1/cpu.c index f132033595..09c5d3d54b 100644 --- a/c/src/exec/score/cpu/hppa1.1/cpu.c +++ b/c/src/exec/score/cpu/hppa1.1/cpu.c @@ -14,12 +14,13 @@ * Division Incorporated makes no representations about the * suitability of this software for any purpose. * - * $Id$ + * cpu.c,v 1.7 1995/09/19 14:49:35 joel Exp */ #include <rtems/system.h> -#include <rtems/score/isr.h> -#include <rtems/score/wkspace.h> +#include <rtems/fatal.h> +#include <rtems/core/isr.h> +#include <rtems/core/wkspace.h> void hppa_external_interrupt_initialize(void); void hppa_external_interrupt_enable(unsigned32); @@ -105,6 +106,20 @@ void _CPU_Initialize( /*PAGE * + * _CPU_ISR_Get_level + */ + +unsigned32 _CPU_ISR_Get_level(void) +{ + int level; + HPPA_ASM_SSM(0, level); /* change no bits; just get copy */ + if (level & HPPA_PSW_I) + return 1; + return 0; +} + +/*PAGE + * * _CPU_ISR_install_raw_handler */ diff --git a/c/src/exec/score/cpu/hppa1.1/cpu.h b/c/src/exec/score/cpu/hppa1.1/cpu.h index af3573d9a8..caeee7c8ff 100644 --- a/c/src/exec/score/cpu/hppa1.1/cpu.h +++ b/c/src/exec/score/cpu/hppa1.1/cpu.h @@ -20,7 +20,7 @@ * Note: * This file is included by both C and assembler code ( -DASM ) * - * $Id$ + * cpu.h,v 1.5 1995/09/11 19:24:10 joel Exp */ #ifndef __CPU_h @@ -30,9 +30,9 @@ extern "C" { #endif -#include <rtems/score/hppa.h> /* pick up machine definitions */ +#include <rtems/core/hppa.h> /* pick up machine definitions */ #ifndef ASM -#include <rtems/score/hppatypes.h> +#include <rtems/core/hppatypes.h> #endif /* conditional compilation parameters */ @@ -368,6 +368,9 @@ EXTERN void *_CPU_Interrupt_stack_high; else HPPA_ASM_SSM(HPPA_PSW_I, ignore); \ } +/* return current level */ +unsigned32 _CPU_ISR_Get_level( void ); + /* end of ISR handler macros */ /* diff --git a/c/src/exec/score/cpu/hppa1.1/cpu_asm.s b/c/src/exec/score/cpu/hppa1.1/cpu_asm.s index afca4b773f..ea7c879183 100644 --- a/c/src/exec/score/cpu/hppa1.1/cpu_asm.s +++ b/c/src/exec/score/cpu/hppa1.1/cpu_asm.s @@ -1,4 +1,4 @@ -# @(#)cpu_asm.S 1.6 - 95/05/16 +# @(#)cpu_asm.S 1.7 - 95/09/21 # # # TODO: @@ -24,14 +24,14 @@ # Division Incorporated makes no representations about the # suitability of this software for any purpose. # -# $Id$ +# cpu_asm.S,v 1.5 1995/09/19 14:49:36 joel Exp # -#include <rtems/score/hppa.h> -#include <rtems/score/cpu_asm.h> -#include <rtems/score/cpu.h> +#include <rtems/core/hppa.h> +#include <rtems/core/cpu_asm.h> +#include <rtems/core/cpu.h> -#include <rtems/score/offsets.h> +#include <rtems/core/offsets.h> .SPACE $PRIVATE$ .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 diff --git a/c/src/exec/score/cpu/hppa1.1/hppa.h b/c/src/exec/score/cpu/hppa1.1/hppa.h index 74691eb1a7..1d9839995a 100644 --- a/c/src/exec/score/cpu/hppa1.1/hppa.h +++ b/c/src/exec/score/cpu/hppa1.1/hppa.h @@ -1,5 +1,5 @@ /* - * @(#)hppa.h 1.9 - 95/06/28 + * @(#)hppa.h 1.13 - 95/09/21 * * * Description: @@ -24,7 +24,7 @@ * Note: * This file is included by both C and assembler code ( -DASM ) * - * $Id$ + * hppa.h,v 1.4 1995/09/19 14:49:37 joel Exp */ #ifndef _INCLUDE_HPPA_H @@ -64,23 +64,23 @@ extern "C" { * present in a particular member of the family. */ -#if !defined(CPU_MODEL_NAME) +#if !defined(RTEMS_MODEL_NAME) #if defined(hppa7100) -#define CPU_MODEL_NAME "hppa 7100" +#define RTEMS_MODEL_NAME "hppa 7100" #elif defined(hppa7200) -#define CPU_MODEL_NAME "hppa 7200" +#define RTEMS_MODEL_NAME "hppa 7200" #else -#error "Unsupported CPU Model" +#define RTEMS_MODEL_NAME Unsupported CPU Model /* cause an error on usage */ #endif -#endif /* !defined(CPU_MODEL_NAME) */ +#endif /* !defined(RTEMS_MODEL_NAME) */ /* * Define the name of the CPU family. @@ -223,6 +223,32 @@ extern "C" { /* + * TLB characteristics + * + * Flags and Access Control layout for using TLB protection insertion + * + * 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3 + * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * |?|?|T|D|B|type |PL1|Pl2|U| access id |?| + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * + */ + +/* + * Access rights (type + PL1 + PL2) + */ +#define HPPA_PROT_R 0x00c00000 /* Read Only, no Write, no Execute */ +#define HPPA_PROT_RW 0x01c00000 /* Read & Write Only, no Execute */ +#define HPPA_PROT_RX 0x02c00000 /* Read & Execute Only, no Write */ +#define HPPA_PROT_RWX 0x03c00000 /* Read, Write, Execute */ +#define HPPA_PROT_X0 0x04c00000 /* Execute Only, Promote to Level 0 */ +#define HPPA_PROT_X1 0x05c00000 /* Execute Only, Promote to Level 1 */ +#define HPPA_PROT_X2 0x06c00000 /* Execute Only, Promote to Level 2 */ +#define HPPA_PROT_X3 0x07c00000 /* Execute Only, Promote to Level 3 */ + + +/* * Inline macros for misc. interesting opcodes */ |