diff options
Diffstat (limited to 'bsps/sparc/erc32/include')
-rw-r--r-- | bsps/sparc/erc32/include/bsp.h | 19 | ||||
-rw-r--r-- | bsps/sparc/erc32/include/bsp/irq.h | 47 | ||||
-rw-r--r-- | bsps/sparc/erc32/include/bsp/irqimpl.h | 63 | ||||
-rw-r--r-- | bsps/sparc/erc32/include/erc32.h | 5 | ||||
-rw-r--r-- | bsps/sparc/erc32/include/tm27.h | 35 |
5 files changed, 127 insertions, 42 deletions
diff --git a/bsps/sparc/erc32/include/bsp.h b/bsps/sparc/erc32/include/bsp.h index fd453fb6c2..1e8bddad33 100644 --- a/bsps/sparc/erc32/include/bsp.h +++ b/bsps/sparc/erc32/include/bsp.h @@ -105,7 +105,7 @@ typedef void (*bsp_shared_isr)(void *arg); * isr Function pointer to the ISR * arg Second argument to function isr */ -static __inline__ int BSP_shared_interrupt_register +RTEMS_DEPRECATED static inline int BSP_shared_interrupt_register ( int irq, const char *info, @@ -124,7 +124,7 @@ static __inline__ int BSP_shared_interrupt_register * isr Function pointer to the ISR * arg Second argument to function isr */ -static __inline__ int BSP_shared_interrupt_unregister +RTEMS_DEPRECATED static inline int BSP_shared_interrupt_unregister ( int irq, bsp_shared_isr isr, @@ -142,7 +142,10 @@ static __inline__ int BSP_shared_interrupt_unregister * Arguments * irq System IRQ number */ -extern void BSP_shared_interrupt_clear(int irq); +RTEMS_DEPRECATED static inline void BSP_shared_interrupt_clear( int irq ) +{ + (void) rtems_interrupt_clear( (rtems_vector_number) irq ); +} /* Enable Interrupt. This function will unmask the IRQ at the interrupt * controller. This is normally done by _register(). Note that this will @@ -151,7 +154,10 @@ extern void BSP_shared_interrupt_clear(int irq); * Arguments * irq System IRQ number */ -extern void BSP_shared_interrupt_unmask(int irq); +RTEMS_DEPRECATED static inline void BSP_shared_interrupt_unmask( int irq ) +{ + (void) rtems_interrupt_vector_enable( (rtems_vector_number) irq ); +} /* Disable Interrupt. This function will mask one IRQ at the interrupt * controller. This is normally done by _unregister(). Note that this will @@ -160,7 +166,10 @@ extern void BSP_shared_interrupt_unmask(int irq); * Arguments * irq System IRQ number */ -extern void BSP_shared_interrupt_mask(int irq); +RTEMS_DEPRECATED static inline void BSP_shared_interrupt_mask( int irq ) +{ + (void) rtems_interrupt_vector_disable( (rtems_vector_number) irq ); +} /* * Delay for the specified number of microseconds. diff --git a/bsps/sparc/erc32/include/bsp/irq.h b/bsps/sparc/erc32/include/bsp/irq.h index 83b383ba7a..210883ad05 100644 --- a/bsps/sparc/erc32/include/bsp/irq.h +++ b/bsps/sparc/erc32/include/bsp/irq.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @ingroup sparc_erc32 @@ -10,39 +12,36 @@ * Copyright (c) 2012. * Aeroflex Gaisler AB. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef LIBBSP_ERC32_IRQ_CONFIG_H #define LIBBSP_ERC32_IRQ_CONFIG_H -#include <rtems/score/processormask.h> +#include <rtems.h> #define BSP_INTERRUPT_VECTOR_MAX_STD 15 /* Standard IRQ controller */ #define BSP_INTERRUPT_VECTOR_COUNT (BSP_INTERRUPT_VECTOR_MAX_STD + 1) #define BSP_INTERRUPT_CUSTOM_VALID_VECTOR -RTEMS_INLINE_ROUTINE rtems_status_code bsp_interrupt_set_affinity( - rtems_vector_number vector, - const Processor_mask *affinity -) -{ - (void) vector; - (void) affinity; - return RTEMS_SUCCESSFUL; -} - -RTEMS_INLINE_ROUTINE rtems_status_code bsp_interrupt_get_affinity( - rtems_vector_number vector, - Processor_mask *affinity -) -{ - (void) vector; - _Processor_mask_From_index( affinity, 0 ); - return RTEMS_SUCCESSFUL; -} - #endif /* LIBBSP_ERC32_IRQ_CONFIG_H */ diff --git a/bsps/sparc/erc32/include/bsp/irqimpl.h b/bsps/sparc/erc32/include/bsp/irqimpl.h new file mode 100644 index 0000000000..6a8b17f188 --- /dev/null +++ b/bsps/sparc/erc32/include/bsp/irqimpl.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsSPARCERC32 + * + * @brief This header file provides interfaces used by the interrupt support + * implementation. + */ + +/* + * Copyright (C) 2023 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef LIBBSP_SPARC_ERC32_BSP_IRQIMPL_H +#define LIBBSP_SPARC_ERC32_BSP_IRQIMPL_H + +#include <stdint.h> + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @addtogroup RTEMSBSPsSPARCERC32 + * + * @{ + */ + +static inline uint32_t bsp_irq_fixup( uint32_t irq ) +{ + return irq; +} + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* LIBBSP_SPARC_ERC32_BSP_IRQIMPL_H */ diff --git a/bsps/sparc/erc32/include/erc32.h b/bsps/sparc/erc32/include/erc32.h index f9cdbc960a..3967f4c918 100644 --- a/bsps/sparc/erc32/include/erc32.h +++ b/bsps/sparc/erc32/include/erc32.h @@ -326,11 +326,6 @@ typedef struct { extern ERC32_Register_Map ERC32_MEC; -static __inline__ int bsp_irq_fixup(int irq) -{ - return irq; -} - /* * Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask, * and the Interrupt Pending Registers. diff --git a/bsps/sparc/erc32/include/tm27.h b/bsps/sparc/erc32/include/tm27.h index 2ed4f2b78c..90b885d876 100644 --- a/bsps/sparc/erc32/include/tm27.h +++ b/bsps/sparc/erc32/include/tm27.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @ingroup sparc_erc32 @@ -8,9 +10,26 @@ * COPYRIGHT (c) 2006. * Aeroflex Gaisler AB. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef _RTEMS_TMTEST27 @@ -40,6 +59,8 @@ #define MUST_WAIT_FOR_INTERRUPT 1 +#define TM27_USE_VECTOR_HANDLER + #define Install_tm27_vector( handler ) \ set_vector( (handler), TEST_VECTOR, 1 ); @@ -61,22 +82,20 @@ #define MUST_WAIT_FOR_INTERRUPT 1 -static inline void Install_tm27_vector( - void ( *handler )( rtems_vector_number ) -) +static inline void Install_tm27_vector( rtems_interrupt_handler handler ) { (void) rtems_interrupt_handler_install( TEST_INTERRUPT_SOURCE, "tm27 low", RTEMS_INTERRUPT_SHARED, - (rtems_interrupt_handler) handler, + handler, NULL ); (void) rtems_interrupt_handler_install( TEST_INTERRUPT_SOURCE2, "tm27 high", RTEMS_INTERRUPT_SHARED, - (rtems_interrupt_handler) handler, + handler, NULL ); } |