4 files changed, 4 insertions, 4 deletions
diff --git a/bsps/riscv/riscv/include/bsp/irq.h b/bsps/riscv/riscv/include/bsp/irq.h
index 93c9780111..0c0dc1a48e 100644
--- a/bsps/riscv/riscv/include/bsp/irq.h
+++ b/bsps/riscv/riscv/include/bsp/irq.h
@@ -9,7 +9,7 @@
  */
 
 /*
- * Copyright (c) 2018 embedded brains GmbH
+ * Copyright (c) 2018 embedded brains GmbH & Co. KG
  *
  * Copyright (c) 2015 University of York.
  * Hesham Almatary <hesham@alumni.york.ac.uk>
diff --git a/bsps/riscv/riscv/include/bsp/riscv.h b/bsps/riscv/riscv/include/bsp/riscv.h
index d294f1ae58..5f8edb650d 100644
--- a/bsps/riscv/riscv/include/bsp/riscv.h
+++ b/bsps/riscv/riscv/include/bsp/riscv.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018 embedded brains GmbH
+ * Copyright (c) 2018 embedded brains GmbH & Co. KG
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
diff --git a/bsps/riscv/riscv/include/dev/serial/htif.h b/bsps/riscv/riscv/include/dev/serial/htif.h
index 4b16d87468..48a3782e31 100644
--- a/bsps/riscv/riscv/include/dev/serial/htif.h
+++ b/bsps/riscv/riscv/include/dev/serial/htif.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018 embedded brains GmbH
+ * Copyright (c) 2018 embedded brains GmbH & Co. KG
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
diff --git a/bsps/riscv/riscv/include/tm27.h b/bsps/riscv/riscv/include/tm27.h
index 9fe6bcd255..239e860dc8 100644
--- a/bsps/riscv/riscv/include/tm27.h
+++ b/bsps/riscv/riscv/include/tm27.h
@@ -10,7 +10,7 @@
  */
 
 /*
- * Copyright (C) 2022 embedded brains GmbH
+ * Copyright (C) 2022 embedded brains GmbH & Co. KG
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions