diff options
Diffstat (limited to 'bsps/powerpc')
233 files changed, 1405 insertions, 436 deletions
diff --git a/bsps/powerpc/beatnik/include/bsp.h b/bsps/powerpc/beatnik/include/bsp.h index 477f03345d..a70bb3997f 100644 --- a/bsps/powerpc/beatnik/include/bsp.h +++ b/bsps/powerpc/beatnik/include/bsp.h @@ -173,12 +173,10 @@ extern void BSP_motload_pci_fixup(void); int BSP_i2c_initialize(void); /* Networking; */ -#if defined(RTEMS_NETWORKING) #include <bsp/bsp_bsdnet_attach.h> int rtems_em_attach(struct rtems_bsdnet_ifconfig *, int); int rtems_dec21140_driver_attach(struct rtems_bsdnet_ifconfig *, int); int rtems_dc_driver_attach(struct rtems_bsdnet_ifconfig *, int); -#endif /* NOT FOR PUBLIC USE BELOW HERE */ #define BSP_PCI_HOSE0_MEM_BASE 0x80000000 /* must be aligned to size */ diff --git a/bsps/powerpc/gen5200/ata/ata-dma-pio-single.c b/bsps/powerpc/gen5200/ata/ata-dma-pio-single.c index 35c6378cf3..90853378ed 100644 --- a/bsps/powerpc/gen5200/ata/ata-dma-pio-single.c +++ b/bsps/powerpc/gen5200/ata/ata-dma-pio-single.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2011-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/ata/ata-instance.c b/bsps/powerpc/gen5200/ata/ata-instance.c index ead42d7fc5..62d8186988 100644 --- a/bsps/powerpc/gen5200/ata/ata-instance.c +++ b/bsps/powerpc/gen5200/ata/ata-instance.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2011-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/ata/idecfg.c b/bsps/powerpc/gen5200/ata/idecfg.c index a87e027788..18692378bf 100644 --- a/bsps/powerpc/gen5200/ata/idecfg.c +++ b/bsps/powerpc/gen5200/ata/idecfg.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/ata/pcmcia_ide.c b/bsps/powerpc/gen5200/ata/pcmcia_ide.c index 931e22769d..640a252665 100644 --- a/bsps/powerpc/gen5200/ata/pcmcia_ide.c +++ b/bsps/powerpc/gen5200/ata/pcmcia_ide.c @@ -12,7 +12,7 @@ * Copyright (c) 2003 IMD Ingenieurbuero fuer Microcomputertechnik * All rights reserved. * Copyright (c) 2003 IPR Engineering - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/ata/pcmcia_ide.h b/bsps/powerpc/gen5200/ata/pcmcia_ide.h index 7dd7c9b63e..0171ff81a0 100644 --- a/bsps/powerpc/gen5200/ata/pcmcia_ide.h +++ b/bsps/powerpc/gen5200/ata/pcmcia_ide.h @@ -7,7 +7,7 @@ /* * Copyright (c) 2003 IPR Engineering - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/bestcomm/bestcomm_glue.c b/bsps/powerpc/gen5200/bestcomm/bestcomm_glue.c index 500585321b..37a6d46868 100644 --- a/bsps/powerpc/gen5200/bestcomm/bestcomm_glue.c +++ b/bsps/powerpc/gen5200/bestcomm/bestcomm_glue.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2004, 2005 embedded brains GmbH. All rights reserved. + * Copyright (C) 2004, 2005 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/console/console.c b/bsps/powerpc/gen5200/console/console.c index 9071754859..f92e88e403 100644 --- a/bsps/powerpc/gen5200/console/console.c +++ b/bsps/powerpc/gen5200/console/console.c @@ -30,7 +30,7 @@ * * Copyright (c) 2003, IPR Engineering * - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -681,7 +681,7 @@ rtems_device_driver console_open( mpc5200_uart_setAttributes, /* setAttributes */ NULL, NULL, - 1 /* outputUsesInterrupts */ + TERMIOS_IRQ_DRIVEN /* outputUsesInterrupts */ }; #else static const rtems_termios_callbacks pollCallbacks = { @@ -692,7 +692,7 @@ rtems_device_driver console_open( mpc5200_uart_setAttributes, /* setAttributes */ NULL, NULL, - 0 /* output don't use Interrupts */ + TERMIOS_POLLED /* output don't use Interrupts */ }; #endif diff --git a/bsps/powerpc/gen5200/dev/mpc5200-ata.c b/bsps/powerpc/gen5200/dev/mpc5200-ata.c index ec84ec99ce..6c190b05f7 100644 --- a/bsps/powerpc/gen5200/dev/mpc5200-ata.c +++ b/bsps/powerpc/gen5200/dev/mpc5200-ata.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2010-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/i2c/i2cdrv.c b/bsps/powerpc/gen5200/i2c/i2cdrv.c index 1d612f1ad6..556044cd26 100644 --- a/bsps/powerpc/gen5200/i2c/i2cdrv.c +++ b/bsps/powerpc/gen5200/i2c/i2cdrv.c @@ -15,7 +15,7 @@ /* * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia * Author: Victor V. Vengerov <vvv@oktet.ru> - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/i2c/mpc5200mbus.c b/bsps/powerpc/gen5200/i2c/mpc5200mbus.c index fa80097e2d..4db077da9d 100644 --- a/bsps/powerpc/gen5200/i2c/mpc5200mbus.c +++ b/bsps/powerpc/gen5200/i2c/mpc5200mbus.c @@ -10,7 +10,7 @@ /* * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia * Author: Victor V. Vengerov <vvv@oktet.ru> - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/i2c/mpc5200mbus.h b/bsps/powerpc/gen5200/i2c/mpc5200mbus.h index 16292e939f..f9afd13f7c 100644 --- a/bsps/powerpc/gen5200/i2c/mpc5200mbus.h +++ b/bsps/powerpc/gen5200/i2c/mpc5200mbus.h @@ -9,7 +9,7 @@ /* * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia * Author: Victor V. Vengerov <vvv@oktet.ru> - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/include/bsp.h b/bsps/powerpc/gen5200/include/bsp.h index 6288b1d86c..c9035fe1ac 100644 --- a/bsps/powerpc/gen5200/include/bsp.h +++ b/bsps/powerpc/gen5200/include/bsp.h @@ -15,7 +15,7 @@ */ /* - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/include/bsp/ata.h b/bsps/powerpc/gen5200/include/bsp/ata.h index fae238dbd4..162c0983c3 100644 --- a/bsps/powerpc/gen5200/include/bsp/ata.h +++ b/bsps/powerpc/gen5200/include/bsp/ata.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2010-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/include/bsp/bestcomm.h b/bsps/powerpc/gen5200/include/bsp/bestcomm.h index a7f2a8e52f..1f73429f3e 100644 --- a/bsps/powerpc/gen5200/include/bsp/bestcomm.h +++ b/bsps/powerpc/gen5200/include/bsp/bestcomm.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2010-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/include/bsp/bestcomm/bestcomm_glue.h b/bsps/powerpc/gen5200/include/bsp/bestcomm/bestcomm_glue.h index ad0b9040c9..29ceb0e6eb 100644 --- a/bsps/powerpc/gen5200/include/bsp/bestcomm/bestcomm_glue.h +++ b/bsps/powerpc/gen5200/include/bsp/bestcomm/bestcomm_glue.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2004, 2005 embedded brains GmbH. All rights reserved. + * Copyright (C) 2004, 2005 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/include/bsp/bestcomm_ops.h b/bsps/powerpc/gen5200/include/bsp/bestcomm_ops.h index 3c8c7be216..683f231449 100644 --- a/bsps/powerpc/gen5200/include/bsp/bestcomm_ops.h +++ b/bsps/powerpc/gen5200/include/bsp/bestcomm_ops.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2010-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/include/bsp/irq.h b/bsps/powerpc/gen5200/include/bsp/irq.h index 72f12c1a62..0a0b8d36c4 100644 --- a/bsps/powerpc/gen5200/include/bsp/irq.h +++ b/bsps/powerpc/gen5200/include/bsp/irq.h @@ -27,7 +27,7 @@ * * Copyright (c) 2003 IPR Engineering * - * Copyright (c) 2005, 2010 embedded brains GmbH. All rights reserved. + * Copyright (C) 2005, 2010 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/include/bsp/mpc5200.h b/bsps/powerpc/gen5200/include/bsp/mpc5200.h index a26cf4fff0..9b18287966 100644 --- a/bsps/powerpc/gen5200/include/bsp/mpc5200.h +++ b/bsps/powerpc/gen5200/include/bsp/mpc5200.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/include/bsp/mscan-base.h b/bsps/powerpc/gen5200/include/bsp/mscan-base.h index f2461bd759..f5abbefea3 100644 --- a/bsps/powerpc/gen5200/include/bsp/mscan-base.h +++ b/bsps/powerpc/gen5200/include/bsp/mscan-base.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: diff --git a/bsps/powerpc/gen5200/include/bsp/mscan.h b/bsps/powerpc/gen5200/include/bsp/mscan.h index 1440be314c..aa448ca8e2 100644 --- a/bsps/powerpc/gen5200/include/bsp/mscan.h +++ b/bsps/powerpc/gen5200/include/bsp/mscan.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/include/bsp/nvram.h b/bsps/powerpc/gen5200/include/bsp/nvram.h index 9abcf9dd1c..a6bdc19687 100644 --- a/bsps/powerpc/gen5200/include/bsp/nvram.h +++ b/bsps/powerpc/gen5200/include/bsp/nvram.h @@ -26,7 +26,7 @@ * * Copyright (c) 2003 IPR Engineering * - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/include/bsp/slicetimer.h b/bsps/powerpc/gen5200/include/bsp/slicetimer.h index 6e8da6edee..4ed524ff04 100644 --- a/bsps/powerpc/gen5200/include/bsp/slicetimer.h +++ b/bsps/powerpc/gen5200/include/bsp/slicetimer.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/include/bsp/u-boot-config.h b/bsps/powerpc/gen5200/include/bsp/u-boot-config.h index 7bab6e0797..96a39c79bd 100644 --- a/bsps/powerpc/gen5200/include/bsp/u-boot-config.h +++ b/bsps/powerpc/gen5200/include/bsp/u-boot-config.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/include/tm27.h b/bsps/powerpc/gen5200/include/tm27.h index bd3dbb2d85..d86e6c1d12 100644 --- a/bsps/powerpc/gen5200/include/tm27.h +++ b/bsps/powerpc/gen5200/include/tm27.h @@ -34,9 +34,9 @@ static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER, (rtems_irq_disable) nullFunc, (rtems_irq_is_enabled) nullFunc}; -RTEMS_INLINE_ROUTINE void Install_tm27_vector(void (*_handler)(void)) +static inline void Install_tm27_vector( rtems_interrupt_handler handler ) { - clockIrqData.hdl = _handler; + clockIrqData.hdl = handler; if (!BSP_install_rtems_irq_handler (&clockIrqData)) { printk("Error installing clock interrupt handler!\n"); bsp_fatal(MPC5200_FATAL_TM27_IRQ_INSTALL); diff --git a/bsps/powerpc/gen5200/irq/irq.c b/bsps/powerpc/gen5200/irq/irq.c index 665ea7ca9c..3dee82d566 100644 --- a/bsps/powerpc/gen5200/irq/irq.c +++ b/bsps/powerpc/gen5200/irq/irq.c @@ -12,7 +12,7 @@ * * Copyright (c) 2003 IPR Engineering. All rights reserved. * - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/mscan/mscan-base.c b/bsps/powerpc/gen5200/mscan/mscan-base.c index 55d03a3744..6df8b2d81f 100644 --- a/bsps/powerpc/gen5200/mscan/mscan-base.c +++ b/bsps/powerpc/gen5200/mscan/mscan-base.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: diff --git a/bsps/powerpc/gen5200/mscan/mscan.c b/bsps/powerpc/gen5200/mscan/mscan.c index 57387ed446..19fba1e8bd 100644 --- a/bsps/powerpc/gen5200/mscan/mscan.c +++ b/bsps/powerpc/gen5200/mscan/mscan.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/mscan/mscan_int.h b/bsps/powerpc/gen5200/mscan/mscan_int.h index 627f1fb942..5e571b43c2 100644 --- a/bsps/powerpc/gen5200/mscan/mscan_int.h +++ b/bsps/powerpc/gen5200/mscan/mscan_int.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/nvram/m93cxx.h b/bsps/powerpc/gen5200/nvram/m93cxx.h index 0c9034bfca..5852460767 100644 --- a/bsps/powerpc/gen5200/nvram/m93cxx.h +++ b/bsps/powerpc/gen5200/nvram/m93cxx.h @@ -18,7 +18,7 @@ */ /* - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * Copyright (c) 2003 IPR Engineering * * The license and distribution terms for this file may be diff --git a/bsps/powerpc/gen5200/nvram/nvram.c b/bsps/powerpc/gen5200/nvram/nvram.c index 742e06f628..cbeedc2e40 100644 --- a/bsps/powerpc/gen5200/nvram/nvram.c +++ b/bsps/powerpc/gen5200/nvram/nvram.c @@ -24,7 +24,7 @@ * Copyright (C) 2000 OKTET Ltd.,St.-Petersburg,Russia * Author: Victor V. Vengerov * Copyright (c) 2003 IPR Engineering - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/rtc/pcf8563.c b/bsps/powerpc/gen5200/rtc/pcf8563.c index fb37de111b..45f4574554 100644 --- a/bsps/powerpc/gen5200/rtc/pcf8563.c +++ b/bsps/powerpc/gen5200/rtc/pcf8563.c @@ -18,7 +18,7 @@ /* * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia * Author: Victor V. Vengerov <vvv@oktet.ru> - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/rtc/pcf8563.h b/bsps/powerpc/gen5200/rtc/pcf8563.h index b5310623b0..e1450aabbd 100644 --- a/bsps/powerpc/gen5200/rtc/pcf8563.h +++ b/bsps/powerpc/gen5200/rtc/pcf8563.h @@ -11,7 +11,7 @@ /* * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia * Author: Victor V. Vengerov <vvv@oktet.ru> - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/rtc/todcfg.c b/bsps/powerpc/gen5200/rtc/todcfg.c index dae6f070f4..38d1a22610 100644 --- a/bsps/powerpc/gen5200/rtc/todcfg.c +++ b/bsps/powerpc/gen5200/rtc/todcfg.c @@ -11,7 +11,7 @@ /* * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia * Author: Victor V. Vengerov <vvv@oktet.ru> - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/slicetimer/slicetimer.c b/bsps/powerpc/gen5200/slicetimer/slicetimer.c index 196e0df81d..4ce1959a4e 100644 --- a/bsps/powerpc/gen5200/slicetimer/slicetimer.c +++ b/bsps/powerpc/gen5200/slicetimer/slicetimer.c @@ -34,7 +34,7 @@ * * Copyright (c) 2003 IPR Engineering * - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/start/bestcomm.c b/bsps/powerpc/gen5200/start/bestcomm.c index 0175064ed4..935212ad83 100644 --- a/bsps/powerpc/gen5200/start/bestcomm.c +++ b/bsps/powerpc/gen5200/start/bestcomm.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2010-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen5200/start/bspstart.c b/bsps/powerpc/gen5200/start/bspstart.c index a776ff9c5b..899e21524a 100644 --- a/bsps/powerpc/gen5200/start/bspstart.c +++ b/bsps/powerpc/gen5200/start/bspstart.c @@ -38,7 +38,7 @@ * * Copyright (c) 2003 IPR Engineering * - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/start/cpuinit.c b/bsps/powerpc/gen5200/start/cpuinit.c index 5477541edb..ad2d6754c2 100644 --- a/bsps/powerpc/gen5200/start/cpuinit.c +++ b/bsps/powerpc/gen5200/start/cpuinit.c @@ -6,7 +6,7 @@ /* * Copyright (c) 2003 IPR Engineering - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen5200/start/linkcmds.gen5200_base b/bsps/powerpc/gen5200/start/linkcmds.gen5200_base index ecf33f3fe2..3e6e4b84f0 100644 --- a/bsps/powerpc/gen5200/start/linkcmds.gen5200_base +++ b/bsps/powerpc/gen5200/start/linkcmds.gen5200_base @@ -204,7 +204,7 @@ SECTIONS { KEEP (*(.eh_frame)) *(.gcc_except_table .gcc_except_table.*) KEEP (*(.jcr)) - *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) + *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) *(.fixup) *(.got1) *(.got2) diff --git a/bsps/powerpc/gen5200/start/start.S b/bsps/powerpc/gen5200/start/start.S index 54271d68d5..624e36c060 100644 --- a/bsps/powerpc/gen5200/start/start.S +++ b/bsps/powerpc/gen5200/start/start.S @@ -36,7 +36,7 @@ * of this software for any purpose. * * Copyright (c) 2003 IPR Engineering - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/gen83xx/console/console-config.c b/bsps/powerpc/gen83xx/console/console-config.c index ee4111a91b..d91de22067 100644 --- a/bsps/powerpc/gen83xx/console/console-config.c +++ b/bsps/powerpc/gen83xx/console/console-config.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2008-2014 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2014 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen83xx/dev/gtm.c b/bsps/powerpc/gen83xx/dev/gtm.c index 26148ef704..fd39b303f3 100644 --- a/bsps/powerpc/gen83xx/dev/gtm.c +++ b/bsps/powerpc/gen83xx/dev/gtm.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: diff --git a/bsps/powerpc/gen83xx/dev/mpc83xx_i2cdrv.c b/bsps/powerpc/gen83xx/dev/mpc83xx_i2cdrv.c index b41c8df140..44d238e859 100644 --- a/bsps/powerpc/gen83xx/dev/mpc83xx_i2cdrv.c +++ b/bsps/powerpc/gen83xx/dev/mpc83xx_i2cdrv.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen83xx/dev/mpc83xx_spidrv.c b/bsps/powerpc/gen83xx/dev/mpc83xx_spidrv.c index 57cefb3504..f96be67644 100644 --- a/bsps/powerpc/gen83xx/dev/mpc83xx_spidrv.c +++ b/bsps/powerpc/gen83xx/dev/mpc83xx_spidrv.c @@ -8,7 +8,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen83xx/i2c/i2c_init.c b/bsps/powerpc/gen83xx/i2c/i2c_init.c index 8fb456cffd..c1ee3d5558 100644 --- a/bsps/powerpc/gen83xx/i2c/i2c_init.c +++ b/bsps/powerpc/gen83xx/i2c/i2c_init.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen83xx/include/bsp.h b/bsps/powerpc/gen83xx/include/bsp.h index 5bdcedcb4a..146f2bd58a 100644 --- a/bsps/powerpc/gen83xx/include/bsp.h +++ b/bsps/powerpc/gen83xx/include/bsp.h @@ -15,7 +15,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen83xx/include/bsp/hwreg_vals.h b/bsps/powerpc/gen83xx/include/bsp/hwreg_vals.h index 53da2a39d2..01e68e1975 100644 --- a/bsps/powerpc/gen83xx/include/bsp/hwreg_vals.h +++ b/bsps/powerpc/gen83xx/include/bsp/hwreg_vals.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen83xx/include/bsp/irq.h b/bsps/powerpc/gen83xx/include/bsp/irq.h index d0a3ade01f..9d7d006810 100644 --- a/bsps/powerpc/gen83xx/include/bsp/irq.h +++ b/bsps/powerpc/gen83xx/include/bsp/irq.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2008, 2010 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2010 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen83xx/include/bsp/tsec-config.h b/bsps/powerpc/gen83xx/include/bsp/tsec-config.h index be3fec7339..f57c6d9e43 100644 --- a/bsps/powerpc/gen83xx/include/bsp/tsec-config.h +++ b/bsps/powerpc/gen83xx/include/bsp/tsec-config.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen83xx/include/bsp/u-boot-config.h b/bsps/powerpc/gen83xx/include/bsp/u-boot-config.h index 84f478bd10..5547e37d2c 100644 --- a/bsps/powerpc/gen83xx/include/bsp/u-boot-config.h +++ b/bsps/powerpc/gen83xx/include/bsp/u-boot-config.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen83xx/include/tm27.h b/bsps/powerpc/gen83xx/include/tm27.h index cb0c900066..95cca5fea2 100644 --- a/bsps/powerpc/gen83xx/include/tm27.h +++ b/bsps/powerpc/gen83xx/include/tm27.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -42,16 +42,16 @@ #define MUST_WAIT_FOR_INTERRUPT 1 -static void (*tm27_interrupt_handler)(rtems_vector_number); +static rtems_interrupt_handler tm27_interrupt_handler; static int tm27_exception_handler( BSP_Exception_frame *frame, unsigned number) { - (*tm27_interrupt_handler)( 0); + (*tm27_interrupt_handler)( NULL); return 0; } -static void Install_tm27_vector( void (*handler)(rtems_vector_number)) +static inline void Install_tm27_vector( rtems_interrupt_handler handler ) { int rv = 0; diff --git a/bsps/powerpc/gen83xx/irq/irq.c b/bsps/powerpc/gen83xx/irq/irq.c index 0b2ec263c4..f81fae2848 100644 --- a/bsps/powerpc/gen83xx/irq/irq.c +++ b/bsps/powerpc/gen83xx/irq/irq.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen83xx/spi/spi_init.c b/bsps/powerpc/gen83xx/spi/spi_init.c index 543f2cdac9..0455c225b0 100644 --- a/bsps/powerpc/gen83xx/spi/spi_init.c +++ b/bsps/powerpc/gen83xx/spi/spi_init.c @@ -8,7 +8,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen83xx/start/bspreset.c b/bsps/powerpc/gen83xx/start/bspreset.c index ff25fc5415..83255e9eb9 100644 --- a/bsps/powerpc/gen83xx/start/bspreset.c +++ b/bsps/powerpc/gen83xx/start/bspreset.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: diff --git a/bsps/powerpc/gen83xx/start/bsprestart.c b/bsps/powerpc/gen83xx/start/bsprestart.c index dec25e8c13..c20dd59e85 100644 --- a/bsps/powerpc/gen83xx/start/bsprestart.c +++ b/bsps/powerpc/gen83xx/start/bsprestart.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2008-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -46,7 +46,7 @@ void bsp_restart(void *addr) rtems_interrupt_disable(level); (void) level; /* avoid set but not used warning */ - hid0 = PPC_SPECIAL_PURPOSE_REGISTER(HID0); + PPC_SPECIAL_PURPOSE_REGISTER(HID0, hid0); if ((hid0 & HID0_DCE) != 0) { rtems_cache_flush_multiple_data_lines(mem_begin, mem_size); diff --git a/bsps/powerpc/gen83xx/start/bspstart.c b/bsps/powerpc/gen83xx/start/bspstart.c index 93f71da9e2..4b61d58be9 100644 --- a/bsps/powerpc/gen83xx/start/bspstart.c +++ b/bsps/powerpc/gen83xx/start/bspstart.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2014 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2014 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/gen83xx/start/cpuinit.c b/bsps/powerpc/gen83xx/start/cpuinit.c index 1e867bb323..72544de408 100644 --- a/bsps/powerpc/gen83xx/start/cpuinit.c +++ b/bsps/powerpc/gen83xx/start/cpuinit.c @@ -6,7 +6,7 @@ /* * Copyright (c) 2003 IPR Engineering - * Copyright (c) 2005 embedded brains GmbH. All rights reserved. + * Copyright (c) 2005 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -93,7 +93,7 @@ void cpu_init( void) clear_mmu_regs(); /* Clear caches */ - hid0 = PPC_SPECIAL_PURPOSE_REGISTER(HID0); + PPC_SPECIAL_PURPOSE_REGISTER(HID0, hid0); if ((hid0 & (HID0_ICE | HID0_DCE)) == 0) { hid0 &= ~(HID0_ILOCK | HID0_DLOCK | HID0_ICE | HID0_DCE); PPC_SET_SPECIAL_PURPOSE_REGISTER(HID0, hid0); diff --git a/bsps/powerpc/gen83xx/start/start.S b/bsps/powerpc/gen83xx/start/start.S index da1c310d61..73ce5ac532 100644 --- a/bsps/powerpc/gen83xx/start/start.S +++ b/bsps/powerpc/gen83xx/start/start.S @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/include/bsp/linker-symbols.h b/bsps/powerpc/include/bsp/linker-symbols.h index aae9c6fa55..4dc607034e 100644 --- a/bsps/powerpc/include/bsp/linker-symbols.h +++ b/bsps/powerpc/include/bsp/linker-symbols.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010, 2016 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/include/bsp/start.h b/bsps/powerpc/include/bsp/start.h index ec95a8fff2..009ea3ff33 100644 --- a/bsps/powerpc/include/bsp/start.h +++ b/bsps/powerpc/include/bsp/start.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/include/bsp/tictac.h b/bsps/powerpc/include/bsp/tictac.h index 9d87c04835..f34efa0a26 100644 --- a/bsps/powerpc/include/bsp/tictac.h +++ b/bsps/powerpc/include/bsp/tictac.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: diff --git a/bsps/powerpc/include/bsp/tsec.h b/bsps/powerpc/include/bsp/tsec.h index 984b80bbc0..c885c73598 100644 --- a/bsps/powerpc/include/bsp/tsec.h +++ b/bsps/powerpc/include/bsp/tsec.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -376,9 +376,9 @@ typedef struct { char *unit_name; volatile tsec_registers *reg_ptr; volatile tsec_registers *mdio_ptr; - rtems_irq_number irq_num_tx; - rtems_irq_number irq_num_rx; - rtems_irq_number irq_num_err; + rtems_vector_number irq_num_tx; + rtems_vector_number irq_num_rx; + rtems_vector_number irq_num_err; int phy_default; } tsec_config; diff --git a/bsps/powerpc/include/bsp/vectors.h b/bsps/powerpc/include/bsp/vectors.h index 894fe32074..97ba9531d8 100644 --- a/bsps/powerpc/include/bsp/vectors.h +++ b/bsps/powerpc/include/bsp/vectors.h @@ -13,7 +13,7 @@ * * Copyright (C) 2007 Till Straumann <strauman@slac.stanford.edu> * - * Copyright (C) 2009 embedded brains GmbH. + * Copyright (C) 2009 embedded brains GmbH & Co. KG * * Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com> * to support 603, 603e, 604, 604e exceptions diff --git a/bsps/powerpc/include/libcpu/powerpc-utility.h b/bsps/powerpc/include/libcpu/powerpc-utility.h index 922e5d2407..bfe0a68154 100644 --- a/bsps/powerpc/include/libcpu/powerpc-utility.h +++ b/bsps/powerpc/include/libcpu/powerpc-utility.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2008-2015 embedded brains GmbH. + * Copyright (C) 2008, 2015 embedded brains GmbH & Co. KG * * access function for Device Control Registers inspired by "ppc405common.h" * from Michael Hamel ADInstruments May 2008 @@ -577,15 +577,11 @@ static inline void ppc_set_decrementer_register(uint32_t dec) * * @note This macro uses a GNU C extension. */ -#define PPC_SPECIAL_PURPOSE_REGISTER(spr) \ - ({ \ - uint32_t val; \ - __asm__ volatile (\ - "mfspr %0, " PPC_STRINGOF(spr) \ - : "=r" (val) \ - ); \ - val;\ - } ) +#define PPC_SPECIAL_PURPOSE_REGISTER(spr, val) \ + __asm__ volatile (\ + "mfspr %0, " PPC_STRINGOF(spr) \ + : "=r" (val) \ + ) /** * @brief Sets the Special Purpose Register with number @a spr to the value in @@ -612,7 +608,7 @@ static inline void ppc_set_decrementer_register(uint32_t dec) uint32_t val; \ uint32_t mybits = bits; \ _ISR_Local_disable(level); \ - val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \ + PPC_SPECIAL_PURPOSE_REGISTER(spr, val); \ val |= mybits; \ PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \ _ISR_Local_enable(level); \ @@ -632,7 +628,7 @@ static inline void ppc_set_decrementer_register(uint32_t dec) uint32_t mybits = bits; \ uint32_t mymask = mask; \ _ISR_Local_disable(level); \ - val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \ + PPC_SPECIAL_PURPOSE_REGISTER(spr, val); \ val &= ~mymask; \ val |= mybits; \ PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \ @@ -651,7 +647,7 @@ static inline void ppc_set_decrementer_register(uint32_t dec) uint32_t val; \ uint32_t mybits = bits; \ _ISR_Local_disable(level); \ - val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \ + PPC_SPECIAL_PURPOSE_REGISTER(spr, val); \ val &= ~mybits; \ PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \ _ISR_Local_enable(level); \ @@ -790,7 +786,9 @@ static inline void ppc_set_time_base(uint32_t val) static inline uint32_t ppc_time_base_upper(void) { - return PPC_SPECIAL_PURPOSE_REGISTER(TBRU); + uint32_t val; + PPC_SPECIAL_PURPOSE_REGISTER(TBRU, val); + return val; } static inline void ppc_set_time_base_upper(uint32_t val) @@ -810,12 +808,16 @@ static inline void ppc_set_time_base_64(uint64_t val) static inline uint32_t ppc_alternate_time_base(void) { - return PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_ATBL); + uint32_t val; + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_ATBL, val); + return val; } static inline uint32_t ppc_alternate_time_base_upper(void) { - return PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_ATBU); + uint32_t val; + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_ATBU, val); + return val; } static inline uint64_t ppc_alternate_time_base_64(void) @@ -835,7 +837,9 @@ static inline uint64_t ppc_alternate_time_base_64(void) static inline uint32_t ppc_processor_id(void) { - return PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_PIR); + uint32_t val; + PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_PIR, val); + return val; } static inline void ppc_set_processor_id(uint32_t val) @@ -845,7 +849,9 @@ static inline void ppc_set_processor_id(uint32_t val) static inline uint32_t ppc_fsl_system_version(void) { - return PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_SVR); + uint32_t val; + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_SVR, val); + return val; } static inline uint32_t ppc_fsl_system_version_cid(uint32_t svr) diff --git a/bsps/powerpc/include/mpc83xx/gtm.h b/bsps/powerpc/include/mpc83xx/gtm.h index 176bc3cb2b..0d8994e97a 100644 --- a/bsps/powerpc/include/mpc83xx/gtm.h +++ b/bsps/powerpc/include/mpc83xx/gtm.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: diff --git a/bsps/powerpc/include/mpc83xx/mpc83xx_i2cdrv.h b/bsps/powerpc/include/mpc83xx/mpc83xx_i2cdrv.h index 1b73538bac..604a2fa564 100644 --- a/bsps/powerpc/include/mpc83xx/mpc83xx_i2cdrv.h +++ b/bsps/powerpc/include/mpc83xx/mpc83xx_i2cdrv.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/include/mpc83xx/mpc83xx_spidrv.h b/bsps/powerpc/include/mpc83xx/mpc83xx_spidrv.h index dd8cb898d9..0d4b5510c6 100644 --- a/bsps/powerpc/include/mpc83xx/mpc83xx_spidrv.h +++ b/bsps/powerpc/include/mpc83xx/mpc83xx_spidrv.h @@ -8,7 +8,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/motorola_powerpc/include/bsp.h b/bsps/powerpc/motorola_powerpc/include/bsp.h index 7d362bf406..d44bcd5cff 100644 --- a/bsps/powerpc/motorola_powerpc/include/bsp.h +++ b/bsps/powerpc/motorola_powerpc/include/bsp.h @@ -50,8 +50,8 @@ extern "C" { * _VME_A32_WIN0_ON_VME: VME address of that same window * * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between - * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI - * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to + * CPU and PCI addresses). The mvme2307/mvme2700 'ppcbug' firmware configures the + * PCI bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to * the base address read from PCI config.space in order to translate that * into a CPU address. * @@ -89,7 +89,7 @@ extern "C" { */ /* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */ -#if defined(mvme2100) +#if defined(mot_ppc_mvme2100) #define _IO_BASE CHRP_ISA_IO_BASE #define _ISA_MEM_BASE CHRP_ISA_MEM_BASE /* address of our ram on the PCI bus */ @@ -154,7 +154,7 @@ extern "C" { * find out what it is which is VERY different from other Motorola boards. */ -#if defined(mvme2100) +#if defined(mot_ppc_mvme2100) #define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000) /* #define BSP_UART_IOBASE_COM1 (0xffe10000) */ #define BSP_OPEN_PIC_BASE_OFFSET 0x40000 @@ -169,7 +169,7 @@ extern "C" { #define BSP_VGA_IOBASE ((_IO_BASE)+0x3c0) #endif -#if defined(mvme2300) +#if defined(mvme2300) || defined(mot_ppc_mvme2307) || defined(mot_ppc_mvme2700) #define MVME_HAS_DEC21140 #endif #endif @@ -190,7 +190,7 @@ extern int rtems_dec21140_driver_attach(struct rtems_bsdnet_ifconfig *, int); #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_ne_driver_attach extern int rtems_ne_driver_attach(struct rtems_bsdnet_ifconfig *, int); -RTEMS_INLINE_ROUTINE const char* bsp_cmdline_arg(const char* arg) +static inline const char* bsp_cmdline_arg(const char* arg) { return rtems_bsp_cmdline_get_param_raw(arg); } @@ -271,7 +271,7 @@ extern int BSP_connect_clock_handler (void); * It returns and clears the error bits of the PCI status register. * MCP support is disabled because: * a) the 2100 has no raven chip - * b) the raven (2300) would raise machine check interrupts + * b) the raven (2300, 2307, 2700) would raise machine check interrupts * on PCI config space access to empty slots. */ extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet); diff --git a/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h b/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h index 9b355819f1..9e57730d60 100644 --- a/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h +++ b/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h @@ -66,7 +66,7 @@ * available and unused! */ -#if defined(mvme2100) +#if defined(mot_ppc_mvme2100) #define _VME_A32_WIN0_ON_PCI 0x90000000 #define _VME_A24_ON_PCI 0x9f000000 #define _VME_A16_ON_PCI 0x9fff0000 diff --git a/bsps/powerpc/motorola_powerpc/include/bsp/irq.h b/bsps/powerpc/motorola_powerpc/include/bsp/irq.h index fea2859c3e..74bda323eb 100644 --- a/bsps/powerpc/motorola_powerpc/include/bsp/irq.h +++ b/bsps/powerpc/motorola_powerpc/include/bsp/irq.h @@ -133,7 +133,7 @@ extern "C" { #define BSP_PCI_ISA_BRIDGE_IRQ (BSP_PCI_IRQ0) #endif -#if defined(mvme2100) +#if defined(mot_ppc_mvme2100) #define BSP_DEC21143_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 1) #define BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 2) #define BSP_PCMIP_TYPE1_SLOT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 3) diff --git a/bsps/powerpc/motorola_powerpc/include/tm27.h b/bsps/powerpc/motorola_powerpc/include/tm27.h index 15e66f2a81..ffdd55706b 100644 --- a/bsps/powerpc/motorola_powerpc/include/tm27.h +++ b/bsps/powerpc/motorola_powerpc/include/tm27.h @@ -39,9 +39,9 @@ static rtems_irq_connect_data clockIrqData = .isOn = null_irq_is_enabled }; -static void Install_tm27_vector(rtems_isr (*_handler)(rtems_vector_number)) +static inline void Install_tm27_vector( rtems_interrupt_handler handler ) { - clockIrqData.hdl = (rtems_irq_hdl) _handler; + clockIrqData.hdl = handler; if (!BSP_install_rtems_irq_handler (&clockIrqData)) { printk("Error installing clock interrupt handler!\n"); rtems_fatal_error_occurred(1); diff --git a/bsps/powerpc/motorola_powerpc/start/bspreset.c b/bsps/powerpc/motorola_powerpc/start/bspreset.c index 0931badae4..d0af42284f 100644 --- a/bsps/powerpc/motorola_powerpc/start/bspreset.c +++ b/bsps/powerpc/motorola_powerpc/start/bspreset.c @@ -16,7 +16,7 @@ void bsp_reset(void) CPU_print_stack(); /* shutdown and reboot */ -#if defined(mvme2100) +#if defined(mot_ppc_mvme2100) *(unsigned char*)0xffe00000 |= 0x80; #else /* Memory-mapped Port 92 PIB device access diff --git a/bsps/powerpc/motorola_powerpc/start/bspstart.c b/bsps/powerpc/motorola_powerpc/start/bspstart.c index a781297565..894cf9d73d 100644 --- a/bsps/powerpc/motorola_powerpc/start/bspstart.c +++ b/bsps/powerpc/motorola_powerpc/start/bspstart.c @@ -109,7 +109,7 @@ char *save_boot_params( return loaderParam; } -#if defined(mvme2100) +#if defined(mot_ppc_mvme2100) unsigned int EUMBBAR; /* @@ -130,7 +130,7 @@ uint32_t _CPU_Counter_frequency(void) static void bsp_early( void ) { -#if !defined(mvme2100) +#if !defined(mot_ppc_mvme2100) unsigned l2cr; #endif prep_t boardManufacturer; @@ -149,7 +149,7 @@ static void bsp_early( void ) * Init MMU block address translation to enable hardware access */ -#if !defined(mvme2100) +#if !defined(mot_ppc_mvme2100) /* * PC legacy IO space used for inb/outb and all PC compatible hardware */ @@ -173,7 +173,7 @@ static void bsp_early( void ) setdbat(3, 0xb0000000, 0xb0000000, 0x10000000, IO_PAGE); #endif -#if defined(mvme2100) +#if defined(mot_ppc_mvme2100) /* Need 0xfec00000 mapped for this */ EUMBBAR = get_eumbbar(); #endif @@ -200,7 +200,7 @@ static void bsp_early( void ) #endif -#if !defined(mvme2100) +#if !defined(mot_ppc_mvme2100) /* * Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for * relevant CPU type (mpc750)... diff --git a/bsps/powerpc/motorola_powerpc/start/motorola.c b/bsps/powerpc/motorola_powerpc/start/motorola.c index 25b1d3aa3c..58c711f07b 100644 --- a/bsps/powerpc/motorola_powerpc/start/motorola.c +++ b/bsps/powerpc/motorola_powerpc/start/motorola.c @@ -368,7 +368,7 @@ motorolaBoard getMotorolaBoard(void) * * NOTE: Every path must set currentBoard. */ -#if defined(mvme2100) +#if defined(mot_ppc_mvme2100) currentBoard = (motorolaBoard) MVME_2100; #else unsigned char cpu_type; diff --git a/bsps/powerpc/mpc55xxevb/README b/bsps/powerpc/mpc55xxevb/README index df4a8e8a52..58011cf19a 100644 --- a/bsps/powerpc/mpc55xxevb/README +++ b/bsps/powerpc/mpc55xxevb/README @@ -8,7 +8,7 @@ Supported MCUs: Supported boards: - o embedded brains GmbH GWLCFM + o embedded brains GmbH & Co. KG o phyCORE MPC5554 o Freescale MPC5566EVB o Freescale XKT564L KIT diff --git a/bsps/powerpc/mpc55xxevb/clock/clock-config.c b/bsps/powerpc/mpc55xxevb/clock/clock-config.c index 429b692420..d48367ae1e 100644 --- a/bsps/powerpc/mpc55xxevb/clock/clock-config.c +++ b/bsps/powerpc/mpc55xxevb/clock/clock-config.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2009-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2009, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -41,8 +41,6 @@ #include <rtems/timecounter.h> -void Clock_isr(void *arg); - static rtems_timecounter_simple mpc55xx_tc; #if defined(MPC55XX_CLOCK_EMIOS_CHANNEL) @@ -75,16 +73,16 @@ static void mpc55xx_tc_at_tick(rtems_timecounter_simple *tc) EMIOS.CH [MPC55XX_CLOCK_EMIOS_CHANNEL].CSR.R = csr.R; } -static void mpc55xx_tc_tick(void) +static void mpc55xx_tc_tick(rtems_timecounter_simple *tc) { rtems_timecounter_simple_upcounter_tick( - &mpc55xx_tc, + tc, mpc55xx_tc_get, mpc55xx_tc_at_tick ); } -static void mpc55xx_clock_handler_install(rtems_isr_entry isr) +static void mpc55xx_clock_handler_install(rtems_interrupt_handler handler) { rtems_status_code sc = RTEMS_SUCCESSFUL; @@ -93,8 +91,8 @@ static void mpc55xx_clock_handler_install(rtems_isr_entry isr) "clock", RTEMS_INTERRUPT_UNIQUE, MPC55XX_INTC_MIN_PRIORITY, - (rtems_interrupt_handler) isr, - NULL + handler, + &mpc55xx_tc ); if (sc != RTEMS_SUCCESSFUL) { bsp_fatal(MPC55XX_FATAL_CLOCK_EMIOS_IRQ_INSTALL); @@ -190,16 +188,16 @@ static void mpc55xx_tc_at_tick(rtems_timecounter_simple *tc) channel->TFLG.R = tflg.R; } -static void mpc55xx_tc_tick(void) +static void mpc55xx_tc_tick(rtems_timecounter_simple *tc) { rtems_timecounter_simple_downcounter_tick( - &mpc55xx_tc, + tc, mpc55xx_tc_get, mpc55xx_tc_at_tick ); } -static void mpc55xx_clock_handler_install(rtems_isr_entry isr) +static void mpc55xx_clock_handler_install(rtems_interrupt_handler handler) { rtems_status_code sc = RTEMS_SUCCESSFUL; @@ -208,8 +206,8 @@ static void mpc55xx_clock_handler_install(rtems_isr_entry isr) "clock", RTEMS_INTERRUPT_UNIQUE, MPC55XX_INTC_MIN_PRIORITY, - (rtems_interrupt_handler) isr, - NULL + handler, + &mpc55xx_tc ); if (sc != RTEMS_SUCCESSFUL) { bsp_fatal(MPC55XX_FATAL_CLOCK_PIT_IRQ_INSTALL); @@ -240,7 +238,7 @@ static void mpc55xx_clock_initialize(void) #endif -#define Clock_driver_timecounter_tick() mpc55xx_tc_tick() +#define Clock_driver_timecounter_tick(arg) mpc55xx_tc_tick(arg) #define Clock_driver_support_initialize_hardware() \ mpc55xx_clock_initialize() #define Clock_driver_support_install_isr(isr) \ diff --git a/bsps/powerpc/mpc55xxevb/console/console-config.c b/bsps/powerpc/mpc55xxevb/console/console-config.c index 72d92230d9..77c970d055 100644 --- a/bsps/powerpc/mpc55xxevb/console/console-config.c +++ b/bsps/powerpc/mpc55xxevb/console/console-config.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2011-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/console/console-esci.c b/bsps/powerpc/mpc55xxevb/console/console-esci.c index 3add36915c..52cde2e46d 100644 --- a/bsps/powerpc/mpc55xxevb/console/console-esci.c +++ b/bsps/powerpc/mpc55xxevb/console/console-esci.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/console/console-generic.c b/bsps/powerpc/mpc55xxevb/console/console-generic.c index 1078e508f5..7b8d492530 100644 --- a/bsps/powerpc/mpc55xxevb/console/console-generic.c +++ b/bsps/powerpc/mpc55xxevb/console/console-generic.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/console/console-linflex.c b/bsps/powerpc/mpc55xxevb/console/console-linflex.c index 0a89ccb90f..7d4f04fe68 100644 --- a/bsps/powerpc/mpc55xxevb/console/console-linflex.c +++ b/bsps/powerpc/mpc55xxevb/console/console-linflex.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2011-2014 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2014 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/dev/dspi.c b/bsps/powerpc/mpc55xxevb/dev/dspi.c index eef17c2ef9..2b168ba9af 100644 --- a/bsps/powerpc/mpc55xxevb/dev/dspi.c +++ b/bsps/powerpc/mpc55xxevb/dev/dspi.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: diff --git a/bsps/powerpc/mpc55xxevb/i2c/i2c_init.c b/bsps/powerpc/mpc55xxevb/i2c/i2c_init.c index 16f54b1f96..f4bbb8852f 100644 --- a/bsps/powerpc/mpc55xxevb/i2c/i2c_init.c +++ b/bsps/powerpc/mpc55xxevb/i2c/i2c_init.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/bsp.h b/bsps/powerpc/mpc55xxevb/include/bsp.h index f5b817cee6..47b7d98ce9 100644 --- a/bsps/powerpc/mpc55xxevb/include/bsp.h +++ b/bsps/powerpc/mpc55xxevb/include/bsp.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/bsp/console-esci.h b/bsps/powerpc/mpc55xxevb/include/bsp/console-esci.h index 0870114396..61b6e88357 100644 --- a/bsps/powerpc/mpc55xxevb/include/bsp/console-esci.h +++ b/bsps/powerpc/mpc55xxevb/include/bsp/console-esci.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/bsp/console-generic.h b/bsps/powerpc/mpc55xxevb/include/bsp/console-generic.h index 7d24802f54..116a056df7 100644 --- a/bsps/powerpc/mpc55xxevb/include/bsp/console-generic.h +++ b/bsps/powerpc/mpc55xxevb/include/bsp/console-generic.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/bsp/console-linflex.h b/bsps/powerpc/mpc55xxevb/include/bsp/console-linflex.h index 06db7d8a85..3ab16812e0 100644 --- a/bsps/powerpc/mpc55xxevb/include/bsp/console-linflex.h +++ b/bsps/powerpc/mpc55xxevb/include/bsp/console-linflex.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/bsp/irq.h b/bsps/powerpc/mpc55xxevb/include/bsp/irq.h index ae2d20f7bd..0df805791e 100644 --- a/bsps/powerpc/mpc55xxevb/include/bsp/irq.h +++ b/bsps/powerpc/mpc55xxevb/include/bsp/irq.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -485,14 +485,14 @@ rtems_status_code mpc55xx_intc_raise_software_irq(rtems_vector_number vector); rtems_status_code mpc55xx_intc_clear_software_irq(rtems_vector_number vector); /** - * @addtogroup bsp_interrupt + * @addtogroup RTEMSImplClassicIntr * * @{ */ #define BSP_INTERRUPT_VECTOR_COUNT (MPC55XX_IRQ_MAX + 1) -#ifdef BSP_INTERRUPT_HANDLER_TABLE_SIZE +#ifdef BSP_INTERRUPT_DISPATCH_TABLE_SIZE #define BSP_INTERRUPT_USE_INDEX_TABLE #endif diff --git a/bsps/powerpc/mpc55xxevb/include/bsp/mpc55xx-config.h b/bsps/powerpc/mpc55xxevb/include/bsp/mpc55xx-config.h index a774e25ef5..97f2dceb1f 100644 --- a/bsps/powerpc/mpc55xxevb/include/bsp/mpc55xx-config.h +++ b/bsps/powerpc/mpc55xxevb/include/bsp/mpc55xx-config.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/bsp/smsc9218i.h b/bsps/powerpc/mpc55xxevb/include/bsp/smsc9218i.h index cd8a6c6b69..187f442eee 100644 --- a/bsps/powerpc/mpc55xxevb/include/bsp/smsc9218i.h +++ b/bsps/powerpc/mpc55xxevb/include/bsp/smsc9218i.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2009-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2009, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/dspi.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/dspi.h index 5aeab2f6fd..b185223061 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/dspi.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/dspi.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/edma.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/edma.h index 471e03664a..500b0bac6a 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/edma.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/edma.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/emios.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/emios.h index 5b65db107b..2e8a25d634 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/emios.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/emios.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2009, 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc551x.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc551x.h index 2f03065641..d62a17c97f 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc551x.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc551x.h @@ -1,7 +1,7 @@ /* * Modifications of the original file provided by Freescale are: * - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc555x.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc555x.h index 574c060807..69f813f293 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc555x.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc555x.h @@ -1,7 +1,7 @@ /* * Modifications of the original file provided by Freescale are: * - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc556x.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc556x.h index d415cf3f92..8892b261c8 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc556x.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc556x.h @@ -1,7 +1,7 @@ /* * Modifications of the original file provided by Freescale are: * - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc564xL.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc564xL.h index a786db1079..e8223ec57f 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc564xL.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc564xL.h @@ -2,7 +2,7 @@ * Modifications of the original file provided by Freescale Semiconductor and * ST Microelectronics are: * - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc5668.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc5668.h index 30c3d3ebfd..19e6115cd6 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc5668.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc5668.h @@ -1,7 +1,7 @@ /* * Modifications of the original file provided by Freescale are: * - * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * Copyright (c) 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc567x.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc567x.h index d82f052f76..2014316117 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc567x.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/fsl-mpc567x.h @@ -1,7 +1,7 @@ /* * Modifications of the original file provided by Freescale are: * - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/mpc55xx.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/mpc55xx.h index 0cd4aa9f0e..aebc73b4a9 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/mpc55xx.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/mpc55xx.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/reg-defs.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/reg-defs.h index 9f3fc7879b..4eac946679 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/reg-defs.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/reg-defs.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2014 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2014 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/regs-edma.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/regs-edma.h index 48bf77666c..5555d9bc2d 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/regs-edma.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/regs-edma.h @@ -5,7 +5,7 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/regs-mmu.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/regs-mmu.h index a687335feb..d4b9a4032d 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/regs-mmu.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/regs-mmu.h @@ -5,7 +5,7 @@ */ /* - * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2011 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/regs.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/regs.h index ab86053b20..c4c979ab66 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/regs.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/regs.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2008-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/siu.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/siu.h index 42b16408cc..caa83868a9 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/siu.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/siu.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/include/mpc55xx/watchdog.h b/bsps/powerpc/mpc55xxevb/include/mpc55xx/watchdog.h index b9c22d9e54..fabb8c5ba3 100644 --- a/bsps/powerpc/mpc55xxevb/include/mpc55xx/watchdog.h +++ b/bsps/powerpc/mpc55xxevb/include/mpc55xx/watchdog.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: diff --git a/bsps/powerpc/mpc55xxevb/start/bspgetworkarea.c b/bsps/powerpc/mpc55xxevb/start/bspgetworkarea.c index 6c99eaf741..1069cef722 100644 --- a/bsps/powerpc/mpc55xxevb/start/bspgetworkarea.c +++ b/bsps/powerpc/mpc55xxevb/start/bspgetworkarea.c @@ -12,7 +12,7 @@ */ /* - * Copyright (C) 2012, 2019 embedded brains GmbH (http://www.embedded-brains.de) + * Copyright (C) 2012, 2019 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/bspreset.c b/bsps/powerpc/mpc55xxevb/start/bspreset.c index 2f343488cb..3cab952b3f 100644 --- a/bsps/powerpc/mpc55xxevb/start/bspreset.c +++ b/bsps/powerpc/mpc55xxevb/start/bspreset.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/bspstart.c b/bsps/powerpc/mpc55xxevb/start/bspstart.c index 4c4bd87462..23d8ef5bf3 100644 --- a/bsps/powerpc/mpc55xxevb/start/bspstart.c +++ b/bsps/powerpc/mpc55xxevb/start/bspstart.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -69,7 +69,7 @@ static void null_pointer_protection(void) PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS0, mmu.MAS0.R); __asm__ volatile ("tlbre"); - mmu.MAS1.R = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mmu.MAS1.R); mmu.MAS1.B.VALID = 0; PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mmu.MAS1.R); __asm__ volatile ("tlbwe"); diff --git a/bsps/powerpc/mpc55xxevb/start/copy.S b/bsps/powerpc/mpc55xxevb/start/copy.S index 32eb9135b9..18f62f0cfc 100644 --- a/bsps/powerpc/mpc55xxevb/start/copy.S +++ b/bsps/powerpc/mpc55xxevb/start/copy.S @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: diff --git a/bsps/powerpc/mpc55xxevb/start/edma.c b/bsps/powerpc/mpc55xxevb/start/edma.c index f2053d22b0..6f86400c11 100644 --- a/bsps/powerpc/mpc55xxevb/start/edma.c +++ b/bsps/powerpc/mpc55xxevb/start/edma.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/emios.c b/bsps/powerpc/mpc55xxevb/start/emios.c index 79136d9b17..f83054199b 100644 --- a/bsps/powerpc/mpc55xxevb/start/emios.c +++ b/bsps/powerpc/mpc55xxevb/start/emios.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2009, 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/exc-vector-base.S b/bsps/powerpc/mpc55xxevb/start/exc-vector-base.S index 20a51f2aeb..96232bb94a 100644 --- a/bsps/powerpc/mpc55xxevb/start/exc-vector-base.S +++ b/bsps/powerpc/mpc55xxevb/start/exc-vector-base.S @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/flash_support.c b/bsps/powerpc/mpc55xxevb/start/flash_support.c index c7382ca4d4..a6dfe119e5 100644 --- a/bsps/powerpc/mpc55xxevb/start/flash_support.c +++ b/bsps/powerpc/mpc55xxevb/start/flash_support.c @@ -297,9 +297,9 @@ addr_map( rtems_interrupt_disable(level); PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS0, mas0); asm volatile("tlbre"); - mas1 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1); - mas2 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS2); - mas3 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mas1); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS2, mas2); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3, mas3); rtems_interrupt_enable(level); if (mas1 & 0x80000000) { @@ -671,7 +671,7 @@ mpc55xx_flash_writable(void) rtems_interrupt_disable(level); PPC_SET_SPECIAL_PURPOSE_REGISTER( FSL_EIS_MAS0, 0x10010000); asm volatile("tlbre"); - mas3 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3, mas3); rtems_interrupt_enable(level); return ((mas3 & 0x0000000C) == 0x0000000C) ? 1 : 0; @@ -689,7 +689,7 @@ mpc55xx_flash_address(void) rtems_interrupt_disable(level); PPC_SET_SPECIAL_PURPOSE_REGISTER( FSL_EIS_MAS0, 0x10010000); asm volatile("tlbre"); - mas2 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS2); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS2, mas2); rtems_interrupt_enable(level); return mas2 & 0xFFFFF000; diff --git a/bsps/powerpc/mpc55xxevb/start/get-system-clock.c b/bsps/powerpc/mpc55xxevb/start/get-system-clock.c index 2be89d09a8..2a12ff89a7 100644 --- a/bsps/powerpc/mpc55xxevb/start/get-system-clock.c +++ b/bsps/powerpc/mpc55xxevb/start/get-system-clock.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/idle-thread.c b/bsps/powerpc/mpc55xxevb/start/idle-thread.c index d22c3ad9e6..b73759e25a 100644 --- a/bsps/powerpc/mpc55xxevb/start/idle-thread.c +++ b/bsps/powerpc/mpc55xxevb/start/idle-thread.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2012 embedded brains GmbH. All rights reserved. + * Copyright (c) 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/irq.c b/bsps/powerpc/mpc55xxevb/start/irq.c index 25bcec9108..05397ee7b1 100644 --- a/bsps/powerpc/mpc55xxevb/start/irq.c +++ b/bsps/powerpc/mpc55xxevb/start/irq.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/restart.c b/bsps/powerpc/mpc55xxevb/start/restart.c index 921e25fd7f..8aaa7febf6 100644 --- a/bsps/powerpc/mpc55xxevb/start/restart.c +++ b/bsps/powerpc/mpc55xxevb/start/restart.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/sd-card-init.c b/bsps/powerpc/mpc55xxevb/start/sd-card-init.c index 3a88ce01b6..4c8e003d41 100644 --- a/bsps/powerpc/mpc55xxevb/start/sd-card-init.c +++ b/bsps/powerpc/mpc55xxevb/start/sd-card-init.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: diff --git a/bsps/powerpc/mpc55xxevb/start/siu.c b/bsps/powerpc/mpc55xxevb/start/siu.c index 1fc19e2ff0..49718a45cc 100644 --- a/bsps/powerpc/mpc55xxevb/start/siu.c +++ b/bsps/powerpc/mpc55xxevb/start/siu.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/start-cache.S b/bsps/powerpc/mpc55xxevb/start/start-cache.S index 296563900c..8c00a8ebd1 100644 --- a/bsps/powerpc/mpc55xxevb/start/start-cache.S +++ b/bsps/powerpc/mpc55xxevb/start/start-cache.S @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/start-clock.c b/bsps/powerpc/mpc55xxevb/start/start-clock.c index 6765e0ed73..c042f7201e 100644 --- a/bsps/powerpc/mpc55xxevb/start/start-clock.c +++ b/bsps/powerpc/mpc55xxevb/start/start-clock.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/start-config-clock.c b/bsps/powerpc/mpc55xxevb/start/start-config-clock.c index f6bae54ebe..273485133f 100644 --- a/bsps/powerpc/mpc55xxevb/start/start-config-clock.c +++ b/bsps/powerpc/mpc55xxevb/start/start-config-clock.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/start-config-ebi-cs-cal.c b/bsps/powerpc/mpc55xxevb/start/start-config-ebi-cs-cal.c index 0df2c6ba1d..2d19d3c4ed 100644 --- a/bsps/powerpc/mpc55xxevb/start/start-config-ebi-cs-cal.c +++ b/bsps/powerpc/mpc55xxevb/start/start-config-ebi-cs-cal.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/start-config-ebi-cs.c b/bsps/powerpc/mpc55xxevb/start/start-config-ebi-cs.c index 7bf86ba9bc..c8b658aa29 100644 --- a/bsps/powerpc/mpc55xxevb/start/start-config-ebi-cs.c +++ b/bsps/powerpc/mpc55xxevb/start/start-config-ebi-cs.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/start-config-ebi.c b/bsps/powerpc/mpc55xxevb/start/start-config-ebi.c index c4759243aa..78e61319b0 100644 --- a/bsps/powerpc/mpc55xxevb/start/start-config-ebi.c +++ b/bsps/powerpc/mpc55xxevb/start/start-config-ebi.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2012 embedded brains GmbH. All rights reserved. + * Copyright (c) 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/start-config-mmu-early.c b/bsps/powerpc/mpc55xxevb/start/start-config-mmu-early.c index 4f6bebd594..1c78d2746f 100644 --- a/bsps/powerpc/mpc55xxevb/start/start-config-mmu-early.c +++ b/bsps/powerpc/mpc55xxevb/start/start-config-mmu-early.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/start-config-mmu.c b/bsps/powerpc/mpc55xxevb/start/start-config-mmu.c index 455a97c618..cc9a080006 100644 --- a/bsps/powerpc/mpc55xxevb/start/start-config-mmu.c +++ b/bsps/powerpc/mpc55xxevb/start/start-config-mmu.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/start-config-siu-pcr.c b/bsps/powerpc/mpc55xxevb/start/start-config-siu-pcr.c index f23fe1d338..966d0ca141 100644 --- a/bsps/powerpc/mpc55xxevb/start/start-config-siu-pcr.c +++ b/bsps/powerpc/mpc55xxevb/start/start-config-siu-pcr.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/start-early.c b/bsps/powerpc/mpc55xxevb/start/start-early.c index 2467b9247f..2d7253440a 100644 --- a/bsps/powerpc/mpc55xxevb/start/start-early.c +++ b/bsps/powerpc/mpc55xxevb/start/start-early.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/start-flash.S b/bsps/powerpc/mpc55xxevb/start/start-flash.S index b3a65e02e6..048c1a5f3b 100644 --- a/bsps/powerpc/mpc55xxevb/start/start-flash.S +++ b/bsps/powerpc/mpc55xxevb/start/start-flash.S @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2015 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2015 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/start-prologue.c b/bsps/powerpc/mpc55xxevb/start/start-prologue.c index 236ed2ca00..82f2c670d8 100644 --- a/bsps/powerpc/mpc55xxevb/start/start-prologue.c +++ b/bsps/powerpc/mpc55xxevb/start/start-prologue.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * Copyright (c) 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/start-watchdog.c b/bsps/powerpc/mpc55xxevb/start/start-watchdog.c index 8b8609d8ee..3f34d4a26c 100644 --- a/bsps/powerpc/mpc55xxevb/start/start-watchdog.c +++ b/bsps/powerpc/mpc55xxevb/start/start-watchdog.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc55xxevb/start/start.S b/bsps/powerpc/mpc55xxevb/start/start.S index 06c305c26a..71a7a1b5ce 100644 --- a/bsps/powerpc/mpc55xxevb/start/start.S +++ b/bsps/powerpc/mpc55xxevb/start/start.S @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/mpc8260ads/console/console.c b/bsps/powerpc/mpc8260ads/console/console.c index 873c38dc3e..ab3e455a12 100644 --- a/bsps/powerpc/mpc8260ads/console/console.c +++ b/bsps/powerpc/mpc8260ads/console/console.c @@ -322,7 +322,7 @@ rtems_device_driver console_open( m8xx_uart_setAttributes, /* setAttributes */ NULL, /* stopRemoteTx */ NULL, /* startRemoteTx */ - 1 /* outputUsesInterrupts */ + TERMIOS_IRQ_DRIVEN /* outputUsesInterrupts */ }; #else #if (UARTS_USE_TERMIOS == 1) && (UARTS_IO_MODE != 1) @@ -334,7 +334,7 @@ rtems_device_driver console_open( m8xx_uart_setAttributes, /* setAttributes */ NULL, /* stopRemoteTx */ NULL, /* startRemoteTx */ - 0 /* outputUsesInterrupts */ + TERMIOS_POLLED /* outputUsesInterrupts */ }; #endif diff --git a/bsps/powerpc/mpc8260ads/include/tm27.h b/bsps/powerpc/mpc8260ads/include/tm27.h index b1eafc47aa..56abceacd5 100644 --- a/bsps/powerpc/mpc8260ads/include/tm27.h +++ b/bsps/powerpc/mpc8260ads/include/tm27.h @@ -29,7 +29,7 @@ do { \ static rtems_irq_connect_data scIrqData = { \ PPC_IRQ_SCALL, \ - (rtems_irq_hdl) handler, \ + handler, \ NULL, \ NULL, \ NULL \ diff --git a/bsps/powerpc/mvme5500/include/tm27.h b/bsps/powerpc/mvme5500/include/tm27.h index bf255aeb79..ae687e319c 100644 --- a/bsps/powerpc/mvme5500/include/tm27.h +++ b/bsps/powerpc/mvme5500/include/tm27.h @@ -32,9 +32,9 @@ static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER, (rtems_irq_disable)nullFunc, (rtems_irq_is_enabled) nullFunc}; -RTEMS_INLINE_ROUTINE void Install_tm27_vector(void (*_handler)()) +static inline void Install_tm27_vector( rtems_interrupt_handler handler ) { - clockIrqData.hdl = _handler; + clockIrqData.hdl = handler; if (!BSP_install_rtems_irq_handler (&clockIrqData)) { printk("Error installing clock interrupt handler!\n"); rtems_fatal_error_occurred(1); diff --git a/bsps/powerpc/psim/include/tm27.h b/bsps/powerpc/psim/include/tm27.h index 8e20a3ebd1..af472d1621 100644 --- a/bsps/powerpc/psim/include/tm27.h +++ b/bsps/powerpc/psim/include/tm27.h @@ -32,9 +32,9 @@ static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER, (rtems_irq_disable)nullFunc, (rtems_irq_is_enabled) nullFunc}; -RTEMS_INLINE_ROUTINE void Install_tm27_vector(void (*_handler)()) +static inline void Install_tm27_vector( rtems_interrupt_handler handler ) { - clockIrqData.hdl = _handler; + clockIrqData.hdl = handler; if (!BSP_install_rtems_irq_handler (&clockIrqData)) { printk("Error installing clock interrupt handler!\n"); rtems_fatal_error_occurred(1); diff --git a/bsps/powerpc/qemuppc/irq/irq_init.c b/bsps/powerpc/qemuppc/irq/irq_init.c index 11dbbffbe4..972a8456cc 100644 --- a/bsps/powerpc/qemuppc/irq/irq_init.c +++ b/bsps/powerpc/qemuppc/irq/irq_init.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/btimer/btimer.c b/bsps/powerpc/qoriq/btimer/btimer.c index b4a8715539..bb103faf7d 100644 --- a/bsps/powerpc/qoriq/btimer/btimer.c +++ b/bsps/powerpc/qoriq/btimer/btimer.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/clock/clock-config.c b/bsps/powerpc/qoriq/clock/clock-config.c index 93940e14ce..17347278f3 100644 --- a/bsps/powerpc/qoriq/clock/clock-config.c +++ b/bsps/powerpc/qoriq/clock/clock-config.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -38,11 +38,9 @@ #include <libcpu/powerpc-utility.h> #include <bsp.h> +#include <bsp/fatal.h> #include <bsp/qoriq.h> -#include <bsp/irq.h> - -/* This is defined in dev/clock/clockimpl.h */ -static rtems_isr Clock_isr(void *arg); +#include <bsp/irq-generic.h> static struct timecounter qoriq_clock_tc; @@ -50,6 +48,9 @@ static struct timecounter qoriq_clock_tc; #define CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR +/* This is defined in dev/clock/clockimpl.h */ +static rtems_isr Clock_isr(void *arg); + void qoriq_decrementer_dispatch(void) { PPC_SET_SPECIAL_PURPOSE_REGISTER(BOOKE_TSR, BOOKE_TSR_DIS); @@ -99,7 +100,9 @@ static volatile qoriq_pic_global_timer *const qoriq_timecounter = #define CLOCK_INTERRUPT (QORIQ_IRQ_GT_BASE + QORIQ_CLOCK_TIMER) -static void qoriq_clock_handler_install(void) +static rtems_interrupt_entry qoriq_clock_entry; + +static void qoriq_clock_handler_install(rtems_interrupt_handler handler) { rtems_status_code sc = RTEMS_SUCCESSFUL; @@ -118,18 +121,22 @@ static void qoriq_clock_handler_install(void) NULL ); if (sc != RTEMS_SUCCESSFUL) { - rtems_fatal_error_occurred(0xdeadbeef); + bsp_fatal(QORIQ_FATAL_CLOCK_INTERRUPT_SET_PRIORITY); } - sc = rtems_interrupt_handler_install( + rtems_interrupt_entry_initialize( + &qoriq_clock_entry, + handler, + NULL, + "Clock" + ); + sc = rtems_interrupt_entry_install( CLOCK_INTERRUPT, - "Clock", RTEMS_INTERRUPT_UNIQUE, - Clock_isr, - NULL + &qoriq_clock_entry ); if (sc != RTEMS_SUCCESSFUL) { - rtems_fatal_error_occurred(0xdeadbeef); + bsp_fatal(QORIQ_FATAL_CLOCK_INTERRUPT_INSTALL); } } @@ -157,8 +164,8 @@ static void qoriq_clock_initialize(void) rtems_timecounter_install(&qoriq_clock_tc); } -#define Clock_driver_support_install_isr(clock_isr) \ - qoriq_clock_handler_install() +#define Clock_driver_support_install_isr(isr) \ + qoriq_clock_handler_install(isr) #define Clock_driver_support_set_interrupt_affinity(online_processors) \ bsp_interrupt_set_affinity(CLOCK_INTERRUPT, online_processors) diff --git a/bsps/powerpc/qoriq/console/console-config.c b/bsps/powerpc/qoriq/console/console-config.c index 00f3529938..901ca968dd 100644 --- a/bsps/powerpc/qoriq/console/console-config.c +++ b/bsps/powerpc/qoriq/console/console-config.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/console/uart-bridge-master.c b/bsps/powerpc/qoriq/console/uart-bridge-master.c index 00b054855a..c468b05855 100644 --- a/bsps/powerpc/qoriq/console/uart-bridge-master.c +++ b/bsps/powerpc/qoriq/console/uart-bridge-master.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011-2015 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2015 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -41,6 +41,7 @@ #include <bspopts.h> #include <bsp/uart-bridge.h> +#include <rtems/termiostypes.h> #define TRANSMIT_EVENT RTEMS_EVENT_13 diff --git a/bsps/powerpc/qoriq/console/uart-bridge-slave.c b/bsps/powerpc/qoriq/console/uart-bridge-slave.c index 3017a43829..778db75171 100644 --- a/bsps/powerpc/qoriq/console/uart-bridge-slave.c +++ b/bsps/powerpc/qoriq/console/uart-bridge-slave.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/include/bsp.h b/bsps/powerpc/qoriq/include/bsp.h index 0f023ac7b6..5d8b711098 100644 --- a/bsps/powerpc/qoriq/include/bsp.h +++ b/bsps/powerpc/qoriq/include/bsp.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/include/bsp/VMEConfig.h b/bsps/powerpc/qoriq/include/bsp/VMEConfig.h new file mode 100644 index 0000000000..4bb7c0d62f --- /dev/null +++ b/bsps/powerpc/qoriq/include/bsp/VMEConfig.h @@ -0,0 +1,100 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsPowerPCQorIQ + * + * @brief This header file provides the interfaces used by VME bus device + * drivers. + * + * Note that for the MVME2500, you need the PCIe support from libbsd for this to + * work. + */ + +/* + * Copyright (C) 2023 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef RTEMS_BSP_VME_CONFIG_H +#define RTEMS_BSP_VME_CONFIG_H + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#define _VME_DRIVER_TSI148 + +/* + * Base address of the PCI that is used for the VME bridge. Value is set in + * libbsd during device discovery. + */ +extern uintptr_t bsp_vme_pcie_base_address; + +#define PCI_MEM_BASE 0 +#define PCI_DRAM_OFFSET 0 + +/* + * NOTE: shared vmeconfig.c uses hardcoded window lengths that match this layout + * + * The memory length of the PCIe controllers on the P2020 processor is + * 0x20000000. The Tsi148 registers are mapped at the bsp_vme_pcie_base_address + * with a size of 0x1000. Therefore the VME windows are arranged a bit different + * then on other BSPs. + */ +#define _VME_A32_WIN0_ON_PCI (bsp_vme_pcie_base_address + 0x10000000) +#define _VME_A24_ON_PCI (bsp_vme_pcie_base_address + 0x03000000) +#define _VME_A16_ON_PCI (bsp_vme_pcie_base_address + 0x02000000) +#define _VME_CSR_ON_PCI (bsp_vme_pcie_base_address + 0x01000000) + +/* FIXME: Make this a BSP config option */ +#define _VME_A32_WIN0_ON_VME 0x20000000 + +/* + * FIXME: The fixed QORIQ_IRQ_EXT_0 is valid for the MVME2500 board. In theory + * there should be some possibility to get that information from the device tree + * or from PCI config space. But I didn't find it anywhere. + */ +#define BSP_VME_INSTALL_IRQ_MGR(err) \ + do { \ + err = qoriq_pic_set_sense_and_polarity(\ + QORIQ_IRQ_EXT_0, \ + QORIQ_EIRQ_TRIGGER_LEVEL_LOW, \ + NULL \ + ); \ + if (err == 0) { \ + err = vmeTsi148InstallIrqMgrAlt(0, 0, QORIQ_IRQ_EXT_0, -1); \ + } \ + } while (0) + +/* Add prototypes that are in all VMEConfig.h files */ +extern int BSP_VMEInit(void); +extern int BSP_VMEIrqMgrInstall(void); +extern unsigned short (*_BSP_clear_vmebridge_errors)(int); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* RTEMS_BSP_VME_CONFIG_H */ diff --git a/bsps/powerpc/qoriq/include/bsp/intercom.h b/bsps/powerpc/qoriq/include/bsp/intercom.h index c1253437d5..1217fb5a69 100644 --- a/bsps/powerpc/qoriq/include/bsp/intercom.h +++ b/bsps/powerpc/qoriq/include/bsp/intercom.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/include/bsp/irq.h b/bsps/powerpc/qoriq/include/bsp/irq.h index 0f1581542e..5eaf36ba4c 100644 --- a/bsps/powerpc/qoriq/include/bsp/irq.h +++ b/bsps/powerpc/qoriq/include/bsp/irq.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010-2015 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2015 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -37,9 +37,6 @@ #define LIBBSP_POWERPC_QORIQ_IRQ_H #include <bsp.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> -#include <rtems/score/processormask.h> #ifdef __cplusplus extern "C" { @@ -279,6 +276,8 @@ extern "C" { #define QORIQ_IRQ_EXT_10 (QORIQ_IRQ_EXT_BASE + 10) #define QORIQ_IRQ_EXT_11 (QORIQ_IRQ_EXT_BASE + 11) +#define QORIQ_IRQ_IS_EXT(vector) \ + ((vector) >= QORIQ_IRQ_EXT_0 && (vector) <= QORIQ_IRQ_EXT_11) /** @} */ /** @@ -363,7 +362,23 @@ extern "C" { #define QORIQ_IRQ_GT_B_2 (QORIQ_IRQ_GT_BASE + 6) #define QORIQ_IRQ_GT_B_3 (QORIQ_IRQ_GT_BASE + 7) -#define BSP_INTERRUPT_VECTOR_COUNT (QORIQ_IRQ_GT_B_3 + 1) +#define QORIQ_INTERRUPT_SOURCE_COUNT (QORIQ_IRQ_GT_B_3 + 1) + +#define QORIQ_IS_INTERRUPT_SOURCE(vector) \ + (((rtems_vector_number) (vector)) < QORIQ_INTERRUPT_SOURCE_COUNT) + +#define QORIQ_IRQ_MSI_MULTIPLEX_BASE QORIQ_INTERRUPT_SOURCE_COUNT + +#define QORIQ_IRQ_MSI_COUNT 256 + +#define QORIQ_IRQ_MSI_INDEX(vector) ((vector) - QORIQ_IRQ_MSI_MULTIPLEX_BASE) + +#define QORIQ_IRQ_MSI_VECTOR(index) (QORIQ_IRQ_MSI_MULTIPLEX_BASE + (index)) + +#define QORIQ_IRQ_IS_MSI(vector) \ + (QORIQ_IRQ_MSI_INDEX(vector) < QORIQ_IRQ_MSI_COUNT) + +#define BSP_INTERRUPT_VECTOR_COUNT QORIQ_IRQ_MSI_VECTOR(QORIQ_IRQ_MSI_COUNT) /** @} */ @@ -393,14 +408,39 @@ rtems_status_code qoriq_pic_set_priority( int *old_priority ); -rtems_status_code bsp_interrupt_set_affinity( +rtems_status_code qoriq_pic_msi_allocate(rtems_vector_number *vector); + +rtems_status_code qoriq_pic_msi_free(rtems_vector_number vector); + +rtems_status_code qoriq_pic_msi_map( rtems_vector_number vector, - const Processor_mask *affinity + uint64_t *addr, + uint32_t *data ); -rtems_status_code bsp_interrupt_get_affinity( +typedef enum { + QORIQ_EIRQ_TRIGGER_EDGE_FALLING, + QORIQ_EIRQ_TRIGGER_EDGE_RISING, + QORIQ_EIRQ_TRIGGER_LEVEL_LOW, + QORIQ_EIRQ_TRIGGER_LEVEL_HIGH, +} qoriq_eirq_sense_and_polarity; + +/** + * @brief Change polarity and sense settings of external interrupts. + * + * NOTE: There are only very rare edge cases where you need this function. + * + * @a vector must be the vector number of an external interrupt. + * + * Use @a new_sense_and_polarity to select the new setting. If @a + * old_sense_and_polarity is not NULL, the old value is returned. + * + * @returns RTEMS_SUCCSSSFUL on sucess or other values for invalid settings. + */ +rtems_status_code qoriq_pic_set_sense_and_polarity( rtems_vector_number vector, - Processor_mask *affinity + qoriq_eirq_sense_and_polarity new_sense_and_polarity, + qoriq_eirq_sense_and_polarity *old_sense_and_polarity ); /** @} */ diff --git a/bsps/powerpc/qoriq/include/bsp/mmu.h b/bsps/powerpc/qoriq/include/bsp/mmu.h index e9aad505b5..2c51c9930a 100644 --- a/bsps/powerpc/qoriq/include/bsp/mmu.h +++ b/bsps/powerpc/qoriq/include/bsp/mmu.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011-2015 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2015 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -91,6 +91,8 @@ void qoriq_mmu_write_to_tlb1(qoriq_mmu_context *self, int first_tlb); void qoriq_mmu_change_perm(uint32_t test, uint32_t set, uint32_t clear); +int qoriq_mmu_find_free_tlb1_entry(void); + void qoriq_mmu_config(bool boot_processor, int first_tlb, int scratch_tlb); void qoriq_tlb1_write( @@ -103,6 +105,16 @@ void qoriq_tlb1_write( int tsize ); +void qoriq_mmu_adjust_and_write_to_tlb1( + int tlb, + uintptr_t begin, + uintptr_t last, + uint32_t mas1, + uint32_t mas2, + uint32_t mas3, + uint32_t mas7 +); + void qoriq_tlb1_invalidate(int esel); /** @} */ diff --git a/bsps/powerpc/qoriq/include/bsp/qoriq.h b/bsps/powerpc/qoriq/include/bsp/qoriq.h index 4cb55054d2..2cefd2e63e 100644 --- a/bsps/powerpc/qoriq/include/bsp/qoriq.h +++ b/bsps/powerpc/qoriq/include/bsp/qoriq.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010-2015 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2015 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/include/bsp/tsec-config.h b/bsps/powerpc/qoriq/include/bsp/tsec-config.h index 32d1697631..8827e159ef 100644 --- a/bsps/powerpc/qoriq/include/bsp/tsec-config.h +++ b/bsps/powerpc/qoriq/include/bsp/tsec-config.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/include/bsp/uart-bridge.h b/bsps/powerpc/qoriq/include/bsp/uart-bridge.h index 89b3983f14..3b243fd245 100644 --- a/bsps/powerpc/qoriq/include/bsp/uart-bridge.h +++ b/bsps/powerpc/qoriq/include/bsp/uart-bridge.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011-2015 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2015 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -36,7 +36,7 @@ #ifndef LIBBSP_POWERPC_QORIQ_UART_BRIDGE_H #define LIBBSP_POWERPC_QORIQ_UART_BRIDGE_H -#include <rtems/termiostypes.h> +#include <rtems/termiosdevice.h> #include <bsp/intercom.h> diff --git a/bsps/powerpc/qoriq/include/tm27.h b/bsps/powerpc/qoriq/include/tm27.h index 89ae11fef6..0c43823f0e 100644 --- a/bsps/powerpc/qoriq/include/tm27.h +++ b/bsps/powerpc/qoriq/include/tm27.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010-2015 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2015 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -40,8 +40,6 @@ #ifndef TMTESTS_TM27_H #define TMTESTS_TM27_H -#include <assert.h> - #include <libcpu/powerpc-utility.h> #include <bsp/irq.h> @@ -53,55 +51,60 @@ #define IPI_INDEX_HIGH 2 -RTEMS_INLINE_ROUTINE void Install_tm27_vector(void (*handler)(rtems_vector_number)) +static inline void Install_tm27_vector( rtems_interrupt_handler handler ) { - rtems_status_code sc; + static rtems_interrupt_entry entry_low; + static rtems_interrupt_entry entry_high; rtems_vector_number low = QORIQ_IRQ_IPI_0 + IPI_INDEX_LOW; rtems_vector_number high = QORIQ_IRQ_IPI_0 + IPI_INDEX_HIGH; - sc = rtems_interrupt_handler_install( + rtems_interrupt_entry_initialize( + &entry_low, + handler, + NULL, + "tm17 low" + ); + (void) rtems_interrupt_entry_install( low, - "tm17 low", RTEMS_INTERRUPT_UNIQUE, - (rtems_interrupt_handler) handler, - NULL + &entry_low ); - assert(sc == RTEMS_SUCCESSFUL); - sc = qoriq_pic_set_priority(low, 1, NULL); - assert(sc == RTEMS_SUCCESSFUL); + (void) qoriq_pic_set_priority(low, 1, NULL); - sc = rtems_interrupt_handler_install( + rtems_interrupt_entry_initialize( + &entry_high, + handler, + NULL, + "tm17 high" + ); + (void) rtems_interrupt_entry_install( high, - "tm17 high", RTEMS_INTERRUPT_UNIQUE, - (rtems_interrupt_handler) handler, - NULL + &entry_high ); - assert(sc == RTEMS_SUCCESSFUL); - sc = qoriq_pic_set_priority(high, 2, NULL); - assert(sc == RTEMS_SUCCESSFUL); + (void) qoriq_pic_set_priority(high, 2, NULL); } -RTEMS_INLINE_ROUTINE void qoriq_tm27_cause(uint32_t ipi_index) +static inline void qoriq_tm27_cause(uint32_t ipi_index) { uint32_t self = ppc_processor_id(); qoriq.pic.per_cpu[self].ipidr[ipi_index].reg = UINT32_C(1) << self; } -RTEMS_INLINE_ROUTINE void Cause_tm27_intr(void) +static inline void Cause_tm27_intr(void) { qoriq_tm27_cause(IPI_INDEX_LOW); } -RTEMS_INLINE_ROUTINE void Clear_tm27_intr(void) +static inline void Clear_tm27_intr(void) { /* Nothing to do */ } -RTEMS_INLINE_ROUTINE inline void Lower_tm27_intr(void) +static inline inline void Lower_tm27_intr(void) { qoriq_tm27_cause(IPI_INDEX_HIGH); } diff --git a/bsps/powerpc/qoriq/irq/irq.c b/bsps/powerpc/qoriq/irq/irq.c index 2858ff7581..96fbe4e020 100644 --- a/bsps/powerpc/qoriq/irq/irq.c +++ b/bsps/powerpc/qoriq/irq/irq.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -34,6 +34,7 @@ */ #include <sys/param.h> +#include <sys/bitset.h> #include <rtems.h> @@ -42,11 +43,11 @@ #include <asm/epapr_hcalls.h> #include <bsp.h> -#include <bsp/irq.h> #include <bsp/irq-generic.h> #include <bsp/vectors.h> #include <bsp/utility.h> #include <bsp/qoriq.h> +#include <rtems/score/processormaskimpl.h> #ifdef RTEMS_SMP #include <rtems/score/smpimpl.h> @@ -179,7 +180,7 @@ void bsp_interrupt_dispatch(uintptr_t exception_number) * This works only if the "has-external-proxy" property is present in the * "epapr,hv-pic" device tree node. */ - vector = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_EPR); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_EPR, vector); if (vector != SPURIOUS) { uint32_t msr; @@ -293,7 +294,7 @@ static volatile qoriq_pic_src_cfg *get_src_cfg(rtems_vector_number vector) } } -static bool is_ipi(rtems_vector_number vector) +static bool pic_is_ipi(rtems_vector_number vector) { return (vector - QORIQ_IRQ_IPI_BASE) < 4; } @@ -307,6 +308,10 @@ rtems_status_code qoriq_pic_set_priority( rtems_status_code sc = RTEMS_SUCCESSFUL; uint32_t old_vpr = 0; + if (QORIQ_IRQ_IS_MSI(vector)) { + return RTEMS_UNSATISFIED; + } + if (bsp_interrupt_is_valid_vector(vector)) { volatile qoriq_pic_src_cfg *src_cfg = get_src_cfg(vector); @@ -333,6 +338,62 @@ rtems_status_code qoriq_pic_set_priority( return sc; } +rtems_status_code qoriq_pic_set_sense_and_polarity( + rtems_vector_number vector, + qoriq_eirq_sense_and_polarity new_sense_and_polarity, + qoriq_eirq_sense_and_polarity *old_sense_and_polarity +) +{ + rtems_status_code sc = RTEMS_SUCCESSFUL; + uint32_t old_vpr = 0; + volatile qoriq_pic_src_cfg *src_cfg; + rtems_interrupt_lock_context lock_context; + uint32_t new_p_s = 0; + + if (!QORIQ_IRQ_IS_EXT(vector)) { + return RTEMS_UNSATISFIED; + } + + if (new_sense_and_polarity == QORIQ_EIRQ_TRIGGER_EDGE_RISING || + new_sense_and_polarity == QORIQ_EIRQ_TRIGGER_LEVEL_HIGH) { + new_p_s |= VPR_P; + } + + if (new_sense_and_polarity == QORIQ_EIRQ_TRIGGER_LEVEL_HIGH || + new_sense_and_polarity == QORIQ_EIRQ_TRIGGER_LEVEL_LOW) { + new_p_s |= VPR_S; + } + + src_cfg = get_src_cfg(vector); + + rtems_interrupt_lock_acquire(&lock, &lock_context); + old_vpr = src_cfg->vpr; + src_cfg->vpr = (old_vpr & ~(VPR_P | VPR_S)) | new_p_s; + rtems_interrupt_lock_release(&lock, &lock_context); + + if (old_sense_and_polarity != NULL) { + if ((old_vpr & VPR_P) == 0) { + if ((old_vpr & VPR_S) == 0) { + *old_sense_and_polarity = + QORIQ_EIRQ_TRIGGER_EDGE_FALLING; + } else { + *old_sense_and_polarity = + QORIQ_EIRQ_TRIGGER_LEVEL_LOW; + } + } else { + if ((old_vpr & VPR_S) == 0) { + *old_sense_and_polarity = + QORIQ_EIRQ_TRIGGER_EDGE_RISING; + } else { + *old_sense_and_polarity = + QORIQ_EIRQ_TRIGGER_LEVEL_HIGH; + } + } + } + + return sc; +} + rtems_status_code bsp_interrupt_set_affinity( rtems_vector_number vector, const Processor_mask *affinity @@ -340,7 +401,11 @@ rtems_status_code bsp_interrupt_set_affinity( { volatile qoriq_pic_src_cfg *src_cfg; - if (is_ipi(vector)) { + if (pic_is_ipi(vector)) { + return RTEMS_UNSATISFIED; + } + + if (QORIQ_IRQ_IS_MSI(vector)) { return RTEMS_UNSATISFIED; } @@ -356,7 +421,11 @@ rtems_status_code bsp_interrupt_get_affinity( { volatile qoriq_pic_src_cfg *src_cfg; - if (is_ipi(vector)) { + if (pic_is_ipi(vector)) { + return RTEMS_UNSATISFIED; + } + + if (QORIQ_IRQ_IS_MSI(vector)) { return RTEMS_UNSATISFIED; } @@ -365,17 +434,25 @@ rtems_status_code bsp_interrupt_get_affinity( return RTEMS_SUCCESSFUL; } -static void pic_vector_enable(rtems_vector_number vector, uint32_t msk) +static rtems_status_code pic_vector_set_mask( + rtems_vector_number vector, + uint32_t msk +) { volatile qoriq_pic_src_cfg *src_cfg; rtems_interrupt_lock_context lock_context; bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); + if (QORIQ_IRQ_IS_MSI(vector)) { + return RTEMS_UNSATISFIED; + } + src_cfg = get_src_cfg(vector); rtems_interrupt_lock_acquire(&lock, &lock_context); src_cfg->vpr = (src_cfg->vpr & ~VPR_MSK) | msk; rtems_interrupt_lock_release(&lock, &lock_context); + return RTEMS_SUCCESSFUL; } rtems_status_code bsp_interrupt_get_attributes( @@ -383,17 +460,25 @@ rtems_status_code bsp_interrupt_get_attributes( rtems_interrupt_attributes *attributes ) { - bool vector_is_ipi = is_ipi(vector); + bool is_ipi = pic_is_ipi(vector); + bool is_msi = QORIQ_IRQ_IS_MSI(vector); + attributes->is_maskable = true; - attributes->can_enable = true; - attributes->maybe_enable = true; - attributes->can_disable = true; - attributes->maybe_disable = true; + attributes->can_enable = !is_msi; + attributes->maybe_enable = !is_msi; + attributes->can_disable = !is_msi; + attributes->maybe_disable = !is_msi; attributes->cleared_by_acknowledge = true; - attributes->can_get_affinity = !vector_is_ipi; - attributes->can_set_affinity = !vector_is_ipi; - attributes->can_raise = vector_is_ipi; - attributes->can_raise_on = vector_is_ipi; + attributes->can_get_affinity = !(is_ipi || is_msi); + attributes->can_set_affinity = !(is_ipi || is_msi); + attributes->can_raise = is_ipi; + attributes->can_raise_on = is_ipi; + + if (is_msi) { + attributes->can_be_triggered_by_message = true; + attributes->trigger_signal = RTEMS_INTERRUPT_NO_SIGNAL; + } + return RTEMS_SUCCESSFUL; } @@ -407,6 +492,11 @@ rtems_status_code bsp_interrupt_is_pending( bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); bsp_interrupt_assert(pending != NULL); + if (QORIQ_IRQ_IS_MSI(vector)) { + *pending = false; + return RTEMS_SUCCESSFUL; + } + src_cfg = get_src_cfg(vector); *pending = (src_cfg->vpr & VPR_A) != 0; return RTEMS_SUCCESSFUL; @@ -422,7 +512,7 @@ rtems_status_code bsp_interrupt_raise(rtems_vector_number vector) { bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); - if (is_ipi(vector)) { + if (pic_is_ipi(vector)) { raise_on(vector, rtems_scheduler_get_processor()); return RTEMS_SUCCESSFUL; } @@ -438,7 +528,7 @@ rtems_status_code bsp_interrupt_raise_on( { bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); - if (is_ipi(vector)) { + if (pic_is_ipi(vector)) { raise_on(vector, cpu_index); return RTEMS_SUCCESSFUL; } @@ -463,6 +553,10 @@ rtems_status_code bsp_interrupt_vector_is_enabled( bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); bsp_interrupt_assert(enabled != NULL); + if (QORIQ_IRQ_IS_MSI(vector)) { + vector = QORIQ_IRQ_MSI_0 + QORIQ_IRQ_MSI_INDEX(vector) / 32; + } + src_cfg = get_src_cfg(vector); *enabled = (src_cfg->vpr & VPR_MSK) == 0; return RTEMS_SUCCESSFUL; @@ -470,14 +564,12 @@ rtems_status_code bsp_interrupt_vector_is_enabled( rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector) { - pic_vector_enable(vector, 0); - return RTEMS_SUCCESSFUL; + return pic_vector_set_mask(vector, 0); } rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) { - pic_vector_enable(vector, VPR_MSK); - return RTEMS_SUCCESSFUL; + return pic_vector_set_mask(vector, VPR_MSK); } void bsp_interrupt_dispatch(uintptr_t exception_number) @@ -498,11 +590,6 @@ void bsp_interrupt_dispatch(uintptr_t exception_number) } } -static bool pic_is_ipi(rtems_vector_number vector) -{ - return QORIQ_IRQ_IPI_0 <= vector && vector <= QORIQ_IRQ_IPI_3; -} - static void pic_reset(void) { qoriq.pic.gcr = GCR_RST; @@ -534,7 +621,7 @@ void bsp_interrupt_facility_initialize(void) pic_reset(); - for (i = 0; i < BSP_INTERRUPT_VECTOR_COUNT; ++i) { + for (i = 0; i < QORIQ_INTERRUPT_SOURCE_COUNT; ++i) { volatile qoriq_pic_src_cfg *src_cfg = get_src_cfg(i); src_cfg->vpr = VPR_MSK | VPR_P @@ -550,16 +637,186 @@ void bsp_interrupt_facility_initialize(void) qoriq.pic.svr = SPURIOUS; qoriq.pic.gcr = GCR_M; + /* Clear shared message signaled interrupts */ + for (i = 0; i < RTEMS_ARRAY_SIZE(qoriq.pic.msir); ++i) { + (void) qoriq.pic.msir[i].reg; + } + pic_global_timer_init(); } qoriq.pic.ctpr = 0; - for (i = 0; i < BSP_INTERRUPT_VECTOR_COUNT; ++i) { + for (i = 0; i < QORIQ_INTERRUPT_SOURCE_COUNT; ++i) { qoriq.pic.iack; qoriq.pic.eoi = 0; qoriq.pic.whoami; } } +typedef __BITSET_DEFINE(pic_msi_bitset, QORIQ_IRQ_MSI_COUNT) pic_msi_bitset; + +static pic_msi_bitset pic_msi_available = + __BITSET_T_INITIALIZER(__BITSET_FSET(__bitset_words(QORIQ_IRQ_MSI_COUNT))); + + +static uint32_t pic_msi_bitset_to_uint32_t( + const pic_msi_bitset *bitset, + uint32_t index +) +{ + long bits = bitset->__bits[index / _BITSET_BITS]; + + return (uint32_t) (bits >> (32 * ((index % _BITSET_BITS) / 32))); +} + +static void pic_msi_dispatch(void *arg) +{ + uintptr_t reg = (uintptr_t) arg; + uint32_t msir = qoriq.pic.msir[reg].reg; + + while (msir != 0) { + uint32_t index = 31 - __builtin_clz(msir); + const rtems_interrupt_entry *entry; + + msir &= ~(UINT32_C(1) << index); + entry = bsp_interrupt_entry_load_first( + QORIQ_IRQ_MSI_VECTOR(32 * reg + index) + ); + + if (entry != NULL) { + bsp_interrupt_dispatch_entries(entry); + } + } +} + +static rtems_status_code pic_msi_allocate(rtems_vector_number *vector) +{ + pic_msi_bitset *available = &pic_msi_available; + long found = __BIT_FFS(QORIQ_IRQ_MSI_COUNT, available); + rtems_vector_number index; + uint32_t subset; + + if (found == 0) { + return RTEMS_UNSATISFIED; + } + + index = (rtems_vector_number) found - 1; + subset = pic_msi_bitset_to_uint32_t(available, index); + + if (subset == 0xffffffff) { + uintptr_t reg = index / 32; + rtems_status_code sc; + + sc = rtems_interrupt_handler_install( + QORIQ_IRQ_MSI_0 + reg, + "MSI", + RTEMS_INTERRUPT_UNIQUE, + pic_msi_dispatch, + (void *) reg + ); + + if (sc != RTEMS_SUCCESSFUL) { + return sc; + } + } + + __BIT_CLR(QORIQ_IRQ_MSI_COUNT, index, available); + *vector = QORIQ_IRQ_MSI_VECTOR(index); + return RTEMS_SUCCESSFUL; +} + +static rtems_status_code pic_msi_free(rtems_vector_number vector) +{ + pic_msi_bitset *available = &pic_msi_available; + rtems_vector_number index = QORIQ_IRQ_MSI_INDEX(vector); + uint32_t subset; + + if (__BIT_ISSET(QORIQ_IRQ_MSI_COUNT, index, available)) { + return RTEMS_NOT_DEFINED; + } + + __BIT_SET(QORIQ_IRQ_MSI_COUNT, index, available); + subset = pic_msi_bitset_to_uint32_t(available, index); + + if (subset == 0xffffffff) { + uintptr_t reg = index / 32; + + return rtems_interrupt_handler_remove( + QORIQ_IRQ_MSI_0 + reg, + pic_msi_dispatch, + (void *) reg + ); + } + + return RTEMS_SUCCESSFUL; +} + +rtems_status_code qoriq_pic_msi_allocate(rtems_vector_number *vector) +{ + rtems_status_code sc; + + if (!bsp_interrupt_is_initialized()) { + return RTEMS_INCORRECT_STATE; + } + + if (vector == NULL) { + return RTEMS_INVALID_ADDRESS; + } + + if (rtems_interrupt_is_in_progress()) { + return RTEMS_CALLED_FROM_ISR; + } + + bsp_interrupt_lock(); + sc = pic_msi_allocate(vector); + bsp_interrupt_unlock(); + return sc; +} + +rtems_status_code qoriq_pic_msi_free(rtems_vector_number vector) +{ + rtems_status_code sc; + + if (!bsp_interrupt_is_initialized()) { + return RTEMS_INCORRECT_STATE; + } + + if (!QORIQ_IRQ_IS_MSI(vector) ) { + return RTEMS_INVALID_ID; + } + + if (rtems_interrupt_is_in_progress()) { + return RTEMS_CALLED_FROM_ISR; + } + + bsp_interrupt_lock(); + sc = pic_msi_free(vector); + bsp_interrupt_unlock(); + return sc; +} + +rtems_status_code qoriq_pic_msi_map( + rtems_vector_number vector, + uint64_t *addr, + uint32_t *data +) +{ + if (addr == NULL) { + return RTEMS_INVALID_ADDRESS; + } + + if (data == NULL) { + return RTEMS_INVALID_ADDRESS; + } + + if (!QORIQ_IRQ_IS_MSI(vector) ) { + return RTEMS_INVALID_ID; + } + + *addr = (uint64_t)(uintptr_t) &qoriq.pic.msiir; + *data = QORIQ_IRQ_MSI_INDEX(vector) << 24; + return RTEMS_SUCCESSFUL; +} + #endif /* QORIQ_IS_HYPERVISOR_GUEST */ diff --git a/bsps/powerpc/qoriq/mpci/intercom-mpci.c b/bsps/powerpc/qoriq/mpci/intercom-mpci.c index b034fd4703..eb1a93e57f 100644 --- a/bsps/powerpc/qoriq/mpci/intercom-mpci.c +++ b/bsps/powerpc/qoriq/mpci/intercom-mpci.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/mpci/intercom.c b/bsps/powerpc/qoriq/mpci/intercom.c index 0cf75c004d..ae3c2d92e9 100644 --- a/bsps/powerpc/qoriq/mpci/intercom.c +++ b/bsps/powerpc/qoriq/mpci/intercom.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/mpci/lock.S b/bsps/powerpc/qoriq/mpci/lock.S index 73e8a8a96b..03469ecaf5 100644 --- a/bsps/powerpc/qoriq/mpci/lock.S +++ b/bsps/powerpc/qoriq/mpci/lock.S @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/rtc/rtc-config.c b/bsps/powerpc/qoriq/rtc/rtc-config.c index 1c9612362c..9d91c3b7ba 100644 --- a/bsps/powerpc/qoriq/rtc/rtc-config.c +++ b/bsps/powerpc/qoriq/rtc/rtc-config.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/start/bspreset.c b/bsps/powerpc/qoriq/start/bspreset.c index d66e32d4c6..18ba66d9e9 100644 --- a/bsps/powerpc/qoriq/start/bspreset.c +++ b/bsps/powerpc/qoriq/start/bspreset.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/start/bsprestart.c b/bsps/powerpc/qoriq/start/bsprestart.c index 460c169053..eefa34d6d9 100644 --- a/bsps/powerpc/qoriq/start/bsprestart.c +++ b/bsps/powerpc/qoriq/start/bsprestart.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2016, 2018 embedded brains GmbH. All rights reserved. + * Copyright (C) 2016, 2018 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -117,6 +117,8 @@ static void raise_restart_interrupt(void) ppc_synchronize_instructions(); } +static rtems_interrupt_entry restart_entry; + void bsp_restart(void *addr) { rtems_status_code sc; @@ -130,12 +132,16 @@ void bsp_restart(void *addr) rtems_cache_flush_multiple_data_lines(spin_table, sizeof(*spin_table)); } - sc = rtems_interrupt_handler_install( + rtems_interrupt_entry_initialize( + &restart_entry, + restart_interrupt, + addr, + "Restart" + ); + sc = rtems_interrupt_entry_install( QORIQ_IRQ_IPI_0 + RESTART_IPI_INDEX, - "Restart", RTEMS_INTERRUPT_UNIQUE, - restart_interrupt, - addr + &restart_entry ); if (sc != RTEMS_SUCCESSFUL) { bsp_fatal(QORIQ_FATAL_RESTART_INSTALL_INTERRUPT); diff --git a/bsps/powerpc/qoriq/start/bspsmp.c b/bsps/powerpc/qoriq/start/bspsmp.c index 376854c5f3..2b85ba7a88 100644 --- a/bsps/powerpc/qoriq/start/bspsmp.c +++ b/bsps/powerpc/qoriq/start/bspsmp.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2013, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2013, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -118,11 +118,8 @@ static void bsp_inter_processor_interrupt(void *arg) static void setup_boot_page(void) { #ifdef QORIQ_IS_HYPERVISOR_GUEST - qoriq_mmu_context mmu_context; - - qoriq_mmu_context_init(&mmu_context); - qoriq_mmu_add( - &mmu_context, + qoriq_mmu_adjust_and_write_to_tlb1( + QORIQ_TLB1_ENTRY_COUNT - 1, 0xfffff000, 0xffffffff, 0, @@ -130,8 +127,6 @@ static void setup_boot_page(void) FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW, 0 ); - qoriq_mmu_partition(&mmu_context, 1); - qoriq_mmu_write_to_tlb1(&mmu_context, QORIQ_TLB1_ENTRY_COUNT - 1); #endif } @@ -221,17 +216,23 @@ bool _CPU_SMP_Start_processor(uint32_t cpu_index) #endif } +static rtems_interrupt_entry qoriq_ipi_entry; + void _CPU_SMP_Finalize_initialization(uint32_t cpu_count) { #ifndef QORIQ_IS_HYPERVISOR_GUEST rtems_status_code sc; - sc = rtems_interrupt_handler_install( + rtems_interrupt_entry_initialize( + &qoriq_ipi_entry, + bsp_inter_processor_interrupt, + NULL, + "IPI" + ); + sc = rtems_interrupt_entry_install( QORIQ_IRQ_IPI_0 + IPI_INDEX, - "IPI", RTEMS_INTERRUPT_UNIQUE, - bsp_inter_processor_interrupt, - NULL + &qoriq_ipi_entry ); if (sc != RTEMS_SUCCESSFUL) { bsp_fatal(QORIQ_FATAL_SMP_IPI_HANDLER_INSTALL); diff --git a/bsps/powerpc/qoriq/start/bspstart.c b/bsps/powerpc/qoriq/start/bspstart.c index dc7eda2a77..01dc5c57be 100644 --- a/bsps/powerpc/qoriq/start/bspstart.c +++ b/bsps/powerpc/qoriq/start/bspstart.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -44,7 +44,6 @@ #include <bsp.h> #include <bsp/bootcard.h> -#include <bsp/console-termios.h> #include <bsp/fatal.h> #include <bsp/fdt.h> #include <bsp/intercom.h> diff --git a/bsps/powerpc/qoriq/start/epapr_hcalls.S b/bsps/powerpc/qoriq/start/epapr_hcalls.S index f33f9c3c36..7f379556cf 100644 --- a/bsps/powerpc/qoriq/start/epapr_hcalls.S +++ b/bsps/powerpc/qoriq/start/epapr_hcalls.S @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2017 embedded brains GmbH. All rights reserved. + * Copyright (c) 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/start/l1cache.S b/bsps/powerpc/qoriq/start/l1cache.S index c9b901e5bb..1eb8dc0ab0 100644 --- a/bsps/powerpc/qoriq/start/l1cache.S +++ b/bsps/powerpc/qoriq/start/l1cache.S @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2015, 2016 embedded brains GmbH. All rights reserved. + * Copyright (C) 2015, 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/start/l2cache.S b/bsps/powerpc/qoriq/start/l2cache.S index 319b709de0..f470fa2f8d 100644 --- a/bsps/powerpc/qoriq/start/l2cache.S +++ b/bsps/powerpc/qoriq/start/l2cache.S @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2015, 2016 embedded brains GmbH. All rights reserved. + * Copyright (C) 2015, 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/start/mmu-config.c b/bsps/powerpc/qoriq/start/mmu-config.c index 3c31a2d776..15e4a83fc4 100644 --- a/bsps/powerpc/qoriq/start/mmu-config.c +++ b/bsps/powerpc/qoriq/start/mmu-config.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011, 2018 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2018 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -305,6 +305,92 @@ static void TEXT config_fdt_adjust(const void *fdt) } } +/* + * Each PCIe controller has a ranges attribute in the fdt like the following: + * + * ranges = <0x2000000 0x00 0xc0000000 0x00 0xc0000000 0x00 0x20000000 + * 0x1000000 0x00 0x00000000 0x00 0xffc20000 0x00 0x00010000>; + * |------PCI address------| |-CPU address-| |-----size----| + * + * In theory, some fdt-attributes should be used to find out how long the PCI + * address (#address-cells of the PCIe node), the CPU address (#address-cells of + * the parent node) and the size (#size-cells of the PCIe node) are. In our case + * the structure is fixed because the pcie root controllers are a part of the + * chip. Therefore the sizes will never change and we can assume fixed lengths. + * + * The first cell of the PCI address holds a number of flags. A detailed + * explanation can be found for example here: + * + * https://web.archive.org/web/20240109080338/https://michael2012z.medium.com/understanding-pci-node-in-fdt-769a894a13cc + * + * We are only interested in the entry with the flags 0x02000000 which basically + * means that it is a non-relocatable, non-prefetchable, not-aliased 32 bit + * memory space on the first bus. + * + * The other two cells of the PCI address are a 64 Bit address viewed from PCI + * address space. The two CPU address cells are the same 64 Bit address viewed + * from CPU address space. For our controller these two should always be the + * same (no address translation). The last two cells give a size of the memory + * region (in theory in PCI address space but it has to be the same for CPU and + * PCI). + */ +static void TEXT add_pcie_regions(qoriq_mmu_context *context, const void *fdt) +{ + int node; + + node = -1; + + while (true) { + static const size_t range_length = 7 * 4; + const void *val; + int len; + + node = fdt_node_offset_by_compatible( + fdt, + node, + "fsl,mpc8548-pcie" + ); + if (node < 0) { + break; + } + + val = fdt_getprop(fdt, node, "ranges", &len); + if (len % range_length != 0) { + continue; + } + + while (len >= range_length) { + uint32_t pci_addr_flags; + uintptr_t pci_addr; + uintptr_t cpu_addr; + uintptr_t size; + const uint32_t *cells; + + cells = val; + pci_addr_flags = fdt32_to_cpu(cells[0]); + pci_addr = fdt64_to_cpu(*(fdt64_t *)(&cells[1])); + cpu_addr = fdt64_to_cpu(*(fdt64_t *)(&cells[3])); + size = fdt64_to_cpu(*(fdt64_t *)(&cells[5])); + + if (pci_addr_flags == 0x02000000 && + pci_addr == cpu_addr) { + /* Add as I/O memory */ + qoriq_mmu_add( + context, + cpu_addr, + cpu_addr + size - 1, + 0, + FSL_EIS_MAS2_I | FSL_EIS_MAS2_G, + FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW, + 0 + ); + } + len -= range_length; + val += range_length; + } + } +} + void TEXT qoriq_mmu_config(bool boot_processor, int first_tlb, int scratch_tlb) { qoriq_mmu_context context; @@ -349,6 +435,8 @@ void TEXT qoriq_mmu_config(bool boot_processor, int first_tlb, int scratch_tlb) } } + add_pcie_regions(&context, fdt); + qoriq_mmu_partition(&context, max_count); qoriq_mmu_write_to_tlb1(&context, first_tlb); } diff --git a/bsps/powerpc/qoriq/start/mmu-tlb1.S b/bsps/powerpc/qoriq/start/mmu-tlb1.S index 063068fff1..380d3971bc 100644 --- a/bsps/powerpc/qoriq/start/mmu-tlb1.S +++ b/bsps/powerpc/qoriq/start/mmu-tlb1.S @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/start/mmu.c b/bsps/powerpc/qoriq/start/mmu.c index fa24357852..706c9fd293 100644 --- a/bsps/powerpc/qoriq/start/mmu.c +++ b/bsps/powerpc/qoriq/start/mmu.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011, 2018 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2018 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -358,17 +358,20 @@ void qoriq_mmu_change_perm(uint32_t test, uint32_t set, uint32_t clear) { int i = 0; - for (i = 0; i < 16; ++i) { + for (i = 0; i < QORIQ_TLB1_ENTRY_COUNT; ++i) { uint32_t mas0 = FSL_EIS_MAS0_TLBSEL | FSL_EIS_MAS0_ESEL(i); uint32_t mas1 = 0; PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS0, mas0); + ppc_synchronize_instructions(); ppc_tlbre(); + ppc_synchronize_instructions(); - mas1 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mas1); if ((mas1 & FSL_EIS_MAS1_V) != 0) { uint32_t mask = 0x3ff; - uint32_t mas3 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3); + uint32_t mas3; + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3, mas3); if ((mas3 & mask) == test) { mas3 &= ~(clear & mask); @@ -382,3 +385,51 @@ void qoriq_mmu_change_perm(uint32_t test, uint32_t set, uint32_t clear) } } } + +int qoriq_mmu_find_free_tlb1_entry(void) +{ + int i = 0; + + for (i = 0; i < QORIQ_TLB1_ENTRY_COUNT; ++i) { + uint32_t mas0 = FSL_EIS_MAS0_TLBSEL | FSL_EIS_MAS0_ESEL(i); + uint32_t mas1; + + PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS0, mas0); + ppc_synchronize_instructions(); + ppc_tlbre(); + ppc_synchronize_instructions(); + + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mas1); + if ((mas1 & FSL_EIS_MAS1_V) == 0) { + return i; + } + } + + return -1; +} + +void qoriq_mmu_adjust_and_write_to_tlb1( + int tlb, + uintptr_t begin, + uintptr_t last, + uint32_t mas1, + uint32_t mas2, + uint32_t mas3, + uint32_t mas7 +) +{ + qoriq_mmu_context context; + + qoriq_mmu_context_init(&context); + qoriq_mmu_add( + &context, + begin, + last, + mas1, + mas2, + mas3, + mas7 + ); + qoriq_mmu_partition(&context, 1); + qoriq_mmu_write_to_tlb1(&context, tlb); +} diff --git a/bsps/powerpc/qoriq/start/portal.c b/bsps/powerpc/qoriq/start/portal.c index b4fe8ff5a8..c518e6d7d5 100644 --- a/bsps/powerpc/qoriq/start/portal.c +++ b/bsps/powerpc/qoriq/start/portal.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2016 embedded brains GmbH. All rights reserved. + * Copyright (c) 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/start/restart.S b/bsps/powerpc/qoriq/start/restart.S index cc32d6463b..e5b43267f5 100644 --- a/bsps/powerpc/qoriq/start/restart.S +++ b/bsps/powerpc/qoriq/start/restart.S @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2016 embedded brains GmbH. All rights reserved. + * Copyright (c) 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/qoriq/start/start.S b/bsps/powerpc/qoriq/start/start.S index b48398791f..9aa192a7f3 100644 --- a/bsps/powerpc/qoriq/start/start.S +++ b/bsps/powerpc/qoriq/start/start.S @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/shared/clock/clock.c b/bsps/powerpc/shared/clock/clock.c index 6e8cc52ee5..072e470a92 100644 --- a/bsps/powerpc/shared/clock/clock.c +++ b/bsps/powerpc/shared/clock/clock.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008-2015 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2015 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/shared/cpu.c b/bsps/powerpc/shared/cpu.c index a06b8c0868..c38b60b4ee 100644 --- a/bsps/powerpc/shared/cpu.c +++ b/bsps/powerpc/shared/cpu.c @@ -130,7 +130,7 @@ void _CPU_Context_Initialize( #endif if ( tls_area != NULL ) { - void *tls_block = _TLS_TCB_before_TLS_block_initialize( tls_area ); + void *tls_block = _TLS_Initialize_area( tls_area ); the_ppc_context->tp = (uintptr_t) tls_block + 0x7000; } diff --git a/bsps/powerpc/shared/cpu_asm.S b/bsps/powerpc/shared/cpu_asm.S index 63f6a3fdfe..9800d0d2c6 100644 --- a/bsps/powerpc/shared/cpu_asm.S +++ b/bsps/powerpc/shared/cpu_asm.S @@ -23,7 +23,7 @@ * COPYRIGHT (c) 1989-1997. * On-Line Applications Research Corporation (OAR). * - * Copyright (c) 2011, 2017 embedded brains GmbH + * Copyright (C) 2011, 2020 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may in * the file LICENSE in this distribution or at @@ -267,6 +267,10 @@ PROC (_CPU_Context_switch_no_return): isync #endif +#if defined(PPC_MULTILIB_ALTIVEC) && defined(__PPC_VRSAVE__) + mfvrsave r9 +#endif + /* Align to a cache line */ CLEAR_RIGHT_IMMEDIATE r3, r3, PPC_DEFAULT_CACHE_LINE_POWER CLEAR_RIGHT_IMMEDIATE r5, r4, PPC_DEFAULT_CACHE_LINE_POWER @@ -284,6 +288,14 @@ PROC (_CPU_Context_switch_no_return): mfmsr r6 #endif /* END PPC_DISABLE_MSR_ACCESS */ mfcr r7 +#ifdef PPC_MULTILIB_ALTIVEC +#ifdef __PPC_VRSAVE__ + /* Mark v0 as used since we need it to get the VSCR */ + oris r8, r9, 0x8000 + mtvrsave r8 +#endif + mfvscr v0 +#endif mflr r8 lwz r11, PER_CPU_ISR_DISPATCH_DISABLE(r12) @@ -356,6 +368,16 @@ PROC (_CPU_Context_switch_no_return): stw r11, PPC_CONTEXT_OFFSET_ISR_DISPATCH_DISABLE(r3) #ifdef PPC_MULTILIB_ALTIVEC + li r10, PPC_CONTEXT_OFFSET_VSCR + stvewx v0, r3, r10 + +#ifdef __PPC_VRSAVE__ + stw r9, PPC_CONTEXT_OFFSET_VRSAVE(r3) + andi. r9, r9, 0xfff + bne .Laltivec_save + +.Laltivec_save_continue: +#else /* __PPC_VRSAVE__ */ li r9, PPC_CONTEXT_OFFSET_V20 stvx v20, r3, r9 li r9, PPC_CONTEXT_OFFSET_V21 @@ -397,7 +419,8 @@ PROC (_CPU_Context_switch_no_return): stvx v31, r3, r9 mfvrsave r9 stw r9, PPC_CONTEXT_OFFSET_VRSAVE(r3) -#endif +#endif /* __PPC_VRSAVE__ */ +#endif /* PPC_MULTILIB_ALTIVEC */ #ifdef PPC_MULTILIB_FPU stfd f14, PPC_CONTEXT_OFFSET_F14(r3) @@ -461,6 +484,14 @@ restore_context: PPC_REG_LOAD r1, PPC_CONTEXT_OFFSET_GPR1(r5) PPC_REG_LOAD r8, PPC_CONTEXT_OFFSET_LR(r5) +#ifdef PPC_MULTILIB_ALTIVEC + li r10, PPC_CONTEXT_OFFSET_VSCR + lvewx v0, r5, r10 +#ifdef __PPC_VRSAVE__ + lwz r9, PPC_CONTEXT_OFFSET_VRSAVE(r5) +#endif +#endif + PPC_GPR_LOAD r14, PPC_CONTEXT_OFFSET_GPR14(r5) PPC_GPR_LOAD r15, PPC_CONTEXT_OFFSET_GPR15(r5) @@ -494,6 +525,15 @@ restore_context: lwz r11, PPC_CONTEXT_OFFSET_ISR_DISPATCH_DISABLE(r5) #ifdef PPC_MULTILIB_ALTIVEC + mtvscr v0 + +#ifdef __PPC_VRSAVE__ + mtvrsave r9 + andi. r9, r9, 0xfff + bne .Laltivec_restore + +.Laltivec_restore_continue: +#else /* __PPC_VRSAVE__ */ li r9, PPC_CONTEXT_OFFSET_V20 lvx v20, r5, r9 li r9, PPC_CONTEXT_OFFSET_V21 @@ -520,7 +560,8 @@ restore_context: lvx v31, r5, r9 lwz r9, PPC_CONTEXT_OFFSET_VRSAVE(r5) mtvrsave r9 -#endif +#endif /* __PPC_VRSAVE__ */ +#endif /* PPC_MULTILIB_ALTIVEC */ #ifdef PPC_MULTILIB_FPU lfd f14, PPC_CONTEXT_OFFSET_F14(r5) @@ -567,6 +608,13 @@ PROC (_CPU_Context_restore): li r3, 0 #endif +#if defined(PPC_MULTILIB_ALTIVEC) && defined(__PPC_VRSAVE__) + /* Mark v0 as used since we need it to get the VSCR */ + mfvrsave r9 + oris r8, r9, 0x8000 + mtvrsave r8 +#endif + b restore_context #ifdef RTEMS_SMP @@ -595,3 +643,105 @@ PROC (_CPU_Context_restore): b .Lcheck_is_executing #endif + +#if defined(PPC_MULTILIB_ALTIVEC) && defined(__PPC_VRSAVE__) +.Laltivec_save: + + /* + * Let X be VRSAVE, calculate: + * + * Z = X & 0x777 + * Z = Z + 0x777 + * X = X | Z + * + * Afterwards, we have in X for each group of four non-volatile VR + * registers: + * + * 0111b, if VRSAVE group of four registers == 0 + * 1XXXb, if VRSAVE group of four registers != 0 + */ + andi. r10, r9, 0x777 + addi r10, r10, 0x777 + or r9, r9, r10 + mtcr r9 + + bf 20, .Laltivec_save_v24 + li r9, PPC_CONTEXT_OFFSET_V20 + stvx v20, r3, r9 + li r9, PPC_CONTEXT_OFFSET_V21 + stvx v21, r3, r9 + li r9, PPC_CONTEXT_OFFSET_V22 + stvx v22, r3, r9 + li r9, PPC_CONTEXT_OFFSET_V23 + stvx v23, r3, r9 + +.Laltivec_save_v24: + + bf 24, .Laltivec_save_v28 + li r9, PPC_CONTEXT_OFFSET_V24 + stvx v24, r3, r9 + li r9, PPC_CONTEXT_OFFSET_V25 + stvx v25, r3, r9 + li r9, PPC_CONTEXT_OFFSET_V26 + stvx v26, r3, r9 + li r9, PPC_CONTEXT_OFFSET_V27 + stvx v27, r3, r9 + +.Laltivec_save_v28: + + bf 28, .Laltivec_save_continue + li r9, PPC_CONTEXT_OFFSET_V28 + stvx v28, r3, r9 + li r9, PPC_CONTEXT_OFFSET_V29 + stvx v29, r3, r9 + li r9, PPC_CONTEXT_OFFSET_V30 + stvx v30, r3, r9 + li r9, PPC_CONTEXT_OFFSET_V31 + stvx v31, r3, r9 + + b .Laltivec_save_continue + +.Laltivec_restore: + + /* See comment at .Laltivec_save */ + andi. r10, r9, 0x777 + addi r10, r10, 0x777 + or r9, r9, r10 + mtcr r9 + + bf 20, .Laltivec_restore_v24 + li r9, PPC_CONTEXT_OFFSET_V20 + lvx v20, r5, r9 + li r9, PPC_CONTEXT_OFFSET_V21 + lvx v21, r5, r9 + li r9, PPC_CONTEXT_OFFSET_V22 + lvx v22, r5, r9 + li r9, PPC_CONTEXT_OFFSET_V23 + lvx v23, r5, r9 + +.Laltivec_restore_v24: + + bf 24, .Laltivec_restore_v28 + li r9, PPC_CONTEXT_OFFSET_V24 + lvx v24, r5, r9 + li r9, PPC_CONTEXT_OFFSET_V25 + lvx v25, r5, r9 + li r9, PPC_CONTEXT_OFFSET_V26 + lvx v26, r5, r9 + li r9, PPC_CONTEXT_OFFSET_V27 + lvx v27, r5, r9 + +.Laltivec_restore_v28: + + bf 28, .Laltivec_restore_continue + li r9, PPC_CONTEXT_OFFSET_V28 + lvx v28, r5, r9 + li r9, PPC_CONTEXT_OFFSET_V29 + lvx v29, r5, r9 + li r9, PPC_CONTEXT_OFFSET_V30 + lvx v30, r5, r9 + li r9, PPC_CONTEXT_OFFSET_V31 + lvx v31, r5, r9 + + b .Laltivec_restore_continue +#endif /* PPC_MULTILIB_ALTIVEC && __PPC_VRSAVE__ */ diff --git a/bsps/powerpc/shared/doxygen.h b/bsps/powerpc/shared/doxygen.h index ca5c2b2a58..d4a7794bc8 100644 --- a/bsps/powerpc/shared/doxygen.h +++ b/bsps/powerpc/shared/doxygen.h @@ -1,4 +1,12 @@ /** + * @file + * + * @ingroup RTEMSImplDoxygen + * + * @brief This header file defines powerpc-specific groups. + */ + +/** * @defgroup RTEMSBSPsPowerPC PowerPC * * @ingroup RTEMSBSPs diff --git a/bsps/powerpc/shared/exceptions/ppc-code-copy.c b/bsps/powerpc/shared/exceptions/ppc-code-copy.c index 1c4d99a8d1..d63b7a9f53 100644 --- a/bsps/powerpc/shared/exceptions/ppc-code-copy.c +++ b/bsps/powerpc/shared/exceptions/ppc-code-copy.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2009 embedded brains GmbH. All rights reserved. + * Copyright (c) 2009 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/shared/exceptions/ppc-exc-handler-table.c b/bsps/powerpc/shared/exceptions/ppc-exc-handler-table.c index ca0760ad30..34cc194afb 100644 --- a/bsps/powerpc/shared/exceptions/ppc-exc-handler-table.c +++ b/bsps/powerpc/shared/exceptions/ppc-exc-handler-table.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2012 embedded brains GmbH. All rights reserved. + * Copyright (c) 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/shared/exceptions/ppc_exc_address.c b/bsps/powerpc/shared/exceptions/ppc_exc_address.c index 08a5433641..8d277c3b86 100644 --- a/bsps/powerpc/shared/exceptions/ppc_exc_address.c +++ b/bsps/powerpc/shared/exceptions/ppc_exc_address.c @@ -10,7 +10,7 @@ * Copyright (C) 1999 Eric Valette (valette@crf.canon.fr) * Canon Centre Recherche France. * - * Copyright (C) 2009 embedded brains GmbH. + * Copyright (C) 2009 embedded brains GmbH & Co. KG * * Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com> * to support 603, 603e, 604, 604e exceptions diff --git a/bsps/powerpc/shared/exceptions/ppc_exc_alignment.c b/bsps/powerpc/shared/exceptions/ppc_exc_alignment.c index e0b7f0a435..16d904063e 100644 --- a/bsps/powerpc/shared/exceptions/ppc_exc_alignment.c +++ b/bsps/powerpc/shared/exceptions/ppc_exc_alignment.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/shared/exceptions/ppc_exc_async_normal.S b/bsps/powerpc/shared/exceptions/ppc_exc_async_normal.S index de4621ef55..701fc20bbb 100644 --- a/bsps/powerpc/shared/exceptions/ppc_exc_async_normal.S +++ b/bsps/powerpc/shared/exceptions/ppc_exc_async_normal.S @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2011, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2020 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -173,8 +173,15 @@ ppc_exc_interrupt: evstdd SCRATCH_5_REGISTER, PPC_EXC_ACC_OFFSET(r1) #endif -#ifdef PPC_MULTILIB_ALTIVEC /* Save volatile AltiVec context */ +#ifdef PPC_MULTILIB_ALTIVEC +#ifdef __PPC_VRSAVE__ + mfvrsave SCRATCH_0_REGISTER + cmpwi SCRATCH_0_REGISTER, 0 + bne .Laltivec_save + +.Laltivec_save_continue: +#else /* __PPC_VRSAVE__ */ li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(0) stvx v0, r1, SCRATCH_0_REGISTER mfvscr v0 @@ -218,7 +225,8 @@ ppc_exc_interrupt: stvx v19, r1, SCRATCH_0_REGISTER li SCRATCH_0_REGISTER, PPC_EXC_MIN_VSCR_OFFSET stvewx v0, r1, SCRATCH_0_REGISTER -#endif +#endif /* __PPC_VRSAVE__ */ +#endif /* PPC_MULTILIB_ALTIVEC */ #ifdef PPC_MULTILIB_FPU /* Save volatile FPU context */ @@ -334,8 +342,15 @@ ppc_exc_interrupt: .Lthread_dispatch_done: -#ifdef PPC_MULTILIB_ALTIVEC /* Restore volatile AltiVec context */ +#ifdef PPC_MULTILIB_ALTIVEC +#ifdef __PPC_VRSAVE__ + mfvrsave SCRATCH_0_REGISTER + cmpwi SCRATCH_0_REGISTER, 0 + bne .Laltivec_restore + +.Laltivec_restore_continue: +#else /* __PPC_VRSAVE__ */ li SCRATCH_0_REGISTER, PPC_EXC_MIN_VSCR_OFFSET lvewx v0, r1, SCRATCH_0_REGISTER mtvscr v0 @@ -379,7 +394,8 @@ ppc_exc_interrupt: lvx v18, r1, SCRATCH_0_REGISTER li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(19) lvx v19, r1, SCRATCH_0_REGISTER -#endif +#endif /* __PPC_VRSAVE__ */ +#endif /* PPC_MULTILIB_ALTIVEC */ #ifdef PPC_MULTILIB_FPU /* Restore volatile FPU context */ @@ -478,6 +494,169 @@ ppc_exc_interrupt: /* Return */ rfi +#if defined(PPC_MULTILIB_ALTIVEC) && defined(__PPC_VRSAVE__) +.Laltivec_save: + + /* + * Let X be VRSAVE, calculate: + * + * Y = 0x77777777 + * Z = X & Y + * Z = Z + Y + * X = X | Z + * + * Afterwards, we have in X for each group of four VR registers: + * + * 0111b, if VRSAVE group of four registers == 0 + * 1XXXb, if VRSAVE group of four registers != 0 + */ + lis SCRATCH_5_REGISTER, 0x7777 + ori SCRATCH_5_REGISTER, SCRATCH_5_REGISTER, 0x7777 + and SCRATCH_6_REGISTER, SCRATCH_0_REGISTER, SCRATCH_5_REGISTER + add SCRATCH_6_REGISTER, SCRATCH_5_REGISTER, SCRATCH_6_REGISTER + or SCRATCH_0_REGISTER, SCRATCH_0_REGISTER, SCRATCH_6_REGISTER + mtcr SCRATCH_0_REGISTER + + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(0) + stvx v0, r1, SCRATCH_0_REGISTER + + /* Move VCSR to V0 */ + mfvscr v0 + + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(1) + stvx v1, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(2) + stvx v2, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(3) + stvx v3, r1, SCRATCH_0_REGISTER + + /* Save VCSR using V0 */ + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VSCR_OFFSET + stvewx v0, r1, SCRATCH_0_REGISTER + + bf 4, .Laltivec_save_v8 + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(4) + stvx v4, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(5) + stvx v5, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(6) + stvx v6, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(7) + stvx v7, r1, SCRATCH_0_REGISTER + +.Laltivec_save_v8: + + bf 8, .Laltivec_save_v12 + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(8) + stvx v8, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(9) + stvx v9, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(10) + stvx v10, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(11) + stvx v11, r1, SCRATCH_0_REGISTER + +.Laltivec_save_v12: + + bf 12, .Laltivec_save_v16 + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(12) + stvx v12, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(13) + stvx v13, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(14) + stvx v14, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(15) + stvx v15, r1, SCRATCH_0_REGISTER + +.Laltivec_save_v16: + + bf 16, .Laltivec_save_continue + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(16) + stvx v16, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(17) + stvx v17, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(18) + stvx v18, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(19) + stvx v19, r1, SCRATCH_0_REGISTER + + b .Laltivec_save_continue + +.Laltivec_restore: + + /* Load VCSR using V0 */ + li SCRATCH_5_REGISTER, PPC_EXC_MIN_VSCR_OFFSET + lvewx v0, r1, SCRATCH_5_REGISTER + + /* See comment at .Laltivec_save */ + lis SCRATCH_5_REGISTER, 0x7777 + ori SCRATCH_5_REGISTER, SCRATCH_5_REGISTER, 0x7777 + and SCRATCH_6_REGISTER, SCRATCH_0_REGISTER, SCRATCH_5_REGISTER + add SCRATCH_6_REGISTER, SCRATCH_5_REGISTER, SCRATCH_6_REGISTER + or SCRATCH_0_REGISTER, SCRATCH_0_REGISTER, SCRATCH_6_REGISTER + mtcr SCRATCH_0_REGISTER + + /* Restore VCR using V0 */ + mtvscr v0 + + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(0) + lvx v0, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(1) + lvx v1, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(2) + lvx v2, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(3) + lvx v3, r1, SCRATCH_0_REGISTER + + bf 4, .Laltivec_restore_v8 + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(4) + lvx v4, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(5) + lvx v5, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(6) + lvx v6, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(7) + lvx v7, r1, SCRATCH_0_REGISTER + +.Laltivec_restore_v8: + + bf 8, .Laltivec_restore_v12 + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(8) + lvx v8, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(9) + lvx v9, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(10) + lvx v10, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(11) + lvx v11, r1, SCRATCH_0_REGISTER + +.Laltivec_restore_v12: + + bf 12, .Laltivec_restore_v16 + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(12) + lvx v12, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(13) + lvx v13, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(14) + lvx v14, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(15) + lvx v15, r1, SCRATCH_0_REGISTER + +.Laltivec_restore_v16: + + bf 16, .Laltivec_restore_continue + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(16) + lvx v16, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(17) + lvx v17, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(18) + lvx v18, r1, SCRATCH_0_REGISTER + li SCRATCH_0_REGISTER, PPC_EXC_MIN_VR_OFFSET(19) + lvx v19, r1, SCRATCH_0_REGISTER + + b .Laltivec_restore_continue +#endif /* PPC_MULTILIB_ALTIVEC && __PPC_VRSAVE__ */ + /* Symbol provided for debugging and tracing */ ppc_exc_interrupt_end: diff --git a/bsps/powerpc/shared/exceptions/ppc_exc_categories.c b/bsps/powerpc/shared/exceptions/ppc_exc_categories.c index 46508abcdf..9f7f638959 100644 --- a/bsps/powerpc/shared/exceptions/ppc_exc_categories.c +++ b/bsps/powerpc/shared/exceptions/ppc_exc_categories.c @@ -10,7 +10,7 @@ * Copyright (C) 1999 Eric Valette (valette@crf.canon.fr) * Canon Centre Recherche France. * - * Copyright (C) 2009-2011 embedded brains GmbH. + * Copyright (C) 2009, 2011 embedded brains GmbH & Co. KG * * Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com> * to support 603, 603e, 604, 604e exceptions diff --git a/bsps/powerpc/shared/exceptions/ppc_exc_fatal.S b/bsps/powerpc/shared/exceptions/ppc_exc_fatal.S index 46e1e373b7..f8cb282e09 100644 --- a/bsps/powerpc/shared/exceptions/ppc_exc_fatal.S +++ b/bsps/powerpc/shared/exceptions/ppc_exc_fatal.S @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2011, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/shared/exceptions/ppc_exc_initialize.c b/bsps/powerpc/shared/exceptions/ppc_exc_initialize.c index 46b72524ea..d47519b742 100644 --- a/bsps/powerpc/shared/exceptions/ppc_exc_initialize.c +++ b/bsps/powerpc/shared/exceptions/ppc_exc_initialize.c @@ -12,7 +12,7 @@ * * Copyright (C) 2007 Till Straumann <strauman@slac.stanford.edu> * - * Copyright (C) 2009-2012 embedded brains GmbH. + * Copyright (C) 2009, 2012 embedded brains GmbH & Co. KG * * Derived from file "libcpu/powerpc/new-exceptions/bspsupport/vectors_init.c". * Derived from file "libcpu/powerpc/new-exceptions/e500_raw_exc_init.c". diff --git a/bsps/powerpc/shared/exceptions/ppc_exc_naked.S b/bsps/powerpc/shared/exceptions/ppc_exc_naked.S index 95c9e7bf8e..b6960d7f46 100644 --- a/bsps/powerpc/shared/exceptions/ppc_exc_naked.S +++ b/bsps/powerpc/shared/exceptions/ppc_exc_naked.S @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2009 embedded brains GmbH. All rights reserved. + * Copyright (c) 2009 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/shared/exceptions/ppc_exc_print.c b/bsps/powerpc/shared/exceptions/ppc_exc_print.c index e4fcc73cb1..ff231beff9 100644 --- a/bsps/powerpc/shared/exceptions/ppc_exc_print.c +++ b/bsps/powerpc/shared/exceptions/ppc_exc_print.c @@ -42,18 +42,23 @@ typedef struct LRFrameRec_ { static uint32_t ppc_exc_get_DAR_dflt(void) { - if (ppc_cpu_is_60x()) - return PPC_SPECIAL_PURPOSE_REGISTER(PPC_DAR); - else + uint32_t val; + if (ppc_cpu_is_60x()) { + PPC_SPECIAL_PURPOSE_REGISTER(PPC_DAR, val); + return val; + } else { switch (ppc_cpu_is_bookE()) { default: break; case PPC_BOOKE_STD: case PPC_BOOKE_E500: - return PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_DEAR); + PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_DEAR, val); + return val; case PPC_BOOKE_405: - return PPC_SPECIAL_PURPOSE_REGISTER(PPC405_DEAR); + PPC_SPECIAL_PURPOSE_REGISTER(PPC405_DEAR, val); + return val; } + } return 0xdeadbeef; } @@ -170,13 +175,13 @@ void _CPU_Exception_frame_print(const CPU_Exception_frame *excPtr) printk(" %s = 0x%08" PRIx32 "\n", reg, ppc_exc_get_DAR()); } if (ppc_cpu_is_bookE()) { - unsigned esr, mcsr; + uint32_t esr, mcsr; if (ppc_cpu_is_bookE() == PPC_BOOKE_405) { - esr = PPC_SPECIAL_PURPOSE_REGISTER(PPC405_ESR); - mcsr = PPC_SPECIAL_PURPOSE_REGISTER(PPC405_MCSR); + PPC_SPECIAL_PURPOSE_REGISTER(PPC405_ESR, esr); + PPC_SPECIAL_PURPOSE_REGISTER(PPC405_MCSR, mcsr); } else { - esr = PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_ESR); - mcsr = PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_MCSR); + PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_ESR, esr); + PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_MCSR, mcsr); } printk(" ESR = 0x%08x\n", esr); printk(" MCSR = 0x%08x\n", mcsr); diff --git a/bsps/powerpc/shared/exceptions/ppc_exc_prologue.c b/bsps/powerpc/shared/exceptions/ppc_exc_prologue.c index 09307cd944..6e99fa7681 100644 --- a/bsps/powerpc/shared/exceptions/ppc_exc_prologue.c +++ b/bsps/powerpc/shared/exceptions/ppc_exc_prologue.c @@ -9,7 +9,7 @@ /* * Copyright (C) 2007 Till Straumann <strauman@slac.stanford.edu> * - * Copyright (C) 2009-2012 embedded brains GmbH. + * Copyright (C) 2009, 2012 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/shared/irq/irq_init.c b/bsps/powerpc/shared/irq/irq_init.c index 233c659b85..ecbff9bb19 100644 --- a/bsps/powerpc/shared/irq/irq_init.c +++ b/bsps/powerpc/shared/irq/irq_init.c @@ -98,7 +98,7 @@ static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={ }; #if BSP_PCI_IRQ_NUMBER > 0 -#if defined(mvme2100) +#if defined(mot_ppc_mvme2100) static unsigned char mvme2100_openpic_initpolarities[16] = { 0, /* Not used - should be disabled */ 0, /* DEC21143 Controller */ @@ -276,7 +276,7 @@ loop_exit: */ void BSP_rtems_irq_mng_init(unsigned cpuId) { -#if BSP_ISA_IRQ_NUMBER > 0 && !defined(mvme2100) +#if BSP_ISA_IRQ_NUMBER > 0 && !defined(mot_ppc_mvme2100) int known_cpi_isa_bridge = 0; #endif int i; @@ -285,7 +285,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) /* * First initialize the Interrupt management hardware */ -#if defined(mvme2100) +#if defined(mot_ppc_mvme2100) #ifdef TRACE_IRQ_INIT printk("Going to initialize EPIC interrupt controller (openpic compliant)\n"); #endif diff --git a/bsps/powerpc/shared/pci/detect_raven_bridge.c b/bsps/powerpc/shared/pci/detect_raven_bridge.c index 0a1c04a2e2..a3f03e0acd 100644 --- a/bsps/powerpc/shared/pci/detect_raven_bridge.c +++ b/bsps/powerpc/shared/pci/detect_raven_bridge.c @@ -30,7 +30,7 @@ extern const pci_config_access_functions pci_direct_functions; extern const pci_config_access_functions pci_indirect_functions; -#if defined(mvme2100) +#if defined(mot_ppc_mvme2100) /* FIXME - this should really be in a separate file - the 2100 doesn't * have a raven chip so there is no point having 2100 code here */ diff --git a/bsps/powerpc/shared/rtc/todcfg.c b/bsps/powerpc/shared/rtc/todcfg.c index 17ef18d5b5..95d75216a2 100644 --- a/bsps/powerpc/shared/rtc/todcfg.c +++ b/bsps/powerpc/shared/rtc/todcfg.c @@ -11,7 +11,7 @@ #include <libchip/m48t08.h> /* Forward function declaration */ -#if !defined(mvme2100) +#if !defined(mot_ppc_mvme2100) uint32_t mvmertc_get_register( uintptr_t, uint8_t ); void mvmertc_set_register( uintptr_t, uint8_t, uint32_t ); #endif @@ -24,7 +24,7 @@ rtc_tbl RTC_Table[] = { &m48t08_fns, /* pDeviceFns */ rtc_probe, /* deviceProbe */ NULL, /* pDeviceParams */ -#if defined(mvme2100) +#if defined(mot_ppc_mvme2100) 0xFFE81ff8, /* ulCtrlPort1 */ 0x00, /* ulDataPort */ m48t08_get_register, /* getRegister */ @@ -44,7 +44,7 @@ rtc_tbl RTC_Table[] = { size_t RTC_Count = NUM_RTCS; -#if !defined(mvme2100) +#if !defined(mot_ppc_mvme2100) #include <rtems/bspIo.h> void mvmertc_set_register( uintptr_t base, diff --git a/bsps/powerpc/shared/start/bsp-start-zero.S b/bsps/powerpc/shared/start/bsp-start-zero.S index 5242b01c13..aee2a6f5c4 100644 --- a/bsps/powerpc/shared/start/bsp-start-zero.S +++ b/bsps/powerpc/shared/start/bsp-start-zero.S @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2010-2014 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2014 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/shared/start/linkcmds.base b/bsps/powerpc/shared/start/linkcmds.base index 21fa729e38..4f626b13cc 100644 --- a/bsps/powerpc/shared/start/linkcmds.base +++ b/bsps/powerpc/shared/start/linkcmds.base @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2011, 2016 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -180,7 +180,7 @@ SECTIONS { KEEP (*(.jcr)) } > REGION_RODATA AT > REGION_RODATA_LOAD .data.rel.ro : ALIGN_WITH_INPUT { - *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) + *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) } > REGION_RODATA AT > REGION_RODATA_LOAD .fixup : ALIGN_WITH_INPUT { *(.fixup) diff --git a/bsps/powerpc/shared/start/memcpy.c b/bsps/powerpc/shared/start/memcpy.c index eb91e90f72..55605f2ecf 100644 --- a/bsps/powerpc/shared/start/memcpy.c +++ b/bsps/powerpc/shared/start/memcpy.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/shared/start/rtems_crti.S b/bsps/powerpc/shared/start/rtems_crti.S index 132a0473f4..7ef7998bd4 100644 --- a/bsps/powerpc/shared/start/rtems_crti.S +++ b/bsps/powerpc/shared/start/rtems_crti.S @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2017 embedded brains GmbH. All rights reserved. + * Copyright (c) 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/shared/start/rtems_crtn.S b/bsps/powerpc/shared/start/rtems_crtn.S index fe9c48d6ea..792c9d7aa6 100644 --- a/bsps/powerpc/shared/start/rtems_crtn.S +++ b/bsps/powerpc/shared/start/rtems_crtn.S @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2017 embedded brains GmbH. All rights reserved. + * Copyright (c) 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/shared/start/tictac.c b/bsps/powerpc/shared/start/tictac.c index fdf97ae20f..25fd8f0cce 100644 --- a/bsps/powerpc/shared/start/tictac.c +++ b/bsps/powerpc/shared/start/tictac.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: diff --git a/bsps/powerpc/shared/vme/doxygen.h b/bsps/powerpc/shared/vme/doxygen.h index c87183464b..8e458ffd88 100644 --- a/bsps/powerpc/shared/vme/doxygen.h +++ b/bsps/powerpc/shared/vme/doxygen.h @@ -1,4 +1,12 @@ /** + * @file + * + * @ingroup RTEMSImplDoxygen + * + * @brief This header file defines VME-specific groups. + */ + +/** * @defgroup shared_vmeuniverse VME Universe Modules * * @brief VME Universe Modules diff --git a/bsps/powerpc/shared/vme/vmeTsi148.c b/bsps/powerpc/shared/vme/vmeTsi148.c index 78b939717c..aaabb1b28d 100644 --- a/bsps/powerpc/shared/vme/vmeTsi148.c +++ b/bsps/powerpc/shared/vme/vmeTsi148.c @@ -53,10 +53,12 @@ #include <stdlib.h> #include <rtems/bspIo.h> /* printk */ #include <rtems/error.h> /* printk */ +#include <rtems/irq.h> #include <rtems/pci.h> #include <rtems/score/sysstate.h> #include <bsp.h> #include <libcpu/byteorder.h> +#include <libcpu/io.h> #define __INSIDE_RTEMS_BSP__ #define _VME_TSI148_DECLARE_SHOW_ROUTINES @@ -1104,13 +1106,9 @@ vmeTsi148XlateAddr( } -/* printk cannot format %llx */ static void uprintfllx(FILE *f, unsigned long long v) { - if ( v >= ((unsigned long long)1)<<32 ) - uprintf(f,"0x%lx%08lx ", (unsigned long)(v>>32), (unsigned long)(v & 0xffffffff)); - else - uprintf(f,"0x%08lx ", (unsigned long)(v & 0xffffffff)); + uprintf(f,"0x%08llx ", v); } void diff --git a/bsps/powerpc/shared/vme/vmeUniverse.c b/bsps/powerpc/shared/vme/vmeUniverse.c index d0cd8e95e3..f636cfea09 100644 --- a/bsps/powerpc/shared/vme/vmeUniverse.c +++ b/bsps/powerpc/shared/vme/vmeUniverse.c @@ -1708,6 +1708,7 @@ LERegister1 dcpp = ld_le32(&d->dcpp); /* RTEMS interrupt subsystem */ #include <bsp/irq.h> +#include <rtems/irq.h> typedef struct UniverseIRQEntryRec_ { diff --git a/bsps/powerpc/ss555/include/tm27.h b/bsps/powerpc/ss555/include/tm27.h index 5106801744..37e5ce0a6c 100644 --- a/bsps/powerpc/ss555/include/tm27.h +++ b/bsps/powerpc/ss555/include/tm27.h @@ -32,7 +32,7 @@ usiu.siel |= (1 << 17); \ usiu.sipend |= (1 << 17); \ \ - tm27IrqData.hdl = (rtems_irq_hdl)handler; \ + tm27IrqData.hdl = handler; \ BSP_install_rtems_irq_handler (&tm27IrqData); \ } diff --git a/bsps/powerpc/t32mppc/clock/clock-config.c b/bsps/powerpc/t32mppc/clock/clock-config.c index 3cd4a8a49b..76ff39cd7f 100644 --- a/bsps/powerpc/t32mppc/clock/clock-config.c +++ b/bsps/powerpc/t32mppc/clock/clock-config.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2011, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/t32mppc/configsim.t32 b/bsps/powerpc/t32mppc/configsim.t32 index 02dc794672..72cbff690c 100644 --- a/bsps/powerpc/t32mppc/configsim.t32 +++ b/bsps/powerpc/t32mppc/configsim.t32 @@ -1,5 +1 @@ PBI=SIM -SCREEN= -HEADER=Simulator -FONT=DEC -FONT=SMALL diff --git a/bsps/powerpc/t32mppc/console/console.c b/bsps/powerpc/t32mppc/console/console.c index 59fc02f54d..fd1474e364 100644 --- a/bsps/powerpc/t32mppc/console/console.c +++ b/bsps/powerpc/t32mppc/console/console.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2012, 2015 embedded brains GmbH. All rights reserved. + * Copyright (C) 2012, 2015 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -35,9 +35,9 @@ #include <rtems/console.h> #include <rtems/termiostypes.h> -volatile unsigned char messagebufferin[256]; +RTEMS_SECTION(".rtemsrwset.t32") volatile unsigned char messagebufferin[256]; -volatile unsigned char messagebufferout[256]; +RTEMS_SECTION(".rtemsrwset.t32") volatile unsigned char messagebufferout[256]; typedef struct { rtems_termios_device_context base; diff --git a/bsps/powerpc/t32mppc/include/bsp.h b/bsps/powerpc/t32mppc/include/bsp.h index 45bbee4b42..1f8d2871c9 100644 --- a/bsps/powerpc/t32mppc/include/bsp.h +++ b/bsps/powerpc/t32mppc/include/bsp.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2012, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2012, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/t32mppc/include/bsp/irq.h b/bsps/powerpc/t32mppc/include/bsp/irq.h index a860dc28e1..e4f4614a53 100644 --- a/bsps/powerpc/t32mppc/include/bsp/irq.h +++ b/bsps/powerpc/t32mppc/include/bsp/irq.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2012, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2012, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -29,9 +29,6 @@ #define LIBBSP_POWERPC_T32MPPC_IRQ_H #include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> -#include <rtems/score/processormask.h> #ifdef __cplusplus extern "C" { @@ -39,26 +36,6 @@ extern "C" { #define BSP_INTERRUPT_VECTOR_COUNT 1 -RTEMS_INLINE_ROUTINE rtems_status_code bsp_interrupt_set_affinity( - rtems_vector_number vector, - const Processor_mask *affinity -) -{ - (void) vector; - (void) affinity; - return RTEMS_SUCCESSFUL; -} - -RTEMS_INLINE_ROUTINE rtems_status_code bsp_interrupt_get_affinity( - rtems_vector_number vector, - Processor_mask *affinity -) -{ - (void) vector; - _Processor_mask_From_index( affinity, 0 ); - return RTEMS_SUCCESSFUL; -} - #ifdef __cplusplus } #endif /* __cplusplus */ diff --git a/bsps/powerpc/t32mppc/init.cmm b/bsps/powerpc/t32mppc/init.cmm index 019fd2c014..4cfb6ec6fa 100644 --- a/bsps/powerpc/t32mppc/init.cmm +++ b/bsps/powerpc/t32mppc/init.cmm @@ -6,11 +6,14 @@ system.up per.s spr:0x11f %long %be 0x80200000 ; Load application -Data.LOAD.Elf /home/sh/build/t32mppc/powerpc-rtems4.11/c/t32mppc/testsuites/samples/ticker/ticker.exe +Data.LOAD.Elf build/powerpc/t32mppc/testsuites/samples/ticker/ticker.exe ; Configure memory-based terminal term.reset term.method buffere v.address("messagebufferout") v.address("messagebufferin") +term.mode VT100 +term.scroll on +term.size 80. 200. 10000. term.gate ; Initialize RTOS support diff --git a/bsps/powerpc/t32mppc/irq/irq.c b/bsps/powerpc/t32mppc/irq/irq.c index 0320e40a8b..a3f2504443 100644 --- a/bsps/powerpc/t32mppc/irq/irq.c +++ b/bsps/powerpc/t32mppc/irq/irq.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2012, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2012, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -92,6 +92,28 @@ rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) return RTEMS_SUCCESSFUL; } +#if defined(RTEMS_SMP) +rtems_status_code bsp_interrupt_get_affinity( + rtems_vector_number vector, + Processor_mask *affinity +) +{ + (void) vector; + _Processor_mask_From_index( affinity, 0 ); + return RTEMS_UNSATISFIED; +} + +rtems_status_code bsp_interrupt_set_affinity( + rtems_vector_number vector, + const Processor_mask *affinity +) +{ + (void) vector; + (void) affinity; + return RTEMS_UNSATISFIED; +} +#endif + void bsp_interrupt_facility_initialize(void) { /* Nothing to do */ diff --git a/bsps/powerpc/t32mppc/make.cmm b/bsps/powerpc/t32mppc/make.cmm new file mode 100644 index 0000000000..a8e9e1e605 --- /dev/null +++ b/bsps/powerpc/t32mppc/make.cmm @@ -0,0 +1,19 @@ +; Set CPU +system.cpu mpc8540 +system.up + +; Set PVR +per.s spr:0x11f %long %be 0x80200000 + +; Load application +Data.LOAD.Elf /home/EB/sebastian_h/src/rtems/build/powerpc/t32mppc/testsuites/validation/ts-validation-intr.exe + +; Configure memory-based terminal +term.reset +term.method buffere v.address("messagebufferout") v.address("messagebufferin") +term.gate + +; Initialize RTOS support +task.config ~~/demo/powerpc/kernel/rtems/rtems.t32 +menu.reprogram ~~/demo/powerpc/kernel/rtems/rtems.men +task.stack.pattern 0xa5 diff --git a/bsps/powerpc/t32mppc/start/bspreset.c b/bsps/powerpc/t32mppc/start/bspreset.c index 99077b2068..5ba20c6195 100644 --- a/bsps/powerpc/t32mppc/start/bspreset.c +++ b/bsps/powerpc/t32mppc/start/bspreset.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2012 embedded brains GmbH. All rights reserved. + * Copyright (c) 2012 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/t32mppc/start/bspstart.c b/bsps/powerpc/t32mppc/start/bspstart.c index 2e16768dce..cbed7fa3ee 100644 --- a/bsps/powerpc/t32mppc/start/bspstart.c +++ b/bsps/powerpc/t32mppc/start/bspstart.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2012, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2012, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/t32mppc/start/start.S b/bsps/powerpc/t32mppc/start/start.S index 166599027b..f509dc12f7 100644 --- a/bsps/powerpc/t32mppc/start/start.S +++ b/bsps/powerpc/t32mppc/start/start.S @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2012, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2012, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/t32mppc/win.cmm b/bsps/powerpc/t32mppc/win.cmm new file mode 100644 index 0000000000..b65d22ab67 --- /dev/null +++ b/bsps/powerpc/t32mppc/win.cmm @@ -0,0 +1,36 @@ +// T32 Thu Oct 12 15:59:29 2023 + +B:: + +TOOLBAR ON +STATUSBAR ON +FramePOS 0.0,72.0,,,Maximized +WinPAGE.RESet + +WinPAGE.Create P000 +WinCLEAR + +WinPOS 0.0 0.0 77. 21. 0. 0. W001 +wl.Register + +WinPOS 0.0 24.533 133. 47. 14. 1. W002 +WinTABS 10. 10. 25. +wl.List + +WinPOS 275.57 23.0 80. 24. 0. 0. W000 +wl.term.gate + +WinPOS 136.57 0.0 105. 25. 5. 0. W003 +wl.Frame + +WinPOS 136.43 30.4 106. 13. 24. 1. W004 +WinTABS 13. 0. 0. 0. 0. 0. 0. 0. 0. 54. +wl.Break.List + +WinPOS 136.57 50.0 106. 23. 0. 1. W005 +WinTABS 41. 31. +wl.sYmbol.Browse.sYmbol + +WinPAGE.select P000 + +ENDDO diff --git a/bsps/powerpc/tqm8xx/btimer/btimer.c b/bsps/powerpc/tqm8xx/btimer/btimer.c index ff1192b256..312d699a28 100644 --- a/bsps/powerpc/tqm8xx/btimer/btimer.c +++ b/bsps/powerpc/tqm8xx/btimer/btimer.c @@ -5,7 +5,7 @@ */ /* - * Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH. + * Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH & Co. KG * All rights reserved. * * The license and distribution terms for this file may be diff --git a/bsps/powerpc/tqm8xx/console/console.c b/bsps/powerpc/tqm8xx/console/console.c index f1bc7792c7..5a44046e4a 100644 --- a/bsps/powerpc/tqm8xx/console/console.c +++ b/bsps/powerpc/tqm8xx/console/console.c @@ -19,7 +19,7 @@ * On-Line Applications Research Corporation (OAR). * Copyright assigned to U.S. Government, 1994. * - * Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH. + * Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH & Co. KG * All rights reserved. * * The license and distribution terms for this file may be diff --git a/bsps/powerpc/tqm8xx/include/bsp.h b/bsps/powerpc/tqm8xx/include/bsp.h index 32a84e20d1..81e1264587 100644 --- a/bsps/powerpc/tqm8xx/include/bsp.h +++ b/bsps/powerpc/tqm8xx/include/bsp.h @@ -15,7 +15,7 @@ * COPYRIGHT (c) 1989-2008. * On-Line Applications Research Corporation (OAR). * - * Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH. + * Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH & Co. KG * All rights reserved. * * The license and distribution terms for this file may be diff --git a/bsps/powerpc/tqm8xx/include/bsp/8xx_immap.h b/bsps/powerpc/tqm8xx/include/bsp/8xx_immap.h index e6347ea0c6..337d32f412 100644 --- a/bsps/powerpc/tqm8xx/include/bsp/8xx_immap.h +++ b/bsps/powerpc/tqm8xx/include/bsp/8xx_immap.h @@ -11,7 +11,7 @@ /* * Copyright (c) 1997 Dan Malek (dmalek@jlc.net) - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/tqm8xx/include/bsp/irq.h b/bsps/powerpc/tqm8xx/include/bsp/irq.h index bcd0cc2035..c1ecac756a 100644 --- a/bsps/powerpc/tqm8xx/include/bsp/irq.h +++ b/bsps/powerpc/tqm8xx/include/bsp/irq.h @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH. + * Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH & Co. KG * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/bsps/powerpc/tqm8xx/include/bsp/spi.h b/bsps/powerpc/tqm8xx/include/bsp/spi.h index 47af4e75ee..03cc6c00b4 100644 --- a/bsps/powerpc/tqm8xx/include/bsp/spi.h +++ b/bsps/powerpc/tqm8xx/include/bsp/spi.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2009 embedded brains GmbH. All rights reserved. + * Copyright (c) 2009 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/tqm8xx/include/bsp/tqm.h b/bsps/powerpc/tqm8xx/include/bsp/tqm.h index 6c3f9ceb21..811d8031a1 100644 --- a/bsps/powerpc/tqm8xx/include/bsp/tqm.h +++ b/bsps/powerpc/tqm8xx/include/bsp/tqm.h @@ -8,7 +8,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/tqm8xx/irq/irq.c b/bsps/powerpc/tqm8xx/irq/irq.c index c6d270be95..2e8e229427 100644 --- a/bsps/powerpc/tqm8xx/irq/irq.c +++ b/bsps/powerpc/tqm8xx/irq/irq.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH. + * Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH & Co. KG * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/bsps/powerpc/tqm8xx/spi/spi.c b/bsps/powerpc/tqm8xx/spi/spi.c index 0c77da76d1..5aa71070f7 100644 --- a/bsps/powerpc/tqm8xx/spi/spi.c +++ b/bsps/powerpc/tqm8xx/spi/spi.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2009 embedded brains GmbH. All rights reserved. + * Copyright (c) 2009 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/tqm8xx/start/bspgetworkarea.c b/bsps/powerpc/tqm8xx/start/bspgetworkarea.c index 39b4b1a81a..ac957a5a75 100644 --- a/bsps/powerpc/tqm8xx/start/bspgetworkarea.c +++ b/bsps/powerpc/tqm8xx/start/bspgetworkarea.c @@ -12,7 +12,7 @@ */ /* - * Copyright (C) 2008, 2019 embedded brains GmbH (http://www.embedded-brains.de) + * Copyright (C) 2008, 2019 embedded brains GmbH & Co. KG * * Copyright (C) 2008, 2009 On-Line Applications Research Corporation (OAR) * diff --git a/bsps/powerpc/tqm8xx/start/bspstart.c b/bsps/powerpc/tqm8xx/start/bspstart.c index 133e990f74..915328cd23 100644 --- a/bsps/powerpc/tqm8xx/start/bspstart.c +++ b/bsps/powerpc/tqm8xx/start/bspstart.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: diff --git a/bsps/powerpc/tqm8xx/start/mmutlbtab.c b/bsps/powerpc/tqm8xx/start/mmutlbtab.c index 279365118e..f6ff253c3c 100644 --- a/bsps/powerpc/tqm8xx/start/mmutlbtab.c +++ b/bsps/powerpc/tqm8xx/start/mmutlbtab.c @@ -6,7 +6,7 @@ /* * Copyright (c) 1999, National Research Council of Canada - * Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH. + * Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH & Co. KG * All rights reserved. * * The license and distribution terms for this file may be diff --git a/bsps/powerpc/tqm8xx/start/start.S b/bsps/powerpc/tqm8xx/start/start.S index 7852bdd3df..fbfb9a4c4c 100644 --- a/bsps/powerpc/tqm8xx/start/start.S +++ b/bsps/powerpc/tqm8xx/start/start.S @@ -8,7 +8,7 @@ */ /* - * Copyright (c) 2008 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/virtex/console/consolelite.c b/bsps/powerpc/virtex/console/consolelite.c index 4d0b2db17f..9a2595a535 100644 --- a/bsps/powerpc/virtex/console/consolelite.c +++ b/bsps/powerpc/virtex/console/consolelite.c @@ -57,28 +57,28 @@ -RTEMS_INLINE_ROUTINE uint32_t xlite_uart_control(uint32_t base) +static inline uint32_t xlite_uart_control(uint32_t base) { uint32_t c = *((volatile uint32_t*)(base+CTRL_REG)); return c; } -RTEMS_INLINE_ROUTINE uint32_t xlite_uart_status(uint32_t base) +static inline uint32_t xlite_uart_status(uint32_t base) { uint32_t c = *((volatile uint32_t*)(base+STAT_REG)); return c; } -RTEMS_INLINE_ROUTINE uint32_t xlite_uart_read(uint32_t base) +static inline uint32_t xlite_uart_read(uint32_t base) { uint32_t c = *((volatile uint32_t*)(base+RECV_REG)); return c; } -RTEMS_INLINE_ROUTINE void xlite_uart_write(uint32_t base, char ch) +static inline void xlite_uart_write(uint32_t base, char ch) { *(volatile uint32_t*)(base+TRAN_REG) = (uint32_t)ch; return; diff --git a/bsps/powerpc/virtex/include/bsp/irq.h b/bsps/powerpc/virtex/include/bsp/irq.h index dcd1039af9..17af22614d 100644 --- a/bsps/powerpc/virtex/include/bsp/irq.h +++ b/bsps/powerpc/virtex/include/bsp/irq.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/virtex/irq/irq_init.c b/bsps/powerpc/virtex/irq/irq_init.c index 6511b73886..320053e3a2 100644 --- a/bsps/powerpc/virtex/irq/irq_init.c +++ b/bsps/powerpc/virtex/irq/irq_init.c @@ -12,7 +12,7 @@ /* * Author: Keith Robertson <kjrobert@alumni.uwaterloo.ca> * COPYRIGHT (c) 2005 Linn Products Ltd, Scotland. - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/powerpc/virtex/start/start.S b/bsps/powerpc/virtex/start/start.S index 0e9759618a..466c5a9aa8 100644 --- a/bsps/powerpc/virtex/start/start.S +++ b/bsps/powerpc/virtex/start/start.S @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (c) 2010-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/virtex4/include/bsp/irq.h b/bsps/powerpc/virtex4/include/bsp/irq.h index 4ef113c877..5cc4c01b60 100644 --- a/bsps/powerpc/virtex4/include/bsp/irq.h +++ b/bsps/powerpc/virtex4/include/bsp/irq.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/virtex4/irq/irq_init.c b/bsps/powerpc/virtex4/irq/irq_init.c index ba51cf92c2..2756025662 100644 --- a/bsps/powerpc/virtex4/irq/irq_init.c +++ b/bsps/powerpc/virtex4/irq/irq_init.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/virtex4/start/dummy_console.c b/bsps/powerpc/virtex4/start/dummy_console.c index 642fe45618..ca8d2e7854 100644 --- a/bsps/powerpc/virtex4/start/dummy_console.c +++ b/bsps/powerpc/virtex4/start/dummy_console.c @@ -31,7 +31,7 @@ static rtems_termios_callbacks gMemCallbacks = { 0, /* SetAttr */ 0, /* stopRemoteTx */ 0, /* startRemoteTx */ - 0 /* outputUsesInterrupts */ + TERMIOS_POLLED /* outputUsesInterrupts */ }; rtems_device_driver console_initialize(rtems_device_major_number major, diff --git a/bsps/powerpc/virtex5/include/bsp/irq.h b/bsps/powerpc/virtex5/include/bsp/irq.h index f9ede0a4d8..b15bf883fe 100644 --- a/bsps/powerpc/virtex5/include/bsp/irq.h +++ b/bsps/powerpc/virtex5/include/bsp/irq.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/virtex5/irq/irq_init.c b/bsps/powerpc/virtex5/irq/irq_init.c index da15ccb74b..ec0a2ad5f9 100644 --- a/bsps/powerpc/virtex5/irq/irq_init.c +++ b/bsps/powerpc/virtex5/irq/irq_init.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2007 embedded brains GmbH. All rights reserved. + * Copyright (c) 2007 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/powerpc/virtex5/start/dummy_console.c b/bsps/powerpc/virtex5/start/dummy_console.c index 2cdab33c8c..7480402cde 100644 --- a/bsps/powerpc/virtex5/start/dummy_console.c +++ b/bsps/powerpc/virtex5/start/dummy_console.c @@ -28,7 +28,7 @@ static rtems_termios_callbacks gMemCallbacks = { 0, /* SetAttr */ 0, /* stopRemoteTx */ 0, /* startRemoteTx */ - 0 /* outputUsesInterrupts */ + TERMIOS_POLLED /* outputUsesInterrupts */ }; rtems_device_driver console_initialize(rtems_device_major_number major, |