7 files changed, 18 insertions, 18 deletions
diff --git a/bsps/powerpc/motorola_powerpc/include/bsp.h b/bsps/powerpc/motorola_powerpc/include/bsp.h
index 7d362bf406..d44bcd5cff 100644
--- a/bsps/powerpc/motorola_powerpc/include/bsp.h
+++ b/bsps/powerpc/motorola_powerpc/include/bsp.h
@@ -50,8 +50,8 @@ extern "C" {
  * _VME_A32_WIN0_ON_VME: VME address of that same window
  *
  * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between
- * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI
- * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
+ * CPU and PCI addresses). The mvme2307/mvme2700 'ppcbug' firmware configures the
+ * PCI bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
  * the base address read from PCI config.space in order to translate that
  * into a CPU address.
  *
@@ -89,7 +89,7 @@ extern "C" {
  */
 
 /* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
 #define	_IO_BASE		CHRP_ISA_IO_BASE
 #define	_ISA_MEM_BASE		CHRP_ISA_MEM_BASE
 /* address of our ram on the PCI bus   */
@@ -154,7 +154,7 @@ extern "C" {
  *  find out what it is which is VERY different from other Motorola boards.
  */
 
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
 #define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000)
 /* #define BSP_UART_IOBASE_COM1     (0xffe10000) */
 #define BSP_OPEN_PIC_BASE_OFFSET 0x40000
@@ -169,7 +169,7 @@ extern "C" {
 #define BSP_VGA_IOBASE       ((_IO_BASE)+0x3c0)
 #endif
 
-#if defined(mvme2300)
+#if defined(mvme2300) || defined(mot_ppc_mvme2307) || defined(mot_ppc_mvme2700)
 #define MVME_HAS_DEC21140
 #endif
 #endif
@@ -190,7 +190,7 @@ extern int rtems_dec21140_driver_attach(struct rtems_bsdnet_ifconfig *, int);
 #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_ne_driver_attach
 extern int rtems_ne_driver_attach(struct rtems_bsdnet_ifconfig *, int);
 
-RTEMS_INLINE_ROUTINE const char* bsp_cmdline_arg(const char* arg)
+static inline const char* bsp_cmdline_arg(const char* arg)
 {
   return rtems_bsp_cmdline_get_param_raw(arg);
 }
@@ -271,7 +271,7 @@ extern int BSP_connect_clock_handler (void);
  *       It returns and clears the error bits of the PCI status register.
  *       MCP support is disabled because:
  *         a) the 2100 has no raven chip
- *         b) the raven (2300) would raise machine check interrupts
+ *         b) the raven (2300, 2307, 2700) would raise machine check interrupts
  *            on PCI config space access to empty slots.
  */
 extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
diff --git a/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h b/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h
index 9b355819f1..9e57730d60 100644
--- a/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h
+++ b/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h
@@ -66,7 +66,7 @@
  * available and unused!
  */
 
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
 #define _VME_A32_WIN0_ON_PCI  0x90000000
 #define _VME_A24_ON_PCI      0x9f000000
 #define _VME_A16_ON_PCI      0x9fff0000
diff --git a/bsps/powerpc/motorola_powerpc/include/bsp/irq.h b/bsps/powerpc/motorola_powerpc/include/bsp/irq.h
index fea2859c3e..74bda323eb 100644
--- a/bsps/powerpc/motorola_powerpc/include/bsp/irq.h
+++ b/bsps/powerpc/motorola_powerpc/include/bsp/irq.h
@@ -133,7 +133,7 @@ extern "C" {
 #define BSP_PCI_ISA_BRIDGE_IRQ		(BSP_PCI_IRQ0)
 #endif
 
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
 #define BSP_DEC21143_IRQ                (BSP_PCI_IRQ_LOWEST_OFFSET + 1)
 #define BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ   (BSP_PCI_IRQ_LOWEST_OFFSET + 2)
 #define BSP_PCMIP_TYPE1_SLOT1_IRQ       (BSP_PCI_IRQ_LOWEST_OFFSET + 3)
diff --git a/bsps/powerpc/motorola_powerpc/include/tm27.h b/bsps/powerpc/motorola_powerpc/include/tm27.h
index 15e66f2a81..ffdd55706b 100644
--- a/bsps/powerpc/motorola_powerpc/include/tm27.h
+++ b/bsps/powerpc/motorola_powerpc/include/tm27.h
@@ -39,9 +39,9 @@ static rtems_irq_connect_data clockIrqData =
  .isOn = null_irq_is_enabled
 };
 
-static void Install_tm27_vector(rtems_isr (*_handler)(rtems_vector_number))
+static inline void Install_tm27_vector( rtems_interrupt_handler handler )
 {
-  clockIrqData.hdl = (rtems_irq_hdl) _handler;
+  clockIrqData.hdl = handler;
   if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
 	printk("Error installing clock interrupt handler!\n");
 	rtems_fatal_error_occurred(1);
diff --git a/bsps/powerpc/motorola_powerpc/start/bspreset.c b/bsps/powerpc/motorola_powerpc/start/bspreset.c
index 0931badae4..d0af42284f 100644
--- a/bsps/powerpc/motorola_powerpc/start/bspreset.c
+++ b/bsps/powerpc/motorola_powerpc/start/bspreset.c
@@ -16,7 +16,7 @@ void bsp_reset(void)
   CPU_print_stack();
   /* shutdown and reboot */
 
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
   *(unsigned char*)0xffe00000 |= 0x80;
 #else
    /* Memory-mapped Port 92 PIB device access
diff --git a/bsps/powerpc/motorola_powerpc/start/bspstart.c b/bsps/powerpc/motorola_powerpc/start/bspstart.c
index a781297565..894cf9d73d 100644
--- a/bsps/powerpc/motorola_powerpc/start/bspstart.c
+++ b/bsps/powerpc/motorola_powerpc/start/bspstart.c
@@ -109,7 +109,7 @@ char *save_boot_params(
   return loaderParam;
 }
 
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
 unsigned int EUMBBAR;
 
 /*
@@ -130,7 +130,7 @@ uint32_t _CPU_Counter_frequency(void)
 
 static void bsp_early( void )
 {
-#if !defined(mvme2100)
+#if !defined(mot_ppc_mvme2100)
   unsigned l2cr;
 #endif
   prep_t boardManufacturer;
@@ -149,7 +149,7 @@ static void bsp_early( void )
    * Init MMU block address translation to enable hardware access
    */
 
-#if !defined(mvme2100)
+#if !defined(mot_ppc_mvme2100)
   /*
    * PC legacy IO space used for inb/outb and all PC compatible hardware
    */
@@ -173,7 +173,7 @@ static void bsp_early( void )
   setdbat(3, 0xb0000000, 0xb0000000, 0x10000000, IO_PAGE);
 #endif
 
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
   /* Need 0xfec00000 mapped for this */
   EUMBBAR = get_eumbbar();
 #endif
@@ -200,7 +200,7 @@ static void bsp_early( void )
 #endif
 
 
-#if !defined(mvme2100)
+#if !defined(mot_ppc_mvme2100)
   /*
    * Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for
    * relevant CPU type (mpc750)...
diff --git a/bsps/powerpc/motorola_powerpc/start/motorola.c b/bsps/powerpc/motorola_powerpc/start/motorola.c
index 25b1d3aa3c..58c711f07b 100644
--- a/bsps/powerpc/motorola_powerpc/start/motorola.c
+++ b/bsps/powerpc/motorola_powerpc/start/motorola.c
@@ -368,7 +368,7 @@ motorolaBoard getMotorolaBoard(void)
  *
  *  NOTE: Every path must set currentBoard.
  */
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
   currentBoard = (motorolaBoard) MVME_2100;
 #else
   unsigned char  cpu_type;