diff options
Diffstat (limited to 'bsps/microblaze/shared')
-rw-r--r-- | bsps/microblaze/shared/dev/serial/uartlite.c | 26 | ||||
-rw-r--r-- | bsps/microblaze/shared/fdt/microblaze-fdt-support.c | 106 | ||||
-rw-r--r-- | bsps/microblaze/shared/start/start.S | 14 |
3 files changed, 138 insertions, 8 deletions
diff --git a/bsps/microblaze/shared/dev/serial/uartlite.c b/bsps/microblaze/shared/dev/serial/uartlite.c index 7387e22635..611c339371 100644 --- a/bsps/microblaze/shared/dev/serial/uartlite.c +++ b/bsps/microblaze/shared/dev/serial/uartlite.c @@ -35,6 +35,7 @@ #include <bsp/irq.h> #include <dev/serial/uartlite.h> +#include <bspopts.h> #ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS static void microblaze_uart_interrupt( void *arg ) @@ -47,8 +48,11 @@ static void microblaze_uart_interrupt( void *arg ) rtems_termios_enqueue_raw_characters( tty, &c, 1 ); } - while ( ctx->transmitting && !XUartLite_IsTransmitEmpty( ctx ) ) { - rtems_termios_dequeue_characters( tty, 1 ); + if ( ctx->transmitting && XUartLite_IsTransmitEmpty( ctx->address ) ) { + size_t sent = ctx->tx_queued; + ctx->transmitting = false; + ctx->tx_queued = 0; + rtems_termios_dequeue_characters( tty, sent ); } } #endif @@ -69,8 +73,9 @@ static bool uart_first_open( #ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS XUartLite_EnableIntr( ctx->address ); + sc = rtems_interrupt_handler_install( - 1, + ctx->irq, "UART", RTEMS_INTERRUPT_SHARED, microblaze_uart_interrupt, @@ -79,6 +84,8 @@ static bool uart_first_open( if ( sc != RTEMS_SUCCESSFUL ) { return false; } + + ctx->tty = tty; #endif return true; @@ -118,10 +125,17 @@ static void uart_write( #ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS if ( n > 0 ) { + size_t remaining = n; + const char *p = &s[0]; + + while (!XUartLite_IsTransmitFull( ctx->address ) && remaining > 0) { + XUartLite_SendByte( ctx->address, *p ); + p++; + remaining--; + } + ctx->transmitting = true; - XUartLite_SendByte( ctx->address, s[0] ); - } else { - ctx->transmitting = false; + ctx->tx_queued = n - remaining; } #else size_t i = 0; diff --git a/bsps/microblaze/shared/fdt/microblaze-fdt-support.c b/bsps/microblaze/shared/fdt/microblaze-fdt-support.c new file mode 100644 index 0000000000..b1d8d186c4 --- /dev/null +++ b/bsps/microblaze/shared/fdt/microblaze-fdt-support.c @@ -0,0 +1,106 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2022 On-Line Applications Research Corporation (OAR) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <bspopts.h> +#include <bsp/microblaze-fdt-support.h> +#include <bsp/fdt.h> + +#include <libfdt.h> + +#ifdef BSP_START_COPY_FDT_FROM_U_BOOT +/* use external dtb provided by u-boot */ +#include <sys/param.h> + +#ifndef BSP_FDT_BLOB_SIZE_MAX +#define BSP_FDT_BLOB_SIZE_MAX 0 +#endif + +static RTEMS_ALIGNED(8) uint32_t +system_dtb[BSP_FDT_BLOB_SIZE_MAX / sizeof(uint32_t)]; + +void bsp_fdt_copy(const void *src) +{ + const volatile uint32_t *s = (const uint32_t *) src; + uint32_t *d = RTEMS_DECONST(uint32_t *, &system_dtb[0]); + + if (s != d) { + size_t m = MIN(sizeof(system_dtb), fdt_totalsize(src)); + size_t aligned_size = roundup2(m, CPU_CACHE_LINE_BYTES); + size_t n = (m + sizeof(*d) - 1) / sizeof(*d); + size_t i; + + for (i = 0; i < n; ++i) { + d[i] = s[i]; + } + + rtems_cache_flush_multiple_data_lines(d, aligned_size); + } +} +#endif /* BSP_START_COPY_FDT_FROM_U_BOOT */ + +#ifdef BSP_MICROBLAZE_FPGA_USE_FDT +#ifndef BSP_START_COPY_FDT_FROM_U_BOOT +/* use internal bsp dtb */ +#include BSP_MICROBLAZE_FPGA_DTB_HEADER_PATH +#endif /* BSP_START_COPY_FDT_FROM_U_BOOT */ + +const void *bsp_fdt_get(void) +{ + return system_dtb; +} + +uint32_t bsp_fdt_map_intr(const uint32_t *intr, size_t icells) +{ + return intr[0]; +} +#endif /* BSP_MICROBLAZE_FPGA_USE_FDT */ + +uint32_t try_get_prop_from_device_tree( + const char *compatible, + const char *prop_name, + uint32_t default_value +) +{ + uint32_t value = default_value; + +#ifdef BSP_MICROBLAZE_FPGA_USE_FDT + const void *fdt = bsp_fdt_get(); + int node = fdt_node_offset_by_compatible( fdt, -1, compatible ); + if ( node < 0 ) { + return default_value; + } + + const uint32_t *prop = fdt_getprop( fdt, node, prop_name, NULL ); + if ( prop == NULL ) { + return default_value; + } + + value = fdt32_to_cpu( prop[0] ); +#endif /* BSP_MICROBLAZE_FPGA_USE_FDT */ + + return value; +} diff --git a/bsps/microblaze/shared/start/start.S b/bsps/microblaze/shared/start/start.S index 97250f9316..e9aaa706e5 100644 --- a/bsps/microblaze/shared/start/start.S +++ b/bsps/microblaze/shared/start/start.S @@ -46,7 +46,7 @@ # 0x14 # Hardware Interrupt _interrupt_handler # 0x18 # (-- IMM --) - # 0x1C # Breakpoint Exception (-- Don't Care --) + # 0x1C # Breakpoint Exception _debug_sw_break_handler # 0x20 # (-- IMM --) # 0x24 # Hardware Exception _hw_exception_handler @@ -73,10 +73,20 @@ _vector_sw_exception: _vector_interrupt: brai _interrupt_handler + .section .vectors.debug_sw_break, "ax" + .align 2 +_vector_debug_sw_break: + brai _debug_sw_break_handler + .section .vectors.hw_exception, "ax" .align 2 _vector_hw_exception: - brai _hw_exception_handler +/* + * Hardware and software exceptions are handled identically with the MSR[EiP] + * bit differentiating them and determining which register should be used for + * return. + */ + brai _exception_handler .section .text .globl _start1 |