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Diffstat (limited to 'bsps/include/dev/irq/arm-gic-irq.h')
-rw-r--r--bsps/include/dev/irq/arm-gic-irq.h30
1 files changed, 15 insertions, 15 deletions
diff --git a/bsps/include/dev/irq/arm-gic-irq.h b/bsps/include/dev/irq/arm-gic-irq.h
index 186ac2de7b..c3615a12a0 100644
--- a/bsps/include/dev/irq/arm-gic-irq.h
+++ b/bsps/include/dev/irq/arm-gic-irq.h
@@ -1,15 +1,16 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
- * @file
+ * @file
*
- * @ingroup arm_gic
+ * @ingroup DevIRQGIC
*
- * @brief ARM GIC IRQ
+ * @brief This header file provides interfaces of the ARM Generic Interrupt
+ * Controller (GIC) support.
*/
/*
- * Copyright (c) 2013, 2019 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2013, 2019 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -38,12 +39,17 @@
#include <bsp.h>
#include <dev/irq/arm-gic.h>
-#include <rtems/score/processormask.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
+/**
+ * @addtogroup DevIRQGIC
+ *
+ * @{
+ */
+
#define ARM_GIC_IRQ_SGI_0 0
#define ARM_GIC_IRQ_SGI_1 1
#define ARM_GIC_IRQ_SGI_2 2
@@ -85,16 +91,6 @@ rtems_status_code arm_gic_irq_get_group(
gic_group *group
);
-rtems_status_code bsp_interrupt_set_affinity(
- rtems_vector_number vector,
- const Processor_mask *affinity
-);
-
-rtems_status_code bsp_interrupt_get_affinity(
- rtems_vector_number vector,
- Processor_mask *affinity
-);
-
void arm_gic_trigger_sgi(rtems_vector_number vector, uint32_t targets);
static inline rtems_status_code arm_gic_irq_generate_software_irq(
@@ -113,9 +109,13 @@ static inline rtems_status_code arm_gic_irq_generate_software_irq(
return sc;
}
+#ifdef RTEMS_SMP
uint32_t arm_gic_irq_processor_count(void);
void arm_gic_irq_initialize_secondary_cpu(void);
+#endif
+
+/** @} */
#ifdef __cplusplus
}