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-rw-r--r--bsps/include/bsp/bootcard.h31
-rw-r--r--bsps/include/bsp/console-termios.h31
-rw-r--r--bsps/include/bsp/default-initial-extension.h48
-rw-r--r--bsps/include/bsp/fatal.h69
-rw-r--r--bsps/include/bsp/fdt.h31
-rw-r--r--bsps/include/bsp/irq-default.h2
-rw-r--r--bsps/include/bsp/irq-generic.h209
-rw-r--r--bsps/include/bsp/irq-info.h4
-rw-r--r--bsps/include/bsp/stackalloc.h31
-rw-r--r--bsps/include/bsp/u-boot.h31
-rw-r--r--bsps/include/bsp/uart-output-char.h32
-rw-r--r--bsps/include/bsp/utility.h35
12 files changed, 406 insertions, 148 deletions
diff --git a/bsps/include/bsp/bootcard.h b/bsps/include/bsp/bootcard.h
index 4a867990e0..5f339d65f8 100644
--- a/bsps/include/bsp/bootcard.h
+++ b/bsps/include/bsp/bootcard.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
* @file
*
@@ -5,17 +7,28 @@
*/
/*
- * Copyright (c) 2008-2014 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2008, 2014 embedded brains GmbH & Co. KG
*
- * embedded brains GmbH
- * Dornierstr. 4
- * 82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_SHARED_BOOTCARD_H
diff --git a/bsps/include/bsp/console-termios.h b/bsps/include/bsp/console-termios.h
index 31132f45f3..f82c7eee4e 100644
--- a/bsps/include/bsp/console-termios.h
+++ b/bsps/include/bsp/console-termios.h
@@ -1,15 +1,28 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/*
- * Copyright (c) 2014 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2014 embedded brains GmbH & Co. KG
*
- * embedded brains GmbH
- * Dornierstr. 4
- * 82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef BSP_CONSOLE_TERMIOS_H
diff --git a/bsps/include/bsp/default-initial-extension.h b/bsps/include/bsp/default-initial-extension.h
index cdad76edaa..a29d5415ea 100644
--- a/bsps/include/bsp/default-initial-extension.h
+++ b/bsps/include/bsp/default-initial-extension.h
@@ -1,23 +1,37 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
- * @file
+ * @file
*
- * @ingroup shared_defaultinitialextension
+ * @ingroup RTEMSBSPsSharedInitialExtension
*
- * @brief DEFAULT_INITIAL_EXTENSION Support
+ * @brief This header file provides the default definition of
+ * ::BSP_INITIAL_EXTENSION.
*/
/*
- * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2012 embedded brains GmbH & Co. KG
*
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * 82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_SHARED_DEFAULT_INITIAL_EXTENSION_H
@@ -30,11 +44,13 @@ extern "C" {
#endif /* __cplusplus */
/**
- * @defgroup shared_defaultinitialextension DEFAULT_INITIAL_EXTENSION Support
+ * @defgroup RTEMSBSPsSharedInitialExtension Default BSP Initial Extension
+ *
+ * @ingroup RTEMSBSPsShared
*
- * @ingroup RTEMSBSPsShared
+ * @brief This group contains the default BSP initial extension.
*
- * @brief DEFAULT_INITIAL_EXTENSION Support Package
+ * @{
*/
void bsp_fatal_extension(
@@ -46,6 +62,8 @@ void bsp_fatal_extension(
#define BSP_INITIAL_EXTENSION \
{ NULL, NULL, NULL, NULL, NULL, NULL, NULL, bsp_fatal_extension, NULL }
+/** @} */
+
#ifdef __cplusplus
}
#endif /* __cplusplus */
diff --git a/bsps/include/bsp/fatal.h b/bsps/include/bsp/fatal.h
index 54ed4b2027..87fc481ead 100644
--- a/bsps/include/bsp/fatal.h
+++ b/bsps/include/bsp/fatal.h
@@ -1,15 +1,36 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsSharedFatal
+ *
+ * @brief This header file provides fatal codes for ::RTEMS_FATAL_SOURCE_BSP.
+ */
+
/*
- * Copyright (c) 2012, 2018 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2012, 2022 embedded brains GmbH & Co. KG
*
- * embedded brains GmbH
- * Dornierstr. 4
- * 82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_SHARED_BSP_FATAL_H
@@ -21,6 +42,16 @@
extern "C" {
#endif /* __cplusplus */
+/**
+ * @defgroup RTEMSBSPsSharedFatal BSP-Specific Fatal Codes
+ *
+ * @ingroup RTEMSBSPsShared
+ *
+ * @brief This group contains fatal codes for ::RTEMS_FATAL_SOURCE_BSP.
+ *
+ * @{
+ */
+
#define BSP_FATAL_CODE_BLOCK(idx) ((unsigned long) (idx) * 256UL)
/**
@@ -41,6 +72,8 @@ typedef enum {
BSP_FATAL_CONSOLE_INSTALL_0,
BSP_FATAL_CONSOLE_INSTALL_1,
BSP_FATAL_CONSOLE_REGISTER_DEV_2,
+ BSP_FATAL_MMU_ADDRESS_INVALID,
+ BSP_FATAL_HEAP_EXTEND_ERROR,
/* ARM fatal codes */
BSP_ARM_A9MPCORE_FATAL_CLOCK_IRQ_INSTALL = BSP_FATAL_CODE_BLOCK(1),
@@ -56,9 +89,8 @@ typedef enum {
LEON3_FATAL_NO_IRQMP_CONTROLLER = BSP_FATAL_CODE_BLOCK(2),
LEON3_FATAL_CONSOLE_REGISTER_DEV,
LEON3_FATAL_CLOCK_INITIALIZATION,
- LEON3_FATAL_INVALID_CACHE_CONFIG_MAIN_PROCESSOR,
+ LEON3_FATAL_INVALID_CACHE_CONFIG_BOOT_PROCESSOR,
LEON3_FATAL_INVALID_CACHE_CONFIG_SECONDARY_PROCESSOR,
- LEON3_FATAL_CLOCK_NO_IRQMP_TIMESTAMP_SUPPORT,
/* LPC24XX fatal codes */
LPC24XX_FATAL_PL111_SET_UP = BSP_FATAL_CODE_BLOCK(3),
@@ -126,6 +158,8 @@ typedef enum {
QORIQ_FATAL_RESTART_FAILED,
QORIQ_FATAL_RESTART_INSTALL_INTERRUPT,
QORIQ_FATAL_RESTART_INTERRUPT_FAILED,
+ QORIQ_FATAL_CLOCK_INTERRUPT_INSTALL,
+ QORIQ_FATAL_CLOCK_INTERRUPT_SET_PRIORITY,
/* ATSAM fatal codes */
ATSAM_FATAL_XDMA_IRQ_INSTALL = BSP_FATAL_CODE_BLOCK(11),
@@ -152,10 +186,13 @@ typedef enum {
RISCV_FATAL_NO_PLIC_REG_IN_DEVICE_TREE,
RISCV_FATAL_INVALID_PLIC_NDEV_IN_DEVICE_TREE,
RISCV_FATAL_TOO_LARGE_PLIC_NDEV_IN_DEVICE_TREE,
- RISCV_FATAL_INVALID_INTERRUPT_AFFINITY,
+ RISCV_FATAL_UNUSED_0,
RISCV_FATAL_NO_NS16550_INTERRUPTS_IN_DEVICE_TREE,
RISCV_FATAL_NO_TLCLOCK_FREQUENCY_IN_DEVICE_TREE,
RISCV_FATAL_CLOCK_SMP_INIT,
+ RISCV_FATAL_NO_APBUART_REG_IN_DEVICE_TREE,
+ RISCV_FATAL_NO_APBUART_INTERRUPTS_IN_DEVICE_TREE,
+ RISCV_FATAL_NO_APBUART_CLOCK_FREQUENCY_IN_DEVICE_TREE,
/* GRLIB fatal codes */
GRLIB_FATAL_CLOCK_NO_IRQMP_TIMESTAMP_SUPPORT = BSP_FATAL_CODE_BLOCK(14),
@@ -174,6 +211,12 @@ typedef enum {
IMXRT_FATAL_LPI2C_HW_INIT_FAILED,
IMXRT_FATAL_LPI2C_REGISTER_FAILED,
IMXRT_FATAL_LPI2C_UNSUPPORTED_HARDWARE,
+
+ /* MicroBlaze fatal codes */
+ MICROBLAZE_FATAL_CLOCK_IRQ_INSTALL = BSP_FATAL_CODE_BLOCK(16),
+
+ /* Xilinx fatal codes */
+ XIL_FATAL_TTC_IRQ_INSTALL = BSP_FATAL_CODE_BLOCK(17),
} bsp_fatal_code;
RTEMS_NO_RETURN static inline void
@@ -182,6 +225,8 @@ bsp_fatal( bsp_fatal_code code )
rtems_fatal( RTEMS_FATAL_SOURCE_BSP, (rtems_fatal_code) code );
}
+/** @} */
+
#ifdef __cplusplus
}
#endif /* __cplusplus */
diff --git a/bsps/include/bsp/fdt.h b/bsps/include/bsp/fdt.h
index 4ed05b136c..a8d6764c72 100644
--- a/bsps/include/bsp/fdt.h
+++ b/bsps/include/bsp/fdt.h
@@ -1,15 +1,28 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/*
- * Copyright (c) 2015, 2017 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2015, 2017 embedded brains GmbH & Co. KG
*
- * embedded brains GmbH
- * Dornierstr. 4
- * 82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_SHARED_FDT_H
diff --git a/bsps/include/bsp/irq-default.h b/bsps/include/bsp/irq-default.h
index 8aacb4fec3..fff68c3db2 100644
--- a/bsps/include/bsp/irq-default.h
+++ b/bsps/include/bsp/irq-default.h
@@ -7,7 +7,7 @@
*/
/*
- * Copyright (C) 2019 embedded brains GmbH (http://www.embedded-brains.de)
+ * Copyright (C) 2019 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
diff --git a/bsps/include/bsp/irq-generic.h b/bsps/include/bsp/irq-generic.h
index fa1343a990..3aef0be855 100644
--- a/bsps/include/bsp/irq-generic.h
+++ b/bsps/include/bsp/irq-generic.h
@@ -3,16 +3,16 @@
/**
* @file
*
- * @ingroup bsp_interrupt
+ * @ingroup RTEMSImplClassicIntr
*
- * @brief This header file provides interfaces of the generic interrupt
- * controller support.
+ * @brief This header file provides interfaces of the Interrupt Manager
+ * implementation.
*/
/*
* Copyright (C) 2016 Chris Johns <chrisj@rtems.org>
*
- * Copyright (C) 2008, 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ * Copyright (C) 2008, 2024 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -47,6 +47,7 @@
#include <rtems/irq-extension.h>
#include <rtems/score/assert.h>
+#include <rtems/score/processormask.h>
#ifdef RTEMS_SMP
#include <rtems/score/atomic.h>
@@ -62,12 +63,12 @@ extern "C" {
#error "BSP_INTERRUPT_VECTOR_COUNT shall be defined"
#endif
-#if defined(BSP_INTERRUPT_USE_INDEX_TABLE) && !defined(BSP_INTERRUPT_HANDLER_TABLE_SIZE)
- #error "if you define BSP_INTERRUPT_USE_INDEX_TABLE, you have to define BSP_INTERRUPT_HANDLER_TABLE_SIZE etc. as well"
+#if defined(BSP_INTERRUPT_USE_INDEX_TABLE) && !defined(BSP_INTERRUPT_DISPATCH_TABLE_SIZE)
+ #error "if you define BSP_INTERRUPT_USE_INDEX_TABLE, you have to define BSP_INTERRUPT_DISPATCH_TABLE_SIZE etc. as well"
#endif
-#ifndef BSP_INTERRUPT_HANDLER_TABLE_SIZE
- #define BSP_INTERRUPT_HANDLER_TABLE_SIZE BSP_INTERRUPT_VECTOR_COUNT
+#ifndef BSP_INTERRUPT_DISPATCH_TABLE_SIZE
+ #define BSP_INTERRUPT_DISPATCH_TABLE_SIZE BSP_INTERRUPT_VECTOR_COUNT
#endif
#define bsp_interrupt_assert(e) _Assert(e)
@@ -76,56 +77,54 @@ extern "C" {
* @brief Each member of this table references the first installed entry at the
* corresponding interrupt vector or is NULL.
*/
-extern rtems_interrupt_entry *bsp_interrupt_handler_table[];
+extern rtems_interrupt_entry *bsp_interrupt_dispatch_table[];
#ifdef BSP_INTERRUPT_USE_INDEX_TABLE
- #if BSP_INTERRUPT_HANDLER_TABLE_SIZE < 0x100
- typedef uint8_t bsp_interrupt_handler_index_type;
- #elif BSP_INTERRUPT_HANDLER_TABLE_SIZE < 0x10000
- typedef uint16_t bsp_interrupt_handler_index_type;
+ #if BSP_INTERRUPT_DISPATCH_TABLE_SIZE < 0x100
+ typedef uint8_t bsp_interrupt_dispatch_index_type;
+ #elif BSP_INTERRUPT_DISPATCH_TABLE_SIZE < 0x10000
+ typedef uint16_t bsp_interrupt_dispatch_index_type;
#else
- typedef uint32_t bsp_interrupt_handler_index_type;
+ typedef uint32_t bsp_interrupt_dispatch_index_type;
#endif
- extern bsp_interrupt_handler_index_type bsp_interrupt_handler_index_table [];
+ extern bsp_interrupt_dispatch_index_type bsp_interrupt_dispatch_index_table [];
#endif
-static inline rtems_vector_number bsp_interrupt_handler_index(
+static inline rtems_vector_number bsp_interrupt_dispatch_index(
rtems_vector_number vector
)
{
#ifdef BSP_INTERRUPT_USE_INDEX_TABLE
- return bsp_interrupt_handler_index_table [vector];
+ return bsp_interrupt_dispatch_index_table [vector];
#else
return vector;
#endif
}
/**
- * @defgroup bsp_interrupt BSP Interrupt Support
+ * @defgroup RTEMSImplClassicIntr Interrupt Manager
*
- * @ingroup RTEMSBSPsShared
+ * @ingroup RTEMSImplClassic
*
- * @brief Generic BSP Interrupt Support
+ * @brief This group contains the Interrupt Manager implementation.
*
- * The BSP interrupt support manages a sequence of interrupt vector numbers
- * greater than or equal to zero and less than @ref BSP_INTERRUPT_VECTOR_COUNT
- * It provides methods to
- * @ref bsp_interrupt_handler_install() "install",
- * @ref bsp_interrupt_handler_remove() "remove" and
- * @ref bsp_interrupt_handler_dispatch() "dispatch" interrupt handlers for each
- * vector number. It implements parts of the RTEMS interrupt manager.
+ * The Interrupt Manager implementation manages a sequence of interrupt vector
+ * numbers greater than or equal to zero and less than
+ * ``BSP_INTERRUPT_VECTOR_COUNT``. It provides methods to install, remove, and
+ * dispatch interrupt entries for each vector number, see
+ * bsp_interrupt_dispatch_entries().
*
- * The entry points to a list of interrupt handlers are stored in a table
- * (= handler table).
+ * The entry points to a list of interrupt entries are stored in a table
+ * (= dispatch table).
*
- * You have to configure the BSP interrupt support in the <bsp/irq.h> file
+ * You have to configure the Interrupt Manager implementation in the <bsp/irq.h> file
* for each BSP. For a minimum configuration you have to provide
- * @ref BSP_INTERRUPT_VECTOR_COUNT.
+ * ``BSP_INTERRUPT_VECTOR_COUNT``.
*
* For boards with small memory requirements you can define
- * @ref BSP_INTERRUPT_USE_INDEX_TABLE. With an enabled index table the handler
- * table will be accessed via a small index table. You can define the size of
- * the handler table with @ref BSP_INTERRUPT_HANDLER_TABLE_SIZE.
+ * ``BSP_INTERRUPT_USE_INDEX_TABLE``. With an enabled index table the
+ * dispatch table will be accessed via a small index table. You can define the
+ * size of the dispatch table with ``BSP_INTERRUPT_DISPATCH_TABLE_SIZE``.
*
* You have to provide some special routines in your BSP (follow the links for
* the details):
@@ -177,10 +176,10 @@ static inline rtems_vector_number bsp_interrupt_handler_index(
void bsp_interrupt_handler_default(rtems_vector_number vector);
/**
- * @brief Initialize BSP interrupt support.
+ * @brief Initialize Interrupt Manager implementation.
*
* You must call this function before you can install, remove and dispatch
- * interrupt handlers. There is no protection against concurrent
+ * interrupt entries. There is no protection against concurrent
* initialization. This function must be called at most once. The BSP
* specific bsp_interrupt_facility_initialize() function will be called after
* all internals are initialized. If the BSP specific initialization fails,
@@ -249,8 +248,8 @@ rtems_status_code bsp_interrupt_vector_is_enabled(
* @brief Enables the interrupt vector.
*
* This function shall enable the vector at the corresponding facility (in most
- * cases the interrupt controller). It will be called then the first handler
- * is installed for the vector in bsp_interrupt_handler_install() for example.
+ * cases the interrupt controller). It will be called then the first entry
+ * is installed for the vector in rtems_interrupt_entry_install() for example.
*
* @note The implementation should use
* bsp_interrupt_assert( bsp_interrupt_is_valid_vector( vector ) ) to validate
@@ -261,7 +260,10 @@ rtems_status_code bsp_interrupt_vector_is_enabled(
* @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
*
* @retval ::RTEMS_UNSATISFIED The request to enable the interrupt vector has
- * not been satisfied.
+ * not been satisfied. The presence of this error condition is
+ * implementation-defined. The interrupt vector attributes obtained by
+ * rtems_interrupt_get_attributes() should indicate if it is possible to
+ * enable a particular interrupt vector.
*/
rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number vector );
@@ -270,7 +272,7 @@ rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number vector );
*
* This function shall disable the vector at the corresponding facility (in
* most cases the interrupt controller). It will be called then the last
- * handler is removed for the vector in bsp_interrupt_handler_remove() for
+ * entry is removed for the vector in rtems_interrupt_entry_remove() for
* example.
*
* @note The implementation should use
@@ -282,7 +284,10 @@ rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number vector );
* @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
*
* @retval ::RTEMS_UNSATISFIED The request to disable the interrupt vector has
- * not been satisfied.
+ * not been satisfied. The presence of this error condition is
+ * implementation-defined. The interrupt vector attributes obtained by
+ * rtems_interrupt_get_attributes() should indicate if it is possible to
+ * disable a particular interrupt vector.
*/
rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number vector );
@@ -320,8 +325,11 @@ rtems_status_code bsp_interrupt_is_pending(
*
* @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
*
- * @retval ::RTEMS_UNSATISFIED The request to cause the interrupt vector has
- * not been satisfied.
+ * @retval ::RTEMS_UNSATISFIED The request to raise the interrupt vector has
+ * not been satisfied. The presence of this error condition is
+ * implementation-defined. The interrupt vector attributes obtained by
+ * rtems_interrupt_get_attributes() should indicate if it is possible to
+ * raise a particular interrupt vector.
*/
rtems_status_code bsp_interrupt_raise( rtems_vector_number vector );
@@ -338,7 +346,10 @@ rtems_status_code bsp_interrupt_raise( rtems_vector_number vector );
* @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
*
* @retval ::RTEMS_UNSATISFIED The request to cause the interrupt vector has
- * not been satisfied.
+ * not been satisfied. The presence of this error condition is
+ * implementation-defined. The interrupt vector attributes obtained by
+ * rtems_interrupt_get_attributes() should indicate if it is possible to
+ * raise a particular interrupt vector on a specific processor.
*/
rtems_status_code bsp_interrupt_raise_on(
rtems_vector_number vector,
@@ -355,10 +366,62 @@ rtems_status_code bsp_interrupt_raise_on(
* @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
*
* @retval ::RTEMS_UNSATISFIED The request to cause the interrupt vector has
- * not been satisfied.
+ * not been satisfied. The presence of this error condition is
+ * implementation-defined. The interrupt vector attributes obtained by
+ * rtems_interrupt_get_attributes() should indicate if it is possible to
+ * clear a particular interrupt vector.
*/
rtems_status_code bsp_interrupt_clear( rtems_vector_number vector );
+/**
+ * @brief Gets the processor affinity set of the interrupt vector.
+ *
+ * The function may have no implementation in uniprocessor configurations.
+ *
+ * @param vector is the interrupt vector number.
+ *
+ * @param[out] affinity is the pointer to a Processor_mask object. When the
+ * directive call is successful, the processor affinity set of the interrupt
+ * vector will be stored in this object. A set bit in the processor set
+ * means that the corresponding processor is in the processor affinity set of
+ * the interrupt vector, otherwise the bit is cleared.
+ *
+ * @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
+ *
+ * @retval ::RTEMS_UNSATISFIED The request to get the processor affinity of the
+ * interrupt vector has not been satisfied.
+ */
+rtems_status_code bsp_interrupt_get_affinity(
+ rtems_vector_number vector,
+ Processor_mask *affinity
+);
+
+/**
+ * @brief Sets the processor affinity set of the interrupt vector.
+ *
+ * The function may have no implementation in uniprocessor configurations.
+ *
+ * @param vector is the interrupt vector number. It shall be valid.
+ *
+ * @param affinity is the pointer to a Processor_mask object. The processor set
+ * defines the new processor affinity set of the interrupt vector. A set bit
+ * in the processor set means that the corresponding processor shall be in
+ * the processor affinity set of the interrupt vector, otherwise the bit
+ * shall be cleared.
+ *
+ * @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
+ *
+ * @retval ::RTEMS_INVALID_NUMBER The referenced processor set was not a valid
+ * new processor affinity set for the interrupt vector.
+ *
+ * @retval ::RTEMS_UNSATISFIED The request to set the processor affinity of the
+ * interrupt vector has not been satisfied.
+ */
+rtems_status_code bsp_interrupt_set_affinity(
+ rtems_vector_number vector,
+ const Processor_mask *affinity
+);
+
#if defined(RTEMS_SMP)
/**
* @brief Handles a spurious interrupt.
@@ -404,7 +467,7 @@ static inline void bsp_interrupt_entry_store_release(
#if defined(RTEMS_SMP)
_Atomic_Store_uintptr(
(Atomic_Uintptr *) ptr,
- (Atomic_Uintptr) value,
+ (uintptr_t) value,
ATOMIC_ORDER_RELEASE
);
#else
@@ -429,10 +492,10 @@ static inline rtems_interrupt_entry *bsp_interrupt_entry_load_first(
{
rtems_vector_number index;
- index = bsp_interrupt_handler_index( vector );
+ index = bsp_interrupt_dispatch_index( vector );
return bsp_interrupt_entry_load_acquire(
- &bsp_interrupt_handler_table[ index ]
+ &bsp_interrupt_dispatch_table[ index ]
);
}
@@ -463,6 +526,35 @@ static inline void bsp_interrupt_dispatch_entries(
* This function does not validate the vector number. If the vector number is
* out of range, then the behaviour is undefined.
*
+ * The function assumes that no interrupt entries are installed at the vector.
+ * In this case, no operation is performed.
+ *
+ * In uniprocessor configurations, you can call this function within every
+ * context which can be disabled via rtems_interrupt_local_disable().
+ *
+ * In SMP configurations, you can call this function in every context.
+ *
+ * @param vector is the vector number.
+ */
+static inline void bsp_interrupt_handler_dispatch_unlikely(
+ rtems_vector_number vector
+)
+{
+ const rtems_interrupt_entry *entry;
+
+ entry = bsp_interrupt_entry_load_first( vector );
+
+ if ( RTEMS_PREDICT_FALSE( entry != NULL ) ) {
+ bsp_interrupt_dispatch_entries( entry );
+ }
+}
+
+/**
+ * @brief Sequentially calls all interrupt handlers installed at the vector.
+ *
+ * This function does not validate the vector number. If the vector number is
+ * out of range, then the behaviour is undefined.
+ *
* In uniprocessor configurations, you can call this function within every
* context which can be disabled via rtems_interrupt_local_disable().
*
@@ -492,9 +584,9 @@ static inline void bsp_interrupt_handler_dispatch_unchecked(
/**
* @brief Sequentially calls all interrupt handlers installed at the vector.
*
- * If the vector number is out of range or the handler list is empty
- * bsp_interrupt_handler_default() will be called with the vector number as
- * argument.
+ * If the vector number is out of range or the interrupt entry list is empty,
+ * then bsp_interrupt_handler_default() will be called with the vector number
+ * as argument.
*
* In uniprocessor configurations, you can call this function within every
* context which can be disabled via rtems_interrupt_local_disable().
@@ -575,7 +667,7 @@ void bsp_interrupt_entry_remove(
*
* If the bit associated with a vector is set, then the entry is unique,
* otherwise it may be shared. If the bit with index
- * #BSP_INTERRUPT_HANDLER_TABLE_SIZE is set, then the interrupt support is
+ * #BSP_INTERRUPT_DISPATCH_TABLE_SIZE is set, then the interrupt support is
* initialized, otherwise it is not initialized.
*/
extern uint8_t bsp_interrupt_handler_unique_table[];
@@ -633,9 +725,20 @@ static inline void bsp_interrupt_set_handler_unique(
*/
static inline bool bsp_interrupt_is_initialized( void )
{
- return bsp_interrupt_is_handler_unique( BSP_INTERRUPT_HANDLER_TABLE_SIZE );
+ return bsp_interrupt_is_handler_unique( BSP_INTERRUPT_DISPATCH_TABLE_SIZE );
}
+/**
+ * @brief Gets a reference to the interrupt handler table slot associated with
+ * the index.
+ *
+ * @return Returns a reference to the interrupt handler table slot associated
+ * with the index.
+ */
+rtems_interrupt_entry **bsp_interrupt_get_dispatch_table_slot(
+ rtems_vector_number index
+);
+
#ifdef __cplusplus
}
#endif /* __cplusplus */
diff --git a/bsps/include/bsp/irq-info.h b/bsps/include/bsp/irq-info.h
index 25f05a9f69..e687a01dfd 100644
--- a/bsps/include/bsp/irq-info.h
+++ b/bsps/include/bsp/irq-info.h
@@ -3,14 +3,14 @@
/**
* @file
*
- * @ingroup bsp_interrupt
+ * @ingroup RTEMSImplClassicIntr
*
* @brief This header file provides interfaces of the generic interrupt
* controller support for the RTEMS Shell.
*/
/*
- * Copyright (C) 2008, 2009 embedded brains GmbH (http://www.embedded-brains.de)
+ * Copyright (C) 2008, 2009 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
diff --git a/bsps/include/bsp/stackalloc.h b/bsps/include/bsp/stackalloc.h
index 71697592b2..17ac5b74b1 100644
--- a/bsps/include/bsp/stackalloc.h
+++ b/bsps/include/bsp/stackalloc.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
* @file
*
@@ -7,17 +9,28 @@
*/
/*
- * Copyright (c) 2009-2012 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2009, 2012 embedded brains GmbH & Co. KG
*
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * 82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_SHARED_STACK_ALLOC_H
diff --git a/bsps/include/bsp/u-boot.h b/bsps/include/bsp/u-boot.h
index 8bcb1488a4..eb49d1f8ca 100644
--- a/bsps/include/bsp/u-boot.h
+++ b/bsps/include/bsp/u-boot.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
* @file
*
@@ -7,17 +9,28 @@
*/
/*
- * Copyright (c) 2010-2014 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2010, 2014 embedded brains GmbH & Co. KG
*
- * embedded brains GmbH
- * Dornierstr. 4
- * 82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_SHARED_U_BOOT_H
diff --git a/bsps/include/bsp/uart-output-char.h b/bsps/include/bsp/uart-output-char.h
index a6648d1ad4..065f29fa75 100644
--- a/bsps/include/bsp/uart-output-char.h
+++ b/bsps/include/bsp/uart-output-char.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
* @file
*
@@ -7,16 +9,28 @@
*/
/*
- * Copyright (c) 2010
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Copyright (c) 2010 embedded brains GmbH & Co. KG
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_SHARED_UART_OUTPUT_CHAR_H
diff --git a/bsps/include/bsp/utility.h b/bsps/include/bsp/utility.h
index fee28f445a..4466a8c9b7 100644
--- a/bsps/include/bsp/utility.h
+++ b/bsps/include/bsp/utility.h
@@ -1,23 +1,36 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
* @file
*
- * @ingroup bsp_kit
+ * @ingroup RTEMSBSPsShared
*
- * @brief Utility macros.
+ * @brief This header file provides utility macros for BSPs.
*/
/*
- * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2008, 2011 embedded brains GmbH & Co. KG
*
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * 82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBCPU_SHARED_UTILITY_H
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-27 05:48:39 +0000