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-rw-r--r--bsps/bfin/TLL6527M/headers.am7
-rw-r--r--bsps/bfin/TLL6527M/include/bsp.h129
-rw-r--r--bsps/bfin/TLL6527M/include/cplb.h47
-rw-r--r--bsps/bfin/TLL6527M/include/tm27.h50
4 files changed, 233 insertions, 0 deletions
diff --git a/bsps/bfin/TLL6527M/headers.am b/bsps/bfin/TLL6527M/headers.am
new file mode 100644
index 0000000000..1ee13168de
--- /dev/null
+++ b/bsps/bfin/TLL6527M/headers.am
@@ -0,0 +1,7 @@
+## This file was generated by "./boostrap -H".
+
+include_HEADERS =
+include_HEADERS += ../../../../../../bsps/bfin/TLL6527M/include/bsp.h
+include_HEADERS += include/bspopts.h
+include_HEADERS += ../../../../../../bsps/bfin/TLL6527M/include/cplb.h
+include_HEADERS += ../../../../../../bsps/bfin/TLL6527M/include/tm27.h
diff --git a/bsps/bfin/TLL6527M/include/bsp.h b/bsps/bfin/TLL6527M/include/bsp.h
new file mode 100644
index 0000000000..d027d8feff
--- /dev/null
+++ b/bsps/bfin/TLL6527M/include/bsp.h
@@ -0,0 +1,129 @@
+/**
+ * @file bsp.h
+ * @ingroup bfin_tll6527m
+ * @brief Global BSP definitions.
+ *
+ * This include file contains all board IO definitions for TLL6527M.
+ */
+
+/*
+ * COPYRIGHT (c) 2010 by ECE Northeastern University.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license
+ */
+
+#ifndef LIBBSP_BFIN_TLL6527M_BSP_H
+#define LIBBSP_BFIN_TLL6527M_BSP_H
+
+#ifndef ASM
+
+#include <bspopts.h>
+#include <bsp/default-initial-extension.h>
+
+#include <rtems.h>
+#include <rtems/score/bfin.h>
+#include <rtems/bfin/bf52x.h>
+#include <bf52x.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup bfin_tll6527m TLL6527M Support
+ * @ingroup bsp_bfin
+ * @brief TLL6527M Support Package
+ * @{
+ */
+
+/*
+ * PLL and clock setup values:
+ */
+
+/*
+ * PLL configuration for TLL6527M
+ *
+ * XTL = 27 MHz
+ * CLKIN = 13 MHz
+ * VCO = 391 MHz
+ * CCLK = 391 MHz
+ * SCLK = 130 MHz
+ */
+
+/**
+ * @name PLL Configuration
+ * @{
+ */
+
+#define PLL_CSEL 0x0000 ///< @brief CCLK = VCO */
+#define PLL_SSEL 0x0003 ///< @brief SCLK = CCLK/3 */
+#define PLL_MSEL 0x3A00 ///< @brief VCO = 29xCLKIN */
+#define PLL_DF 0x0001 ///< @brief CLKIN = XTL/2 */
+
+/** @} */
+
+/**
+ * @name Clock setup values
+ * @{
+ */
+
+#define CLKIN (25000000) ///< @brief Input clock to the PLL */
+#define CCLK (600000000) ///< @brief CORE CLOCK */
+#define SCLK (100000000) ///< @brief SYSTEM CLOCK */
+
+/** @} */
+
+/**
+ * @name UART setup values
+ * @{
+ */
+
+#define BAUDRATE 57600 ///< @brief Console Baudrate */
+#define WORD_5BITS 0x00 ///< @brief 5 bits word */
+#define WORD_6BITS 0x01 ///< @brief 6 bits word */
+#define WORD_7BITS 0x02 ///< @brief 7 bits word */
+#define WORD_8BITS 0x03 ///< @brief 8 bits word */
+#define EVEN_PARITY 0x18 ///< @brief Enable EVEN parity */
+#define ODD_PARITY 0x08 ///< @brief Enable ODD parity */
+#define TWO_STP_BIT 0x04 ///< @brief 2 stop bits */
+
+/** @} */
+
+/**
+ * @brief Install an interrupt handler
+ *
+ * This method installs an interrupt handle.
+ *
+ * @param[in] handler is the isr routine
+ * @param[in] vector is the vector number
+ * @param[in] type indicates whether RTEMS or RAW intr
+ *
+ * @return returns old vector
+ */
+rtems_isr_entry set_vector(
+ rtems_isr_entry handler,
+ rtems_vector_number vector,
+ int type
+);
+
+/*
+ * Internal BSP methods that are used across file boundaries
+ */
+void Init_RTC(void);
+
+/*
+ * Prototype for methods in .S files that are referenced from C.
+ */
+void bfin_null_isr(void);
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* !ASM */
+
+#endif
diff --git a/bsps/bfin/TLL6527M/include/cplb.h b/bsps/bfin/TLL6527M/include/cplb.h
new file mode 100644
index 0000000000..b6035ca142
--- /dev/null
+++ b/bsps/bfin/TLL6527M/include/cplb.h
@@ -0,0 +1,47 @@
+/**
+ * @file
+ * @ingroup tll6527m_cplb
+ * @brief CPLB configurations.
+ */
+
+/* cplb.h
+ *
+ * Copyright (c) 2006 by Atos Automacao Industrial Ltda.
+ * written by Alain Schaefer <alain.schaefer@easc.ch>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+#ifndef _CPLB_H
+#define _CPLB_H
+
+/**
+ * @defgroup tll6527m_cplb CPLB Configuration
+ * @ingroup bfin_tll6527m
+ * @brief CPLB Configuration
+ * @{
+ */
+
+/* CPLB configurations */
+#define CPLB_DEF_CACHE_WT CPLB_L1_CHBL | CPLB_WT
+#define CPLB_DEF_CACHE_WB CPLB_L1_CHBL
+#define CPLB_CACHE_ENABLED CPLB_L1_CHBL | CPLB_DIRTY
+
+#define CPLB_DEF_CACHE CPLB_L1_CHBL | CPLB_WT
+#define CPLB_ALL_ACCESS CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR
+
+#define CPLB_I_PAGE_MGMT CPLB_LOCK | CPLB_VALID
+#define CPLB_D_PAGE_MGMT CPLB_LOCK | CPLB_ALL_ACCESS | CPLB_VALID
+
+#define CPLB_DNOCACHE CPLB_ALL_ACCESS | CPLB_VALID
+#define CPLB_DDOCACHE CPLB_DNOCACHE | CPLB_DEF_CACHE
+#define CPLB_INOCACHE CPLB_USER_RD | CPLB_VALID
+#define CPLB_IDOCACHE CPLB_INOCACHE | CPLB_L1_CHBL
+
+#define CPLB_DDOCACHE_WT CPLB_DNOCACHE | CPLB_DEF_CACHE_WT
+#define CPLB_DDOCACHE_WB CPLB_DNOCACHE | CPLB_DEF_CACHE_WB
+
+/** @} */
+
+#endif /* _CPLB_H */
diff --git a/bsps/bfin/TLL6527M/include/tm27.h b/bsps/bfin/TLL6527M/include/tm27.h
new file mode 100644
index 0000000000..787004f8a6
--- /dev/null
+++ b/bsps/bfin/TLL6527M/include/tm27.h
@@ -0,0 +1,50 @@
+/**
+ * @file
+ * @ingroup tll6527m_tm27
+ * @brief Interrupt mechanisms for tm27 test.
+ */
+
+/*
+ * tm27.h
+ *
+ * COPYRIGHT (c) 2010 by ECE Northeastern University.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license
+ */
+
+#ifndef _RTEMS_TMTEST27
+#error "This is an RTEMS internal file you must not include directly."
+#endif
+
+#ifndef __tm27_h
+#define __tm27_h
+
+/**
+ * @defgroup tll6527m_tm27 TM27 Test Support
+ * @ingroup bfin_tll6527m
+ * @brief Interrupt Mechanisms for TM27
+ * @{
+ */
+
+/*
+ * Define the interrupt mechanism for Time Test 27
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector(handler) \
+{ \
+ set_vector( handler, 0x06, 1 ); \
+}
+
+#define Cause_tm27_intr() asm volatile("raise 0x06;" : :);
+
+#define Clear_tm27_intr() /* empty */
+
+#define Lower_tm27_intr() /* empty */
+
+/** @} */
+
+#endif