diff options
Diffstat (limited to 'bsps/arm/stm32h7/include/stm32h7xx_ll_sdmmc.h')
| -rw-r--r-- | bsps/arm/stm32h7/include/stm32h7xx_ll_sdmmc.h | 187 |
1 files changed, 101 insertions, 86 deletions
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_ll_sdmmc.h b/bsps/arm/stm32h7/include/stm32h7xx_ll_sdmmc.h index 4d40f8da9e..1a9ad232be 100644 --- a/bsps/arm/stm32h7/include/stm32h7xx_ll_sdmmc.h +++ b/bsps/arm/stm32h7/include/stm32h7xx_ll_sdmmc.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2017 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2017 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -22,7 +21,7 @@ #define STM32H7xx_LL_SDMMC_H #ifdef __cplusplus - extern "C" { +extern "C" { #endif /* Includes ------------------------------------------------------------------*/ @@ -64,10 +63,10 @@ typedef struct This parameter can be a value between Min_Data = 0 and Max_Data = 1023 */ #if (USE_SD_TRANSCEIVER != 0U) - uint32_t TranceiverPresent; /*!< Specifies if there is a 1V8 Tranceiver/Switcher. - This parameter can be a value of @ref SDMMC_LL_TRANCEIVER_PRESENT */ + uint32_t TranceiverPresent; /*!< Specifies if there is a 1V8 Transceiver/Switcher. + This parameter can be a value of @ref SDMMC_LL_TRANSCEIVER_PRESENT */ #endif /* USE_SD_TRANSCEIVER */ -}SDMMC_InitTypeDef; +} SDMMC_InitTypeDef; /** @@ -93,7 +92,7 @@ typedef struct uint32_t CPSM; /*!< Specifies whether SDMMC Command path state machine (CPSM) is enabled or disabled. This parameter can be a value of @ref SDMMC_LL_CPSM_State */ -}SDMMC_CmdInitTypeDef; +} SDMMC_CmdInitTypeDef; /** @@ -118,7 +117,7 @@ typedef struct uint32_t DPSM; /*!< Specifies whether SDMMC Data path state machine (DPSM) is enabled or disabled. This parameter can be a value of @ref SDMMC_LL_DPSM_State */ -}SDMMC_DataInitTypeDef; +} SDMMC_DataInitTypeDef; /** * @} @@ -137,13 +136,11 @@ typedef struct #define SDMMC_ERROR_TX_UNDERRUN ((uint32_t)0x00000010U) /*!< Transmit FIFO underrun */ #define SDMMC_ERROR_RX_OVERRUN ((uint32_t)0x00000020U) /*!< Receive FIFO overrun */ #define SDMMC_ERROR_ADDR_MISALIGNED ((uint32_t)0x00000040U) /*!< Misaligned address */ -#define SDMMC_ERROR_BLOCK_LEN_ERR ((uint32_t)0x00000080U) /*!< Transferred block length is not allowed for the card or the - number of transferred bytes does not match the block length */ +#define SDMMC_ERROR_BLOCK_LEN_ERR ((uint32_t)0x00000080U) /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */ #define SDMMC_ERROR_ERASE_SEQ_ERR ((uint32_t)0x00000100U) /*!< An error in the sequence of erase command occurs */ #define SDMMC_ERROR_BAD_ERASE_PARAM ((uint32_t)0x00000200U) /*!< An invalid selection for erase groups */ #define SDMMC_ERROR_WRITE_PROT_VIOLATION ((uint32_t)0x00000400U) /*!< Attempt to program a write protect block */ -#define SDMMC_ERROR_LOCK_UNLOCK_FAILED ((uint32_t)0x00000800U) /*!< Sequence or password error has been detected in unlock - command or if there was an attempt to access a locked card */ +#define SDMMC_ERROR_LOCK_UNLOCK_FAILED ((uint32_t)0x00000800U) /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */ #define SDMMC_ERROR_COM_CRC_FAILED ((uint32_t)0x00001000U) /*!< CRC check of the previous command failed */ #define SDMMC_ERROR_ILLEGAL_CMD ((uint32_t)0x00002000U) /*!< Command is not legal for the card state */ #define SDMMC_ERROR_CARD_ECC_FAILED ((uint32_t)0x00004000U) /*!< Card internal ECC was applied but failed to correct the data */ @@ -154,8 +151,7 @@ typedef struct #define SDMMC_ERROR_CID_CSD_OVERWRITE ((uint32_t)0x00080000U) /*!< CID/CSD overwrite error */ #define SDMMC_ERROR_WP_ERASE_SKIP ((uint32_t)0x00100000U) /*!< Only partial address space was erased */ #define SDMMC_ERROR_CARD_ECC_DISABLED ((uint32_t)0x00200000U) /*!< Command has been executed without using internal ECC */ -#define SDMMC_ERROR_ERASE_RESET ((uint32_t)0x00400000U) /*!< Erase sequence was cleared before executing because an out - of erase sequence command was received */ +#define SDMMC_ERROR_ERASE_RESET ((uint32_t)0x00400000U) /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */ #define SDMMC_ERROR_AKE_SEQ_ERR ((uint32_t)0x00800000U) /*!< Error in sequence of authentication */ #define SDMMC_ERROR_INVALID_VOLTRANGE ((uint32_t)0x01000000U) /*!< Error in case of invalid voltage range */ #define SDMMC_ERROR_ADDR_OUT_OF_RANGE ((uint32_t)0x02000000U) /*!< Error when addressed block is out of range */ @@ -174,12 +170,10 @@ typedef struct #define SDMMC_CMD_ALL_SEND_CID ((uint8_t)2U) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */ #define SDMMC_CMD_SET_REL_ADDR ((uint8_t)3U) /*!< Asks the card to publish a new relative address (RCA). */ #define SDMMC_CMD_SET_DSR ((uint8_t)4U) /*!< Programs the DSR of all cards. */ -#define SDMMC_CMD_SDMMC_SEN_OP_COND ((uint8_t)5U) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its - operating condition register (OCR) content in the response on the CMD line. */ +#define SDMMC_CMD_SDMMC_SEN_OP_COND ((uint8_t)5U) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its operating condition register (OCR) content in the response on the CMD line.*/ #define SDMMC_CMD_HS_SWITCH ((uint8_t)6U) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */ #define SDMMC_CMD_SEL_DESEL_CARD ((uint8_t)7U) /*!< Selects the card by its own relative address and gets deselected by any other address */ -#define SDMMC_CMD_HS_SEND_EXT_CSD ((uint8_t)8U) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information - and asks the card whether card supports voltage. */ +#define SDMMC_CMD_HS_SEND_EXT_CSD ((uint8_t)8U) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information and asks the card whether card supports voltage. */ #define SDMMC_CMD_SEND_CSD ((uint8_t)9U) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */ #define SDMMC_CMD_SEND_CID ((uint8_t)10U) /*!< Addressed card sends its card identification (CID) on the CMD line. */ #define SDMMC_CMD_VOLTAGE_SWITCH ((uint8_t)11U) /*!< SD card Voltage switch to 1.8V mode. */ @@ -187,18 +181,14 @@ typedef struct #define SDMMC_CMD_SEND_STATUS ((uint8_t)13U) /*!< Addressed card sends its status register. */ #define SDMMC_CMD_HS_BUSTEST_READ ((uint8_t)14U) /*!< Reserved */ #define SDMMC_CMD_GO_INACTIVE_STATE ((uint8_t)15U) /*!< Sends an addressed card into the inactive state. */ -#define SDMMC_CMD_SET_BLOCKLEN ((uint8_t)16U) /*!< Sets the block length (in bytes for SDSC) for all following block commands - (read, write, lock). Default block length is fixed to 512 Bytes. Not effective - for SDHS and SDXC. */ -#define SDMMC_CMD_READ_SINGLE_BLOCK ((uint8_t)17U) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of - fixed 512 bytes in case of SDHC and SDXC. */ -#define SDMMC_CMD_READ_MULT_BLOCK ((uint8_t)18U) /*!< Continuously transfers data blocks from card to host until interrupted by - STOP_TRANSMISSION command. */ +#define SDMMC_CMD_SET_BLOCKLEN ((uint8_t)16U) /*!< Sets the block length (in bytes for SDSC) for all following block commands (read, write, lock). Default block length is fixed to 512 Bytes. Not effective */ +/*!< for SDHS and SDXC. */ +#define SDMMC_CMD_READ_SINGLE_BLOCK ((uint8_t)17U) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of fixed 512 bytes in case of SDHC and SDXC. */ +#define SDMMC_CMD_READ_MULT_BLOCK ((uint8_t)18U) /*!< Continuously transfers data blocks from card to host until interrupted by STOP_TRANSMISSION command. */ #define SDMMC_CMD_HS_BUSTEST_WRITE ((uint8_t)19U) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */ #define SDMMC_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20U) /*!< Speed class control command. */ #define SDMMC_CMD_SET_BLOCK_COUNT ((uint8_t)23U) /*!< Specify block count for CMD18 and CMD25. */ -#define SDMMC_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24U) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of - fixed 512 bytes in case of SDHC and SDXC. */ +#define SDMMC_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24U) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of fixed 512 bytes in case of SDHC and SDXC. */ #define SDMMC_CMD_WRITE_MULT_BLOCK ((uint8_t)25U) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */ #define SDMMC_CMD_PROG_CID ((uint8_t)26U) /*!< Reserved for manufacturers. */ #define SDMMC_CMD_PROG_CSD ((uint8_t)27U) /*!< Programming of the programmable bits of the CSD. */ @@ -207,38 +197,35 @@ typedef struct #define SDMMC_CMD_SEND_WRITE_PROT ((uint8_t)30U) /*!< Asks the card to send the status of the write protection bits. */ #define SDMMC_CMD_SD_ERASE_GRP_START ((uint8_t)32U) /*!< Sets the address of the first write block to be erased. (For SD card only). */ #define SDMMC_CMD_SD_ERASE_GRP_END ((uint8_t)33U) /*!< Sets the address of the last write block of the continuous range to be erased. */ -#define SDMMC_CMD_ERASE_GRP_START ((uint8_t)35U) /*!< Sets the address of the first write block to be erased. Reserved for each command - system set by switch function command (CMD6). */ -#define SDMMC_CMD_ERASE_GRP_END ((uint8_t)36U) /*!< Sets the address of the last write block of the continuous range to be erased. - Reserved for each command system set by switch function command (CMD6). */ +#define SDMMC_CMD_ERASE_GRP_START ((uint8_t)35U) /*!< Sets the address of the first write block to be erased. Reserved for each command system set by switch function command (CMD6). */ +#define SDMMC_CMD_ERASE_GRP_END ((uint8_t)36U) /*!< Sets the address of the last write block of the continuous range to be erased. Reserved for each command system set by switch function command (CMD6). */ #define SDMMC_CMD_ERASE ((uint8_t)38U) /*!< Reserved for SD security applications. */ #define SDMMC_CMD_FAST_IO ((uint8_t)39U) /*!< SD card doesn't support it (Reserved). */ #define SDMMC_CMD_GO_IRQ_STATE ((uint8_t)40U) /*!< SD card doesn't support it (Reserved). */ -#define SDMMC_CMD_LOCK_UNLOCK ((uint8_t)42U) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by - the SET_BLOCK_LEN command. */ -#define SDMMC_CMD_APP_CMD ((uint8_t)55U) /*!< Indicates to the card that the next command is an application specific command rather - than a standard command. */ -#define SDMMC_CMD_GEN_CMD ((uint8_t)56U) /*!< Used either to transfer a data block to the card or to get a data block from the card - for general purpose/application specific commands. */ +#define SDMMC_CMD_LOCK_UNLOCK ((uint8_t)42U) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by the SET_BLOCK_LEN command. */ +#define SDMMC_CMD_APP_CMD ((uint8_t)55U) /*!< Indicates to the card that the next command is an application specific command rather than a standard command. */ +#define SDMMC_CMD_GEN_CMD ((uint8_t)56U) /*!< Used either to transfer a data block to the card or to get a data block from the card for general purpose/application specific commands. */ #define SDMMC_CMD_NO_CMD ((uint8_t)64U) /*!< No command */ /** * @brief Following commands are SD Card Specific commands. * SDMMC_APP_CMD should be sent before sending these commands. */ -#define SDMMC_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6U) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus - widths are given in SCR register. */ +#define SDMMC_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6U) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus widths are given in SCR register. */ #define SDMMC_CMD_SD_APP_STATUS ((uint8_t)13U) /*!< (ACMD13) Sends the SD status. */ -#define SDMMC_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22U) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with - 32bit+CRC data block. */ -#define SDMMC_CMD_SD_APP_OP_COND ((uint8_t)41U) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to - send its operating condition register (OCR) content in the response on the CMD line. */ +#define SDMMC_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22U) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with 32bit+CRC data block. */ +#define SDMMC_CMD_SD_APP_OP_COND ((uint8_t)41U) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to send its operating condition register (OCR) content in the response on the CMD line. */ #define SDMMC_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42U) /*!< (ACMD42) Connect/Disconnect the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card */ #define SDMMC_CMD_SD_APP_SEND_SCR ((uint8_t)51U) /*!< Reads the SD Configuration Register (SCR). */ #define SDMMC_CMD_SDMMC_RW_DIRECT ((uint8_t)52U) /*!< For SD I/O card only, reserved for security specification. */ #define SDMMC_CMD_SDMMC_RW_EXTENDED ((uint8_t)53U) /*!< For SD I/O card only, reserved for security specification. */ /** + * @brief Following commands are MMC Specific commands. + */ +#define SDMMC_CMD_MMC_SLEEP_AWAKE ((uint8_t)5U) /*!< Toggle the device between Sleep state and Standby state. */ + +/** * @brief Following commands are SD Card Specific security commands. * SDMMC_CMD_APP_CMD should be sent before sending these commands. */ @@ -294,6 +281,7 @@ typedef struct #define SDMMC_SDR104_SWITCH_PATTERN ((uint32_t)0x80FF1F03U) #define SDMMC_SDR50_SWITCH_PATTERN ((uint32_t)0x80FF1F02U) #define SDMMC_SDR25_SWITCH_PATTERN ((uint32_t)0x80FFFF01U) +#define SDMMC_SDR12_SWITCH_PATTERN ((uint32_t)0x80FFFF00U) #define SDMMC_MAX_VOLT_TRIAL ((uint32_t)0x0000FFFFU) @@ -305,8 +293,9 @@ typedef struct #define SDMMC_SINGLE_BUS_SUPPORT ((uint32_t)0x00010000U) #define SDMMC_CARD_LOCKED ((uint32_t)0x02000000U) +#ifndef SDMMC_DATATIMEOUT #define SDMMC_DATATIMEOUT ((uint32_t)0xFFFFFFFFU) - +#endif /* SDMMC_DATATIMEOUT */ #define SDMMC_0TO7BITS ((uint32_t)0x000000FFU) #define SDMMC_8TO15BITS ((uint32_t)0x0000FF00U) #define SDMMC_16TO23BITS ((uint32_t)0x00FF0000U) @@ -374,13 +363,16 @@ typedef struct #define SDMMC_SPEED_MODE_DEFAULT ((uint32_t)0x00000001U) #define SDMMC_SPEED_MODE_HIGH ((uint32_t)0x00000002U) #define SDMMC_SPEED_MODE_ULTRA ((uint32_t)0x00000003U) +#define SDMMC_SPEED_MODE_ULTRA_SDR104 SDMMC_SPEED_MODE_ULTRA #define SDMMC_SPEED_MODE_DDR ((uint32_t)0x00000004U) +#define SDMMC_SPEED_MODE_ULTRA_SDR50 ((uint32_t)0x00000005U) -#define IS_SDMMC_SPEED_MODE(MODE) (((MODE) == SDMMC_SPEED_MODE_AUTO) || \ - ((MODE) == SDMMC_SPEED_MODE_DEFAULT) || \ - ((MODE) == SDMMC_SPEED_MODE_HIGH) || \ - ((MODE) == SDMMC_SPEED_MODE_ULTRA) || \ - ((MODE) == SDMMC_SPEED_MODE_DDR)) +#define IS_SDMMC_SPEED_MODE(MODE) (((MODE) == SDMMC_SPEED_MODE_AUTO) || \ + ((MODE) == SDMMC_SPEED_MODE_DEFAULT) || \ + ((MODE) == SDMMC_SPEED_MODE_HIGH) || \ + ((MODE) == SDMMC_SPEED_MODE_ULTRA) || \ + ((MODE) == SDMMC_SPEED_MODE_ULTRA_SDR50) || \ + ((MODE) == SDMMC_SPEED_MODE_DDR)) /** * @} @@ -409,7 +401,7 @@ typedef struct * @} */ -/** @defgroup SDMMC_LL_TRANSCEIVER_PRESENT Tranceiver Present +/** @defgroup SDMMC_LL_TRANSCEIVER_PRESENT Transceiver Present * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ @@ -500,7 +492,7 @@ typedef struct * @} */ -/** @defgroup SDMMC_LL_Data_Length Data Lenght +/** @defgroup SDMMC_LL_Data_Length Data Length * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ @@ -520,14 +512,18 @@ typedef struct #define SDMMC_DATABLOCK_SIZE_16B SDMMC_DCTRL_DBLOCKSIZE_2 #define SDMMC_DATABLOCK_SIZE_32B (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_2) #define SDMMC_DATABLOCK_SIZE_64B (SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_2) -#define SDMMC_DATABLOCK_SIZE_128B (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_2) +#define SDMMC_DATABLOCK_SIZE_128B (SDMMC_DCTRL_DBLOCKSIZE_0| \ + SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_2) #define SDMMC_DATABLOCK_SIZE_256B SDMMC_DCTRL_DBLOCKSIZE_3 #define SDMMC_DATABLOCK_SIZE_512B (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_3) #define SDMMC_DATABLOCK_SIZE_1024B (SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_3) -#define SDMMC_DATABLOCK_SIZE_2048B (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_3) +#define SDMMC_DATABLOCK_SIZE_2048B (SDMMC_DCTRL_DBLOCKSIZE_0| \ + SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_3) #define SDMMC_DATABLOCK_SIZE_4096B (SDMMC_DCTRL_DBLOCKSIZE_2|SDMMC_DCTRL_DBLOCKSIZE_3) -#define SDMMC_DATABLOCK_SIZE_8192B (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_2|SDMMC_DCTRL_DBLOCKSIZE_3) -#define SDMMC_DATABLOCK_SIZE_16384B (SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_2|SDMMC_DCTRL_DBLOCKSIZE_3) +#define SDMMC_DATABLOCK_SIZE_8192B (SDMMC_DCTRL_DBLOCKSIZE_0| \ + SDMMC_DCTRL_DBLOCKSIZE_2|SDMMC_DCTRL_DBLOCKSIZE_3) +#define SDMMC_DATABLOCK_SIZE_16384B (SDMMC_DCTRL_DBLOCKSIZE_1| \ + SDMMC_DCTRL_DBLOCKSIZE_2|SDMMC_DCTRL_DBLOCKSIZE_3) #define IS_SDMMC_BLOCK_SIZE(SIZE) (((SIZE) == SDMMC_DATABLOCK_SIZE_1B) || \ ((SIZE) == SDMMC_DATABLOCK_SIZE_2B) || \ @@ -665,21 +661,21 @@ typedef struct #define SDMMC_FLAG_IDMATE SDMMC_STA_IDMATE #define SDMMC_FLAG_IDMABTC SDMMC_STA_IDMABTC -#define SDMMC_STATIC_FLAGS ((uint32_t)(SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_CTIMEOUT |\ - SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_RXOVERR |\ - SDMMC_FLAG_CMDREND | SDMMC_FLAG_CMDSENT | SDMMC_FLAG_DATAEND |\ - SDMMC_FLAG_DHOLD | SDMMC_FLAG_DBCKEND | SDMMC_FLAG_DABORT |\ - SDMMC_FLAG_BUSYD0END | SDMMC_FLAG_SDIOIT | SDMMC_FLAG_ACKFAIL |\ - SDMMC_FLAG_ACKTIMEOUT | SDMMC_FLAG_VSWEND | SDMMC_FLAG_CKSTOP |\ - SDMMC_FLAG_IDMATE | SDMMC_FLAG_IDMABTC)) - -#define SDMMC_STATIC_CMD_FLAGS ((uint32_t)(SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CTIMEOUT | SDMMC_FLAG_CMDREND |\ - SDMMC_FLAG_CMDSENT | SDMMC_FLAG_BUSYD0END)) - -#define SDMMC_STATIC_DATA_FLAGS ((uint32_t)(SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_TXUNDERR |\ - SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DATAEND | SDMMC_FLAG_DHOLD |\ - SDMMC_FLAG_DBCKEND | SDMMC_FLAG_DABORT | SDMMC_FLAG_IDMATE |\ - SDMMC_FLAG_IDMABTC)) +#define SDMMC_STATIC_FLAGS ((uint32_t)(SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_CTIMEOUT |\ + SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_RXOVERR |\ + SDMMC_FLAG_CMDREND | SDMMC_FLAG_CMDSENT | SDMMC_FLAG_DATAEND |\ + SDMMC_FLAG_DHOLD | SDMMC_FLAG_DBCKEND | SDMMC_FLAG_DABORT |\ + SDMMC_FLAG_BUSYD0END | SDMMC_FLAG_SDIOIT | SDMMC_FLAG_ACKFAIL |\ + SDMMC_FLAG_ACKTIMEOUT | SDMMC_FLAG_VSWEND | SDMMC_FLAG_CKSTOP |\ + SDMMC_FLAG_IDMATE | SDMMC_FLAG_IDMABTC)) + +#define SDMMC_STATIC_CMD_FLAGS ((uint32_t)(SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CTIMEOUT | SDMMC_FLAG_CMDREND |\ + SDMMC_FLAG_CMDSENT | SDMMC_FLAG_BUSYD0END)) + +#define SDMMC_STATIC_DATA_FLAGS ((uint32_t)(SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_TXUNDERR |\ + SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DATAEND | SDMMC_FLAG_DHOLD |\ + SDMMC_FLAG_DBCKEND | SDMMC_FLAG_DABORT | SDMMC_FLAG_IDMATE |\ + SDMMC_FLAG_IDMABTC)) /** * @} */ @@ -723,19 +719,19 @@ typedef struct #define SDMMC_INIT_CLK_DIV ((uint8_t)0xFA) /* SDMMC Default Speed Frequency (25Mhz max) for Peripheral CLK 200MHz*/ -#define SDMMC_NSpeed_CLK_DIV ((uint8_t)0x4) +#define SDMMC_NSPEED_CLK_DIV ((uint8_t)0x4) /* SDMMC High Speed Frequency (50Mhz max) for Peripheral CLK 200MHz*/ -#define SDMMC_HSpeed_CLK_DIV ((uint8_t)0x2) +#define SDMMC_HSPEED_CLK_DIV ((uint8_t)0x2) /** * @} */ /** @defgroup SDMMC_LL_Interrupt_Clock Interrupt And Clock Configuration * @ingroup RTEMSBSPsARMSTM32H7 - * @brief macros to handle interrupts and specific clock configurations - * @{ - */ + * @brief macros to handle interrupts and specific clock configurations + * @{ + */ /** * @brief Enable the SDMMC device interrupt. @@ -1060,14 +1056,20 @@ uint8_t SDMMC_GetCommandResponse(SDMMC_TypeDef *SDMMCx); uint32_t SDMMC_GetResponse(SDMMC_TypeDef *SDMMCx, uint32_t Response); /* Data path state machine (DPSM) management functions */ -HAL_StatusTypeDef SDMMC_ConfigData(SDMMC_TypeDef *SDMMCx, SDMMC_DataInitTypeDef* Data); +HAL_StatusTypeDef SDMMC_ConfigData(SDMMC_TypeDef *SDMMCx, SDMMC_DataInitTypeDef *Data); uint32_t SDMMC_GetDataCounter(SDMMC_TypeDef *SDMMCx); uint32_t SDMMC_GetFIFOCount(SDMMC_TypeDef *SDMMCx); /* SDMMC Cards mode management functions */ HAL_StatusTypeDef SDMMC_SetSDMMCReadWaitMode(SDMMC_TypeDef *SDMMCx, uint32_t SDMMC_ReadWaitMode); +/** + * @} + */ -/* SDMMC Commands management functions */ +/* SDMMC Commands management functions ******************************************/ +/** @addtogroup HAL_SDMMC_LL_Group4 + * @{ + */ uint32_t SDMMC_CmdBlockLength(SDMMC_TypeDef *SDMMCx, uint32_t BlockSize); uint32_t SDMMC_CmdReadSingleBlock(SDMMC_TypeDef *SDMMCx, uint32_t ReadAdd); uint32_t SDMMC_CmdReadMultiBlock(SDMMC_TypeDef *SDMMCx, uint32_t ReadAdd); @@ -1077,9 +1079,9 @@ uint32_t SDMMC_CmdEraseStartAdd(SDMMC_TypeDef *SDMMCx, uint32_t StartAdd); uint32_t SDMMC_CmdSDEraseStartAdd(SDMMC_TypeDef *SDMMCx, uint32_t StartAdd); uint32_t SDMMC_CmdEraseEndAdd(SDMMC_TypeDef *SDMMCx, uint32_t EndAdd); uint32_t SDMMC_CmdSDEraseEndAdd(SDMMC_TypeDef *SDMMCx, uint32_t EndAdd); -uint32_t SDMMC_CmdErase(SDMMC_TypeDef *SDMMCx); +uint32_t SDMMC_CmdErase(SDMMC_TypeDef *SDMMCx, uint32_t EraseType); uint32_t SDMMC_CmdStopTransfer(SDMMC_TypeDef *SDMMCx); -uint32_t SDMMC_CmdSelDesel(SDMMC_TypeDef *SDMMCx, uint64_t Addr); +uint32_t SDMMC_CmdSelDesel(SDMMC_TypeDef *SDMMCx, uint32_t Addr); uint32_t SDMMC_CmdGoIdleState(SDMMC_TypeDef *SDMMCx); uint32_t SDMMC_CmdOperCond(SDMMC_TypeDef *SDMMCx); uint32_t SDMMC_CmdAppCommand(SDMMC_TypeDef *SDMMCx, uint32_t Argument); @@ -1089,17 +1091,32 @@ uint32_t SDMMC_CmdSendSCR(SDMMC_TypeDef *SDMMCx); uint32_t SDMMC_CmdSendCID(SDMMC_TypeDef *SDMMCx); uint32_t SDMMC_CmdSendCSD(SDMMC_TypeDef *SDMMCx, uint32_t Argument); uint32_t SDMMC_CmdSetRelAdd(SDMMC_TypeDef *SDMMCx, uint16_t *pRCA); +uint32_t SDMMC_CmdSetRelAddMmc(SDMMC_TypeDef *SDMMCx, uint16_t RCA); +uint32_t SDMMC_CmdSleepMmc(SDMMC_TypeDef *SDMMCx, uint32_t Argument); uint32_t SDMMC_CmdSendStatus(SDMMC_TypeDef *SDMMCx, uint32_t Argument); uint32_t SDMMC_CmdStatusRegister(SDMMC_TypeDef *SDMMCx); uint32_t SDMMC_CmdVoltageSwitch(SDMMC_TypeDef *SDMMCx); uint32_t SDMMC_CmdOpCondition(SDMMC_TypeDef *SDMMCx, uint32_t Argument); uint32_t SDMMC_CmdSwitch(SDMMC_TypeDef *SDMMCx, uint32_t Argument); uint32_t SDMMC_CmdSendEXTCSD(SDMMC_TypeDef *SDMMCx, uint32_t Argument); +/** + * @} + */ +/* SDMMC Responses management functions *****************************************/ +/** @addtogroup HAL_SDMMC_LL_Group5 + * @{ + */ +uint32_t SDMMC_GetCmdResp1(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint32_t Timeout); +uint32_t SDMMC_GetCmdResp2(SDMMC_TypeDef *SDMMCx); +uint32_t SDMMC_GetCmdResp3(SDMMC_TypeDef *SDMMCx); +uint32_t SDMMC_GetCmdResp6(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint16_t *pRCA); +uint32_t SDMMC_GetCmdResp7(SDMMC_TypeDef *SDMMCx); /** * @} */ + /** * @} */ @@ -1112,7 +1129,7 @@ uint32_t SDMMC_CmdSendEXTCSD(SDMMC_TypeDef *SDMMCx, uint32_t Argument); * @} */ - /** +/** * @} */ @@ -1124,5 +1141,3 @@ uint32_t SDMMC_CmdSendEXTCSD(SDMMC_TypeDef *SDMMCx, uint32_t Argument); #endif #endif /* STM32H7xx_LL_SDMMC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |