summaryrefslogtreecommitdiffstats
path: root/bsps/arm/stm32h7/include/stm32h7xx_ll_bdma.h
diff options
context:
space:
mode:
Diffstat (limited to 'bsps/arm/stm32h7/include/stm32h7xx_ll_bdma.h')
-rw-r--r--bsps/arm/stm32h7/include/stm32h7xx_ll_bdma.h158
1 files changed, 97 insertions, 61 deletions
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_ll_bdma.h b/bsps/arm/stm32h7/include/stm32h7xx_ll_bdma.h
index b62e485f75..c1f522958e 100644
--- a/bsps/arm/stm32h7/include/stm32h7xx_ll_bdma.h
+++ b/bsps/arm/stm32h7/include/stm32h7xx_ll_bdma.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics.
- * All rights reserved.</center></h2>
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -64,10 +63,16 @@ static const uint8_t LL_BDMA_CH_OFFSET_TAB[] =
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
+/** @defgroup BDMA_LL_Private_Macros BDMA Private Macros
+ * @ingroup RTEMSBSPsARMSTM32H7
+ * @{
+ */
#if !defined(UNUSED)
#define UNUSED(x) ((void)(x))
#endif
-
+/**
+ * @}
+ */
/* Exported types ------------------------------------------------------------*/
#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
/** @defgroup BDMA_LL_ES_INIT BDMA Exported Init structure
@@ -131,7 +136,7 @@ typedef struct
This feature can be modified afterwards using unitary function @ref LL_BDMA_SetDataLength(). */
uint32_t PeriphRequest; /*!< Specifies the peripheral request.
- This parameter can be a value of @ref DMAMUX_LL_EC_REQUEST
+ This parameter can be a value of @ref DMAMUX2_Request_selection
This feature can be modified afterwards using unitary function @ref LL_BDMA_SetPeriphRequest(). */
@@ -355,6 +360,9 @@ typedef struct
* @}
*/
+/**
+ * @}
+ */
/* Exported macro ------------------------------------------------------------*/
/** @defgroup BDMA_LL_Exported_Macros BDMA Exported Macros
* @ingroup RTEMSBSPsARMSTM32H7
@@ -506,7 +514,7 @@ LL_BDMA_CHANNEL_7)
*/
__STATIC_INLINE void LL_BDMA_EnableChannel(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
SET_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_EN);
}
@@ -528,7 +536,7 @@ __STATIC_INLINE void LL_BDMA_EnableChannel(BDMA_TypeDef *BDMAx, uint32_t Channel
*/
__STATIC_INLINE void LL_BDMA_DisableChannel(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
CLEAR_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_EN);
}
@@ -550,7 +558,7 @@ __STATIC_INLINE void LL_BDMA_DisableChannel(BDMA_TypeDef *BDMAx, uint32_t Channe
*/
__STATIC_INLINE uint32_t LL_BDMA_IsEnabledChannel(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return ((READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_EN) == (BDMA_CCR_EN)) ? 1UL : 0UL);
}
@@ -587,7 +595,7 @@ __STATIC_INLINE uint32_t LL_BDMA_IsEnabledChannel(BDMA_TypeDef *BDMAx, uint32_t
*/
__STATIC_INLINE void LL_BDMA_ConfigTransfer(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t Configuration)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR,
BDMA_CCR_DIR | BDMA_CCR_MEM2MEM | BDMA_CCR_CIRC | BDMA_CCR_PINC | BDMA_CCR_MINC | BDMA_CCR_PSIZE | BDMA_CCR_MSIZE | BDMA_CCR_PL,
@@ -616,7 +624,7 @@ __STATIC_INLINE void LL_BDMA_ConfigTransfer(BDMA_TypeDef *BDMAx, uint32_t Channe
*/
__STATIC_INLINE void LL_BDMA_SetDataTransferDirection(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t Direction)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR,
BDMA_CCR_DIR | BDMA_CCR_MEM2MEM, Direction);
@@ -643,7 +651,7 @@ __STATIC_INLINE void LL_BDMA_SetDataTransferDirection(BDMA_TypeDef *BDMAx, uint3
*/
__STATIC_INLINE uint32_t LL_BDMA_GetDataTransferDirection(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR,
BDMA_CCR_DIR | BDMA_CCR_MEM2MEM));
@@ -671,7 +679,7 @@ __STATIC_INLINE uint32_t LL_BDMA_GetDataTransferDirection(BDMA_TypeDef *BDMAx, u
*/
__STATIC_INLINE void LL_BDMA_SetMode(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t Mode)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_CIRC,
Mode);
@@ -696,7 +704,7 @@ __STATIC_INLINE void LL_BDMA_SetMode(BDMA_TypeDef *BDMAx, uint32_t Channel, uint
*/
__STATIC_INLINE uint32_t LL_BDMA_GetMode(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR,
BDMA_CCR_CIRC));
@@ -722,7 +730,7 @@ __STATIC_INLINE uint32_t LL_BDMA_GetMode(BDMA_TypeDef *BDMAx, uint32_t Channel)
*/
__STATIC_INLINE void LL_BDMA_SetPeriphIncMode(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_PINC,
PeriphOrM2MSrcIncMode);
@@ -747,7 +755,7 @@ __STATIC_INLINE void LL_BDMA_SetPeriphIncMode(BDMA_TypeDef *BDMAx, uint32_t Chan
*/
__STATIC_INLINE uint32_t LL_BDMA_GetPeriphIncMode(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR,
BDMA_CCR_PINC));
@@ -773,7 +781,7 @@ __STATIC_INLINE uint32_t LL_BDMA_GetPeriphIncMode(BDMA_TypeDef *BDMAx, uint32_t
*/
__STATIC_INLINE void LL_BDMA_SetMemoryIncMode(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t MemoryOrM2MDstIncMode)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_MINC,
MemoryOrM2MDstIncMode);
@@ -798,7 +806,7 @@ __STATIC_INLINE void LL_BDMA_SetMemoryIncMode(BDMA_TypeDef *BDMAx, uint32_t Chan
*/
__STATIC_INLINE uint32_t LL_BDMA_GetMemoryIncMode(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR,
BDMA_CCR_MINC));
@@ -825,7 +833,7 @@ __STATIC_INLINE uint32_t LL_BDMA_GetMemoryIncMode(BDMA_TypeDef *BDMAx, uint32_t
*/
__STATIC_INLINE void LL_BDMA_SetPeriphSize(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_PSIZE,
PeriphOrM2MSrcDataSize);
@@ -851,7 +859,7 @@ __STATIC_INLINE void LL_BDMA_SetPeriphSize(BDMA_TypeDef *BDMAx, uint32_t Channel
*/
__STATIC_INLINE uint32_t LL_BDMA_GetPeriphSize(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR,
BDMA_CCR_PSIZE));
@@ -878,7 +886,7 @@ __STATIC_INLINE uint32_t LL_BDMA_GetPeriphSize(BDMA_TypeDef *BDMAx, uint32_t Cha
*/
__STATIC_INLINE void LL_BDMA_SetMemorySize(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t MemoryOrM2MDstDataSize)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_MSIZE,
MemoryOrM2MDstDataSize);
@@ -904,7 +912,7 @@ __STATIC_INLINE void LL_BDMA_SetMemorySize(BDMA_TypeDef *BDMAx, uint32_t Channel
*/
__STATIC_INLINE uint32_t LL_BDMA_GetMemorySize(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR,
BDMA_CCR_MSIZE));
@@ -932,7 +940,7 @@ __STATIC_INLINE uint32_t LL_BDMA_GetMemorySize(BDMA_TypeDef *BDMAx, uint32_t Cha
*/
__STATIC_INLINE void LL_BDMA_SetChannelPriorityLevel(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t Priority)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_PL,
Priority);
@@ -959,7 +967,7 @@ __STATIC_INLINE void LL_BDMA_SetChannelPriorityLevel(BDMA_TypeDef *BDMAx, uint32
*/
__STATIC_INLINE uint32_t LL_BDMA_GetChannelPriorityLevel(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR,
BDMA_CCR_PL));
@@ -985,7 +993,7 @@ __STATIC_INLINE uint32_t LL_BDMA_GetChannelPriorityLevel(BDMA_TypeDef *BDMAx, ui
*/
__STATIC_INLINE void LL_BDMA_SetDataLength(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t NbData)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CNDTR,
BDMA_CNDTR_NDT, NbData);
@@ -1010,7 +1018,7 @@ __STATIC_INLINE void LL_BDMA_SetDataLength(BDMA_TypeDef *BDMAx, uint32_t Channel
*/
__STATIC_INLINE uint32_t LL_BDMA_GetDataLength(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CNDTR,
BDMA_CNDTR_NDT));
@@ -1036,7 +1044,7 @@ __STATIC_INLINE uint32_t LL_BDMA_GetDataLength(BDMA_TypeDef *BDMAx, uint32_t Cha
*/
__STATIC_INLINE void LL_BDMA_SetCurrentTargetMem(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t CurrentMemory)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_CT, CurrentMemory);
}
@@ -1060,7 +1068,7 @@ __STATIC_INLINE void LL_BDMA_SetCurrentTargetMem(BDMA_TypeDef *BDMAx, uint32_t C
*/
__STATIC_INLINE uint32_t LL_BDMA_GetCurrentTargetMem(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return (READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_CT));
}
@@ -1082,7 +1090,7 @@ __STATIC_INLINE uint32_t LL_BDMA_GetCurrentTargetMem(BDMA_TypeDef *BDMAx, uint32
*/
__STATIC_INLINE void LL_BDMA_EnableDoubleBufferMode(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
SET_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_DBM);
}
@@ -1104,7 +1112,7 @@ __STATIC_INLINE void LL_BDMA_EnableDoubleBufferMode(BDMA_TypeDef *BDMAx, uint32_
*/
__STATIC_INLINE void LL_BDMA_DisableDoubleBufferMode(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
CLEAR_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_DBM);
}
@@ -1112,7 +1120,7 @@ __STATIC_INLINE void LL_BDMA_DisableDoubleBufferMode(BDMA_TypeDef *BDMAx, uint32
/**
* @brief Configure the Source and Destination addresses.
* @note This API must not be called when the BDMA channel is enabled.
- * @note Each IP using BDMA provides an API to get directly the register adress (LL_PPP_BDMA_GetRegAddr).
+ * @note Each IP using BDMA provides an API to get directly the register address (LL_PPP_BDMA_GetRegAddr).
* @rmtoll CPAR PA LL_BDMA_ConfigAddresses\n
* CMAR MA LL_BDMA_ConfigAddresses
* @param BDMAx BDMA Instance
@@ -1136,7 +1144,7 @@ __STATIC_INLINE void LL_BDMA_DisableDoubleBufferMode(BDMA_TypeDef *BDMAx, uint32
__STATIC_INLINE void LL_BDMA_ConfigAddresses(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t SrcAddress,
uint32_t DstAddress, uint32_t Direction)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
/* Direction Memory to Periph */
if (Direction == LL_BDMA_DIRECTION_MEMORY_TO_PERIPH)
@@ -1172,7 +1180,7 @@ __STATIC_INLINE void LL_BDMA_ConfigAddresses(BDMA_TypeDef *BDMAx, uint32_t Chann
*/
__STATIC_INLINE void LL_BDMA_SetMemoryAddress(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t MemoryAddress)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
WRITE_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM0AR, MemoryAddress);
}
@@ -1197,7 +1205,7 @@ __STATIC_INLINE void LL_BDMA_SetMemoryAddress(BDMA_TypeDef *BDMAx, uint32_t Chan
*/
__STATIC_INLINE void LL_BDMA_SetPeriphAddress(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t PeriphAddress)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
WRITE_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CPAR, PeriphAddress);
}
@@ -1220,7 +1228,7 @@ __STATIC_INLINE void LL_BDMA_SetPeriphAddress(BDMA_TypeDef *BDMAx, uint32_t Chan
*/
__STATIC_INLINE uint32_t LL_BDMA_GetMemoryAddress(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return (READ_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM0AR));
}
@@ -1243,7 +1251,7 @@ __STATIC_INLINE uint32_t LL_BDMA_GetMemoryAddress(BDMA_TypeDef *BDMAx, uint32_t
*/
__STATIC_INLINE uint32_t LL_BDMA_GetPeriphAddress(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return (READ_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CPAR));
}
@@ -1268,7 +1276,7 @@ __STATIC_INLINE uint32_t LL_BDMA_GetPeriphAddress(BDMA_TypeDef *BDMAx, uint32_t
*/
__STATIC_INLINE void LL_BDMA_SetM2MSrcAddress(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t MemoryAddress)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
WRITE_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CPAR, MemoryAddress);
}
@@ -1293,7 +1301,7 @@ __STATIC_INLINE void LL_BDMA_SetM2MSrcAddress(BDMA_TypeDef *BDMAx, uint32_t Chan
*/
__STATIC_INLINE void LL_BDMA_SetM2MDstAddress(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t MemoryAddress)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
WRITE_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM0AR, MemoryAddress);
}
@@ -1316,7 +1324,7 @@ __STATIC_INLINE void LL_BDMA_SetM2MDstAddress(BDMA_TypeDef *BDMAx, uint32_t Chan
*/
__STATIC_INLINE uint32_t LL_BDMA_GetM2MSrcAddress(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return (READ_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CPAR));
}
@@ -1339,7 +1347,7 @@ __STATIC_INLINE uint32_t LL_BDMA_GetM2MSrcAddress(BDMA_TypeDef *BDMAx, uint32_t
*/
__STATIC_INLINE uint32_t LL_BDMA_GetM2MDstAddress(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return (READ_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM0AR));
}
@@ -1362,7 +1370,7 @@ __STATIC_INLINE uint32_t LL_BDMA_GetM2MDstAddress(BDMA_TypeDef *BDMAx, uint32_t
*/
__STATIC_INLINE void LL_BDMA_SetMemory1Address(BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t Address)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM1AR, BDMA_CM1AR_MA, Address);
}
@@ -1384,7 +1392,7 @@ __STATIC_INLINE void LL_BDMA_SetMemory1Address(BDMA_TypeDef *BDMAx, uint32_t Cha
*/
__STATIC_INLINE uint32_t LL_BDMA_GetMemory1Address(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return (((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM1AR);
}
@@ -1422,8 +1430,9 @@ __STATIC_INLINE uint32_t LL_BDMA_GetMemory1Address(BDMA_TypeDef *BDMAx, uint32_t
* @arg @ref LL_DMAMUX2_REQ_SAI4_A (*)
* @arg @ref LL_DMAMUX2_REQ_SAI4_B (*)
* @arg @ref LL_DMAMUX2_REQ_ADC3 (*)
- * @arg @ref LL_DMAMUX2_REQ_DAC3 (*)
+ * @arg @ref LL_DMAMUX2_REQ_DAC2_CH1 (*)
* @arg @ref LL_DMAMUX2_REQ_DFSDM2_FLT0 (*)
+ *
* @note (*) Availability depends on devices.
* @retval None
*/
@@ -1466,8 +1475,9 @@ __STATIC_INLINE void LL_BDMA_SetPeriphRequest(BDMA_TypeDef *BDMAx, uint32_t Chan
* @arg @ref LL_DMAMUX2_REQ_SAI4_A (*)
* @arg @ref LL_DMAMUX2_REQ_SAI4_B (*)
* @arg @ref LL_DMAMUX2_REQ_ADC3 (*)
- * @arg @ref LL_DMAMUX2_REQ_DAC3 (*)
+ * @arg @ref LL_DMAMUX2_REQ_DAC2_CH1 (*)
* @arg @ref LL_DMAMUX2_REQ_DFSDM2_FLT0 (*)
+ *
* @note (*) Availability depends on devices.
*/
__STATIC_INLINE uint32_t LL_BDMA_GetPeriphRequest(BDMA_TypeDef *BDMAx, uint32_t Channel)
@@ -1838,6 +1848,10 @@ __STATIC_INLINE uint32_t LL_BDMA_IsActiveFlag_TE7(BDMA_TypeDef *BDMAx)
/**
* @brief Clear Channel 0 global interrupt flag.
+ * @note Do not Clear Channel 0 global interrupt flag when the channel in ON.
+ Instead clear specific flags transfer complete, half transfer & transfer
+ error flag with LL_DMA_ClearFlag_TC0, LL_DMA_ClearFlag_HT0,
+ LL_DMA_ClearFlag_TE0. bug id 2.3.1 in Product Errata Sheet.
* @rmtoll IFCR CGIF0 LL_BDMA_ClearFlag_GI0
* @param BDMAx BDMA Instance
* @retval None
@@ -1849,6 +1863,10 @@ __STATIC_INLINE void LL_BDMA_ClearFlag_GI0(BDMA_TypeDef *BDMAx)
/**
* @brief Clear Channel 1 global interrupt flag.
+ * @note Do not Clear Channel 1 global interrupt flag when the channel in ON.
+ Instead clear specific flags transfer complete, half transfer & transfer
+ error flag with LL_DMA_ClearFlag_TC1, LL_DMA_ClearFlag_HT1,
+ LL_DMA_ClearFlag_TE1. bug id 2.3.1 in Product Errata Sheet.
* @rmtoll IFCR CGIF1 LL_BDMA_ClearFlag_GI1
* @param BDMAx BDMA Instance
* @retval None
@@ -1860,6 +1878,10 @@ __STATIC_INLINE void LL_BDMA_ClearFlag_GI1(BDMA_TypeDef *BDMAx)
/**
* @brief Clear Channel 2 global interrupt flag.
+ * @note Do not Clear Channel 2 global interrupt flag when the channel in ON.
+ Instead clear specific flags transfer complete, half transfer & transfer
+ error flag with LL_DMA_ClearFlag_TC2, LL_DMA_ClearFlag_HT2,
+ LL_DMA_ClearFlag_TE2. bug id 2.3.1 in Product Errata Sheet.
* @rmtoll IFCR CGIF2 LL_BDMA_ClearFlag_GI2
* @param BDMAx BDMA Instance
* @retval None
@@ -1871,6 +1893,10 @@ __STATIC_INLINE void LL_BDMA_ClearFlag_GI2(BDMA_TypeDef *BDMAx)
/**
* @brief Clear Channel 3 global interrupt flag.
+ * @note Do not Clear Channel 3 global interrupt flag when the channel in ON.
+ Instead clear specific flags transfer complete, half transfer & transfer
+ error flag with LL_DMA_ClearFlag_TC3, LL_DMA_ClearFlag_HT3,
+ LL_DMA_ClearFlag_TE3. bug id 2.3.1 in Product Errata Sheet.
* @rmtoll IFCR CGIF3 LL_BDMA_ClearFlag_GI3
* @param BDMAx BDMA Instance
* @retval None
@@ -1882,6 +1908,10 @@ __STATIC_INLINE void LL_BDMA_ClearFlag_GI3(BDMA_TypeDef *BDMAx)
/**
* @brief Clear Channel 4 global interrupt flag.
+ * @note Do not Clear Channel 4 global interrupt flag when the channel in ON.
+ Instead clear specific flags transfer complete, half transfer & transfer
+ error flag with LL_DMA_ClearFlag_TC4, LL_DMA_ClearFlag_HT4,
+ LL_DMA_ClearFlag_TE4. bug id 2.3.1 in Product Errata Sheet.
* @rmtoll IFCR CGIF4 LL_BDMA_ClearFlag_GI4
* @param BDMAx BDMA Instance
* @retval None
@@ -1893,6 +1923,10 @@ __STATIC_INLINE void LL_BDMA_ClearFlag_GI4(BDMA_TypeDef *BDMAx)
/**
* @brief Clear Channel 5 global interrupt flag.
+ * @note Do not Clear Channel 5 global interrupt flag when the channel in ON.
+ Instead clear specific flags transfer complete, half transfer & transfer
+ error flag with LL_DMA_ClearFlag_TC5, LL_DMA_ClearFlag_HT5,
+ LL_DMA_ClearFlag_TE5. bug id 2.3.1 in Product Errata Sheet.
* @rmtoll IFCR CGIF5 LL_BDMA_ClearFlag_GI5
* @param BDMAx BDMA Instance
* @retval None
@@ -1904,6 +1938,10 @@ __STATIC_INLINE void LL_BDMA_ClearFlag_GI5(BDMA_TypeDef *BDMAx)
/**
* @brief Clear Channel 6 global interrupt flag.
+ * @note Do not Clear Channel 6 global interrupt flag when the channel in ON.
+ Instead clear specific flags transfer complete, half transfer & transfer
+ error flag with LL_DMA_ClearFlag_TC6, LL_DMA_ClearFlag_HT6,
+ LL_DMA_ClearFlag_TE6. bug id 2.3.1 in Product Errata Sheet.
* @rmtoll IFCR CGIF6 LL_BDMA_ClearFlag_GI6
* @param BDMAx BDMA Instance
* @retval None
@@ -1915,6 +1953,10 @@ __STATIC_INLINE void LL_BDMA_ClearFlag_GI6(BDMA_TypeDef *BDMAx)
/**
* @brief Clear Channel 7 global interrupt flag.
+ * @note Do not Clear Channel 7 global interrupt flag when the channel in ON.
+ Instead clear specific flags transfer complete, half transfer & transfer
+ error flag with LL_DMA_ClearFlag_TC7, LL_DMA_ClearFlag_HT7,
+ LL_DMA_ClearFlag_TE7. bug id 2.3.1 in Product Errata Sheet.
* @rmtoll IFCR CGIF7 LL_BDMA_ClearFlag_GI7
* @param BDMAx BDMA Instance
* @retval None
@@ -2213,7 +2255,7 @@ __STATIC_INLINE void LL_BDMA_ClearFlag_TE7(BDMA_TypeDef *BDMAx)
*/
__STATIC_INLINE void LL_BDMA_EnableIT_TC(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
SET_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_TCIE);
}
@@ -2235,7 +2277,7 @@ __STATIC_INLINE void LL_BDMA_EnableIT_TC(BDMA_TypeDef *BDMAx, uint32_t Channel)
*/
__STATIC_INLINE void LL_BDMA_EnableIT_HT(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
SET_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_HTIE);
}
@@ -2257,7 +2299,7 @@ __STATIC_INLINE void LL_BDMA_EnableIT_HT(BDMA_TypeDef *BDMAx, uint32_t Channel)
*/
__STATIC_INLINE void LL_BDMA_EnableIT_TE(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
SET_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_TEIE);
}
@@ -2279,7 +2321,7 @@ __STATIC_INLINE void LL_BDMA_EnableIT_TE(BDMA_TypeDef *BDMAx, uint32_t Channel)
*/
__STATIC_INLINE void LL_BDMA_DisableIT_TC(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
CLEAR_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_TCIE);
}
@@ -2301,7 +2343,7 @@ __STATIC_INLINE void LL_BDMA_DisableIT_TC(BDMA_TypeDef *BDMAx, uint32_t Channel)
*/
__STATIC_INLINE void LL_BDMA_DisableIT_HT(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
CLEAR_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_HTIE);
}
@@ -2323,7 +2365,7 @@ __STATIC_INLINE void LL_BDMA_DisableIT_HT(BDMA_TypeDef *BDMAx, uint32_t Channel)
*/
__STATIC_INLINE void LL_BDMA_DisableIT_TE(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
CLEAR_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_TEIE);
}
@@ -2345,7 +2387,7 @@ __STATIC_INLINE void LL_BDMA_DisableIT_TE(BDMA_TypeDef *BDMAx, uint32_t Channel)
*/
__STATIC_INLINE uint32_t LL_BDMA_IsEnabledIT_TC(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return ((READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_TCIE) == (BDMA_CCR_TCIE)) ? 1UL : 0UL);
}
@@ -2367,7 +2409,7 @@ __STATIC_INLINE uint32_t LL_BDMA_IsEnabledIT_TC(BDMA_TypeDef *BDMAx, uint32_t Ch
*/
__STATIC_INLINE uint32_t LL_BDMA_IsEnabledIT_HT(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return ((READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_HTIE) == (BDMA_CCR_HTIE)) ? 1UL : 0UL);
}
@@ -2389,7 +2431,7 @@ __STATIC_INLINE uint32_t LL_BDMA_IsEnabledIT_HT(BDMA_TypeDef *BDMAx, uint32_t Ch
*/
__STATIC_INLINE uint32_t LL_BDMA_IsEnabledIT_TE(BDMA_TypeDef *BDMAx, uint32_t Channel)
{
- register uint32_t bdma_base_addr = (uint32_t)BDMAx;
+ uint32_t bdma_base_addr = (uint32_t)BDMAx;
return ((READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR_TEIE) == (BDMA_CCR_TEIE)) ? 1UL : 0UL);
}
@@ -2422,11 +2464,6 @@ void LL_BDMA_StructInit(LL_BDMA_InitTypeDef *BDMA_InitStruct);
*/
#endif /* BDMA || BDMA1 || BDMA2 */
-
-/**
- * @}
- */
-
/**
* @}
*/
@@ -2437,4 +2474,3 @@ void LL_BDMA_StructInit(LL_BDMA_InitTypeDef *BDMA_InitStruct);
#endif /* STM32H7xx_LL_BDMA_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/