diff options
Diffstat (limited to 'bsps/arm/stm32h7/include/stm32h7xx_hal_i2s.h')
| -rw-r--r-- | bsps/arm/stm32h7/include/stm32h7xx_hal_i2s.h | 119 |
1 files changed, 76 insertions, 43 deletions
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_i2s.h b/bsps/arm/stm32h7/include/stm32h7xx_hal_i2s.h index 9ff15f6c78..0ccc899c78 100644 --- a/bsps/arm/stm32h7/include/stm32h7xx_hal_i2s.h +++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_i2s.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2017 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2017 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -66,7 +65,7 @@ typedef struct This parameter can be a value of @ref I2S_Clock_Polarity */ uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. - This parameter can be a value of @ref I2S_MSB_LSB_transmission */ + This parameter can be a value of @ref I2S_MSB_LSB_Transmission */ uint32_t WSInversion; /*!< Control the Word Select Inversion. This parameter can be a value of @ref I2S_WSInversion */ @@ -75,7 +74,7 @@ typedef struct This parameter can be a value of @ref I2S_Data_24Bit_Alignment */ uint32_t MasterKeepIOState; /*!< Control of Alternate function GPIOs state - This parameter can be a value of @ref SPI_Master_Keep_IO_State */ + This parameter can be a value of @ref I2S_Master_Keep_IO_State */ } I2S_InitTypeDef; @@ -89,6 +88,7 @@ typedef enum HAL_I2S_STATE_BUSY = 0x02UL, /*!< I2S internal process is ongoing */ HAL_I2S_STATE_BUSY_TX = 0x03UL, /*!< Data Transmission process is ongoing */ HAL_I2S_STATE_BUSY_RX = 0x04UL, /*!< Data Reception process is ongoing */ + HAL_I2S_STATE_BUSY_TX_RX = 0x05UL, /*!< Data Transmission and Reception process is ongoing */ HAL_I2S_STATE_TIMEOUT = 0x06UL, /*!< I2S timeout state */ HAL_I2S_STATE_ERROR = 0x07UL /*!< I2S error state */ } HAL_I2S_StateTypeDef; @@ -99,46 +99,48 @@ typedef enum typedef struct __I2S_HandleTypeDef { SPI_TypeDef *Instance; /*!< I2S registers base address */ - + I2S_InitTypeDef Init; /*!< I2S communication parameters */ - - uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */ - + + const uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */ + __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */ - + __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */ - + uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */ - + __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */ - + __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter (This field is initialized at the same value as transfer size at the beginning of the transfer and decremented when a sample is received NbSamplesReceived = RxBufferSize-RxBufferCount) */ - + void (*RxISR)(struct __I2S_HandleTypeDef *hi2s); /*!< function pointer on Rx ISR */ void (*TxISR)(struct __I2S_HandleTypeDef *hi2s); /*!< function pointer on Tx ISR */ - + DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */ - + DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */ - + __IO HAL_LockTypeDef Lock; /*!< I2S locking object */ - + __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */ - + __IO uint32_t ErrorCode; /*!< I2S Error code This parameter can be a value of @ref I2S_Error */ #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Completed callback */ void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Completed callback */ + void (* TxRxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S TxRx Completed callback */ void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Half Completed callback */ void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Half Completed callback */ + void (* TxRxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S TxRx Half Completed callback */ void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Error callback */ void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp Init callback */ void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp DeInit callback */ @@ -155,8 +157,10 @@ typedef enum { HAL_I2S_TX_COMPLETE_CB_ID = 0x00UL, /*!< I2S Tx Completed callback ID */ HAL_I2S_RX_COMPLETE_CB_ID = 0x01UL, /*!< I2S Rx Completed callback ID */ + HAL_I2S_TX_RX_COMPLETE_CB_ID = 0x02UL, /*!< I2S TxRx Completed callback ID */ HAL_I2S_TX_HALF_COMPLETE_CB_ID = 0x03UL, /*!< I2S Tx Half Completed callback ID */ HAL_I2S_RX_HALF_COMPLETE_CB_ID = 0x04UL, /*!< I2S Rx Half Completed callback ID */ + HAL_I2S_TX_RX_HALF_COMPLETE_CB_ID = 0x05UL, /*!< I2S TxRx Half Completed callback ID */ HAL_I2S_ERROR_CB_ID = 0x06UL, /*!< I2S Error callback ID */ HAL_I2S_MSPINIT_CB_ID = 0x07UL, /*!< I2S Msp Init callback ID */ HAL_I2S_MSPDEINIT_CB_ID = 0x08UL /*!< I2S Msp DeInit callback ID */ @@ -181,7 +185,7 @@ typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to /** @defgroup I2S_Error I2S Error * @ingroup RTEMSBSPsARMSTM32H7 * @{ - */ + */ #define HAL_I2S_ERROR_NONE (0x00000000UL) /*!< No error */ #define HAL_I2S_ERROR_TIMEOUT (0x00000001UL) /*!< Timeout error */ #define HAL_I2S_ERROR_OVR (0x00000002UL) /*!< OVR error */ @@ -265,7 +269,7 @@ typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to * @} */ -/** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode +/** @defgroup I2S_Clock_Polarity I2S FullDuplex Mode * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ @@ -321,6 +325,7 @@ typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to */ #define I2S_IT_RXP SPI_IER_RXPIE #define I2S_IT_TXP SPI_IER_TXPIE +#define I2S_IT_DXP SPI_IER_DXPIE #define I2S_IT_UDR SPI_IER_UDRIE #define I2S_IT_OVR SPI_IER_OVRIE #define I2S_IT_FRE SPI_IER_TIFREIE @@ -333,13 +338,14 @@ typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ -#define I2S_FLAG_RXP SPI_SR_RXP /* I2S status flag : Rx-Packet available flag */ -#define I2S_FLAG_TXP SPI_SR_TXP /* I2S status flag : Tx-Packet space available flag */ -#define I2S_FLAG_UDR SPI_SR_UDR /* I2S Error flag : Underrun flag */ -#define I2S_FLAG_OVR SPI_SR_OVR /* I2S Error flag : Overrun flag */ -#define I2S_FLAG_FRE SPI_SR_TIFRE /* I2S Error flag : TI mode frame format error flag */ +#define I2S_FLAG_RXP SPI_SR_RXP /* I2S status flag : Rx-Packet available flag */ +#define I2S_FLAG_TXP SPI_SR_TXP /* I2S status flag : Tx-Packet space available flag */ +#define I2S_FLAG_DXP SPI_SR_DXP /* I2S status flag : Dx-Packet space available flag */ +#define I2S_FLAG_UDR SPI_SR_UDR /* I2S Error flag : Underrun flag */ +#define I2S_FLAG_OVR SPI_SR_OVR /* I2S Error flag : Overrun flag */ +#define I2S_FLAG_FRE SPI_SR_TIFRE /* I2S Error flag : TI mode frame format error flag */ -#define I2S_FLAG_MASK (SPI_SR_RXP | SPI_SR_TXP | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_TIFRE) +#define I2S_FLAG_MASK (SPI_SR_RXP | SPI_SR_TXP | SPI_SR_DXP |SPI_SR_UDR | SPI_SR_OVR | SPI_SR_TIFRE) /** * @} */ @@ -366,7 +372,7 @@ typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to } while(0) #else #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) -#endif +#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ /** @brief Enable the specified SPI peripheral (in I2S mode). * @param __HANDLE__ specifies the I2S Handle. @@ -417,13 +423,15 @@ typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to * This parameter can be one of the following values: * @arg I2S_IT_RXP : Rx-Packet available interrupt * @arg I2S_IT_TXP : Tx-Packet space available interrupt + * @arg I2S_IT_DXP : Tx-Packet space available interrupt * @arg I2S_IT_UDR : Underrun interrupt * @arg I2S_IT_OVR : Overrun interrupt * @arg I2S_IT_FRE : TI mode frame format error interrupt * @arg I2S_IT_ERR : Error interrupt enable * @retval The new state of __IT__ (TRUE or FALSE). */ -#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) +#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER\ + & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) /** @brief Check whether the specified I2S flag is set or not. * @param __HANDLE__ specifies the I2S Handle. @@ -456,11 +464,11 @@ typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to * @retval None */ #define __HAL_I2S_CLEAR_TIFREFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_TIFREC) - /** * @} */ + /* Exported functions --------------------------------------------------------*/ /** @addtogroup I2S_Exported_Functions * @{ @@ -477,7 +485,8 @@ void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); /* Callbacks Register/UnRegister functions ***********************************/ #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL) -HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID, pI2S_CallbackTypeDef pCallback); +HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID, + pI2S_CallbackTypeDef pCallback); HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID); #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ /** @@ -489,17 +498,24 @@ HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_Ca */ /* I/O operation functions ***************************************************/ /* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, const uint16_t *pData, uint16_t Size, uint32_t Timeout); HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, const uint16_t *pTxData, uint16_t *pRxData, + uint16_t Size, uint32_t Timeout); /* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, const uint16_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, const uint16_t *pTxData, uint16_t *pRxData, + uint16_t Size); + void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); /* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, const uint16_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, const uint16_t *pTxData, uint16_t *pRxData, + uint16_t Size); HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); @@ -510,6 +526,8 @@ void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); +void HAL_I2SEx_TxRxHalfCpltCallback(I2S_HandleTypeDef *hi2s); +void HAL_I2SEx_TxRxCpltCallback(I2S_HandleTypeDef *hi2s); void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); /** * @} @@ -519,8 +537,8 @@ void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); * @{ */ /* Peripheral Control and State functions ************************************/ -HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); -uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); +HAL_I2S_StateTypeDef HAL_I2S_GetState(const I2S_HandleTypeDef *hi2s); +uint32_t HAL_I2S_GetError(const I2S_HandleTypeDef *hi2s); /** * @} */ @@ -541,6 +559,16 @@ uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); * @} */ +/* Private Functions ---------------------------------------------------------*/ +/** @defgroup I2S_Private_Functions I2S Private Functions + * @ingroup RTEMSBSPsARMSTM32H7 + * @{ + */ +/* Private functions are defined in stm32h7xx_hal_i2S.c file */ +/** + * @} + */ + /* Private macros ------------------------------------------------------------*/ /** @defgroup I2S_Private_Macros I2S Private Macros * @ingroup RTEMSBSPsARMSTM32H7 @@ -558,7 +586,9 @@ uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); * @arg I2S_FLAG_FRE : TI mode frame format error flag * @retval SET or RESET. */ -#define I2S_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK)) ? SET : RESET) +#define I2S_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__)\ + & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK))\ + ? SET : RESET) /** @brief Check whether the specified SPI Interrupt is set or not. * @param __IER__ copy of I2S IER register. @@ -572,7 +602,8 @@ uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); * @arg I2S_IT_ERR : Error interrupt enable * @retval SET or RESET. */ -#define I2S_CHECK_IT_SOURCE(__IER__, __INTERRUPT__) ((((__IER__) & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) +#define I2S_CHECK_IT_SOURCE(__IER__, __INTERRUPT__) ((((__IER__)\ + & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) /** @brief Checks if I2S Mode parameter is in allowed range. * @param __MODE__ specifies the I2S Mode. @@ -594,6 +625,9 @@ uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); ((__MODE__) == I2S_MODE_SLAVE_RX) || \ ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX)) +#define IS_I2S_FULLDUPLEX(__MODE__) (((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX) || \ + ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX)) + #define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS) || \ ((__STANDARD__) == I2S_STANDARD_MSB) || \ ((__STANDARD__) == I2S_STANDARD_LSB) || \ @@ -610,7 +644,7 @@ uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); #define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K) && \ ((__FREQ__) <= I2S_AUDIOFREQ_192K)) || \ - ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT)) + ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT)) #define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_CPOL_LOW) || \ ((__CPOL__) == I2S_CPOL_HIGH)) @@ -646,4 +680,3 @@ uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); #endif /* STM32H7xx_HAL_I2S_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |