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Diffstat (limited to 'bsps/arm/stm32h7/hal/stm32h7xx_hal_sdram.c')
-rw-r--r--bsps/arm/stm32h7/hal/stm32h7xx_hal_sdram.c327
1 files changed, 168 insertions, 159 deletions
diff --git a/bsps/arm/stm32h7/hal/stm32h7xx_hal_sdram.c b/bsps/arm/stm32h7/hal/stm32h7xx_hal_sdram.c
index 11b0b12abb..51aa14e436 100644
--- a/bsps/arm/stm32h7/hal/stm32h7xx_hal_sdram.c
+++ b/bsps/arm/stm32h7/hal/stm32h7xx_hal_sdram.c
@@ -6,6 +6,17 @@
* This file provides a generic firmware to drive SDRAM memories mounted
* as external device.
*
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -63,25 +74,25 @@
The compilation define USE_HAL_SDRAM_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
- Use Functions @ref HAL_SDRAM_RegisterCallback() to register a user callback,
+ Use Functions HAL_SDRAM_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) MspInitCallback : SDRAM MspInit.
(+) MspDeInitCallback : SDRAM MspDeInit.
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
- Use function @ref HAL_SDRAM_UnRegisterCallback() to reset a callback to the default
+ Use function HAL_SDRAM_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function. It allows to reset following callbacks:
(+) MspInitCallback : SDRAM MspInit.
(+) MspDeInitCallback : SDRAM MspDeInit.
This function) takes as parameters the HAL peripheral handle and the Callback ID.
- By default, after the @ref HAL_SDRAM_Init and if the state is HAL_SDRAM_STATE_RESET
+ By default, after the HAL_SDRAM_Init and if the state is HAL_SDRAM_STATE_RESET
all callbacks are reset to the corresponding legacy weak (surcharged) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
- reset to the legacy weak (surcharged) functions in the @ref HAL_SDRAM_Init
- and @ref HAL_SDRAM_DeInit only when these callbacks are null (not registered beforehand).
- If not, MspInit or MspDeInit are not null, the @ref HAL_SDRAM_Init and @ref HAL_SDRAM_DeInit
+ reset to the legacy weak (surcharged) functions in the HAL_SDRAM_Init
+ and HAL_SDRAM_DeInit only when these callbacks are null (not registered beforehand).
+ If not, MspInit or MspDeInit are not null, the HAL_SDRAM_Init and HAL_SDRAM_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
@@ -89,8 +100,8 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_SDRAM_RegisterCallback before calling @ref HAL_SDRAM_DeInit
- or @ref HAL_SDRAM_Init function.
+ using HAL_SDRAM_RegisterCallback before calling HAL_SDRAM_DeInit
+ or HAL_SDRAM_Init function.
When The compilation define USE_HAL_SDRAM_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
@@ -98,17 +109,6 @@
@endverbatim
******************************************************************************
- * @attention
- *
- * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -127,19 +127,19 @@
* @{
*/
-/**
- @cond 0
- */
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
-static void SDRAM_DMACplt (MDMA_HandleTypeDef *hmdma);
+/** @addtogroup SDRAM_Private_Functions SDRAM Private Functions
+ * @{
+ */
+static void SDRAM_DMACplt(MDMA_HandleTypeDef *hmdma);
static void SDRAM_DMACpltProt(MDMA_HandleTypeDef *hmdma);
-static void SDRAM_DMAError (MDMA_HandleTypeDef *hmdma);
+static void SDRAM_DMAError(MDMA_HandleTypeDef *hmdma);
/**
- @endcond
+ * @}
*/
/* Exported functions --------------------------------------------------------*/
@@ -184,7 +184,7 @@ HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTy
/* Allocate lock resource and initialize it */
hsdram->Lock = HAL_UNLOCKED;
#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
- if(hsdram->MspInitCallback == NULL)
+ if (hsdram->MspInitCallback == NULL)
{
hsdram->MspInitCallback = HAL_SDRAM_MspInit;
}
@@ -197,7 +197,7 @@ HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTy
#else
/* Initialize the low level hardware (MSP) */
HAL_SDRAM_MspInit(hsdram);
-#endif
+#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
}
/* Initialize the SDRAM controller state */
@@ -226,7 +226,7 @@ HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTy
HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram)
{
#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
- if(hsdram->MspDeInitCallback == NULL)
+ if (hsdram->MspDeInitCallback == NULL)
{
hsdram->MspDeInitCallback = HAL_SDRAM_MspDeInit;
}
@@ -236,7 +236,7 @@ HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram)
#else
/* Initialize the low level hardware (MSP) */
HAL_SDRAM_MspDeInit(hsdram);
-#endif
+#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
/* Configure the SDRAM registers with their reset values */
(void)FMC_SDRAM_DeInit(hsdram->Instance, hsdram->Init.SDBank);
@@ -287,7 +287,7 @@ __weak void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram)
* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
* the configuration information for SDRAM module.
* @retval HAL status
-*/
+ */
void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram)
{
/* Check SDRAM interrupt Rising edge flag */
@@ -298,7 +298,7 @@ void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram)
hsdram->RefreshErrorCallback(hsdram);
#else
HAL_SDRAM_RefreshErrorCallback(hsdram);
-#endif
+#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
/* Clear SDRAM refresh error interrupt pending bit */
__FMC_SDRAM_CLEAR_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_ERROR);
@@ -380,11 +380,12 @@ __weak void HAL_SDRAM_DMA_XferErrorCallback(MDMA_HandleTypeDef *hmdma)
* @param BufferSize Size of the buffer to read from memory
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
+HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer,
+ uint32_t BufferSize)
{
uint32_t size;
__IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
- uint8_t * pdestbuff = pDstBuffer;
+ uint8_t *pdestbuff = pDstBuffer;
HAL_SDRAM_StateTypeDef state = hsdram->State;
/* Check the SDRAM controller state */
@@ -431,12 +432,13 @@ HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddr
* @param BufferSize Size of the buffer to write to memory
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
+HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer,
+ uint32_t BufferSize)
{
uint32_t size;
__IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
- uint8_t * psrcbuff = pSrcBuffer;
-
+ uint8_t *psrcbuff = pSrcBuffer;
+
/* Check the SDRAM controller state */
if (hsdram->State == HAL_SDRAM_STATE_BUSY)
{
@@ -460,7 +462,7 @@ HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAdd
/* Update the SDRAM controller state */
hsdram->State = HAL_SDRAM_STATE_READY;
-
+
/* Process Unlocked */
__HAL_UNLOCK(hsdram);
}
@@ -481,7 +483,8 @@ HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAdd
* @param BufferSize Size of the buffer to read from memory
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
+HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer,
+ uint32_t BufferSize)
{
uint32_t size;
__IO uint32_t *pSdramAddress = pAddress;
@@ -502,7 +505,7 @@ HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAdd
hsdram->State = HAL_SDRAM_STATE_BUSY;
/* Read data from memory */
- for (size = BufferSize; size >= 2U ; size-=2U)
+ for (size = BufferSize; size >= 2U ; size -= 2U)
{
*pdestbuff = (uint16_t)((*pSdramAddress) & 0x0000FFFFU);
pdestbuff++;
@@ -512,7 +515,7 @@ HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAdd
}
/* Read last 16-bits if size is not 32-bits multiple */
- if ((BufferSize % 2U)!= 0U)
+ if ((BufferSize % 2U) != 0U)
{
*pdestbuff = (uint16_t)((*pSdramAddress) & 0x0000FFFFU);
}
@@ -540,12 +543,13 @@ HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAdd
* @param BufferSize Size of the buffer to write to memory
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
+HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer,
+ uint32_t BufferSize)
{
uint32_t size;
__IO uint32_t *psdramaddress = pAddress;
- uint16_t * psrcbuff = pSrcBuffer;
-
+ uint16_t *psrcbuff = pSrcBuffer;
+
/* Check the SDRAM controller state */
if (hsdram->State == HAL_SDRAM_STATE_BUSY)
{
@@ -558,9 +562,9 @@ HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAd
/* Update the SDRAM controller state */
hsdram->State = HAL_SDRAM_STATE_BUSY;
-
+
/* Write data to memory */
- for (size = BufferSize; size >= 2U ; size-=2U)
+ for (size = BufferSize; size >= 2U ; size -= 2U)
{
*psdramaddress = (uint32_t)(*psrcbuff);
psrcbuff++;
@@ -570,14 +574,14 @@ HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAd
}
/* Write last 16-bits if size is not 32-bits multiple */
- if ((BufferSize % 2U)!= 0U)
+ if ((BufferSize % 2U) != 0U)
{
*psdramaddress = ((uint32_t)(*psrcbuff) & 0x0000FFFFU) | ((*psdramaddress) & 0xFFFF0000U);
}
/* Update the SDRAM controller state */
hsdram->State = HAL_SDRAM_STATE_READY;
-
+
/* Process Unlocked */
__HAL_UNLOCK(hsdram);
}
@@ -598,11 +602,12 @@ HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAd
* @param BufferSize Size of the buffer to read from memory
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
+HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer,
+ uint32_t BufferSize)
{
uint32_t size;
__IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
- uint32_t * pdestbuff = pDstBuffer;
+ uint32_t *pdestbuff = pDstBuffer;
HAL_SDRAM_StateTypeDef state = hsdram->State;
/* Check the SDRAM controller state */
@@ -649,11 +654,12 @@ HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAdd
* @param BufferSize Size of the buffer to write to memory
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
+HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer,
+ uint32_t BufferSize)
{
uint32_t size;
__IO uint32_t *pSdramAddress = pAddress;
- uint32_t * psrcbuff = pSrcBuffer;
+ uint32_t *psrcbuff = pSrcBuffer;
/* Check the SDRAM controller state */
if (hsdram->State == HAL_SDRAM_STATE_BUSY)
@@ -678,7 +684,7 @@ HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAd
/* Update the SDRAM controller state */
hsdram->State = HAL_SDRAM_STATE_READY;
-
+
/* Process Unlocked */
__HAL_UNLOCK(hsdram);
}
@@ -699,7 +705,8 @@ HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAd
* @param BufferSize Size of the buffer to read from memory
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
+HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer,
+ uint32_t BufferSize)
{
HAL_StatusTypeDef status;
HAL_SDRAM_StateTypeDef state = hsdram->State;
@@ -707,7 +714,7 @@ HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAdd
/* Check the SDRAM controller state */
if (state == HAL_SDRAM_STATE_BUSY)
{
- return HAL_BUSY;
+ status = HAL_BUSY;
}
else if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
{
@@ -728,15 +735,15 @@ HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAdd
}
hsdram->hmdma->XferErrorCallback = SDRAM_DMAError;
- /* Enable the DMA Stream */
- status = HAL_MDMA_Start_IT(hsdram->hmdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)(BufferSize * 4U), 1);
+ /* Enable the DMA Stream */
+ status = HAL_MDMA_Start_IT(hsdram->hmdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)(BufferSize * 4U), 1);
/* Process Unlocked */
__HAL_UNLOCK(hsdram);
}
else
{
- return HAL_ERROR;
+ status = HAL_ERROR;
}
return status;
@@ -751,14 +758,15 @@ HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAdd
* @param BufferSize Size of the buffer to write to memory
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
+HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer,
+ uint32_t BufferSize)
{
HAL_StatusTypeDef status;
/* Check the SDRAM controller state */
if (hsdram->State == HAL_SDRAM_STATE_BUSY)
{
- return HAL_BUSY;
+ status = HAL_BUSY;
}
else if (hsdram->State == HAL_SDRAM_STATE_READY)
{
@@ -772,15 +780,15 @@ HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAd
hsdram->hmdma->XferCpltCallback = SDRAM_DMACplt;
hsdram->hmdma->XferErrorCallback = SDRAM_DMAError;
- /* Enable the DMA Stream */
- status = HAL_MDMA_Start_IT(hsdram->hmdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)(BufferSize * 4U), 1);
+ /* Enable the DMA Stream */
+ status = HAL_MDMA_Start_IT(hsdram->hmdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)(BufferSize * 4U), 1);
/* Process Unlocked */
__HAL_UNLOCK(hsdram);
}
else
{
- return HAL_ERROR;
+ status = HAL_ERROR;
}
return status;
@@ -799,53 +807,54 @@ HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAd
* @param pCallback : pointer to the Callback function
* @retval status
*/
-HAL_StatusTypeDef HAL_SDRAM_RegisterCallback (SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId, pSDRAM_CallbackTypeDef pCallback)
+HAL_StatusTypeDef HAL_SDRAM_RegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId,
+ pSDRAM_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
HAL_SDRAM_StateTypeDef state;
-
- if(pCallback == NULL)
+
+ if (pCallback == NULL)
{
return HAL_ERROR;
}
/* Process locked */
__HAL_LOCK(hsdram);
-
+
state = hsdram->State;
- if((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
+ if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
{
switch (CallbackId)
{
- case HAL_SDRAM_MSP_INIT_CB_ID :
- hsdram->MspInitCallback = pCallback;
- break;
- case HAL_SDRAM_MSP_DEINIT_CB_ID :
- hsdram->MspDeInitCallback = pCallback;
- break;
- case HAL_SDRAM_REFRESH_ERR_CB_ID :
- hsdram->RefreshErrorCallback = pCallback;
- break;
- default :
- /* update return status */
- status = HAL_ERROR;
- break;
+ case HAL_SDRAM_MSP_INIT_CB_ID :
+ hsdram->MspInitCallback = pCallback;
+ break;
+ case HAL_SDRAM_MSP_DEINIT_CB_ID :
+ hsdram->MspDeInitCallback = pCallback;
+ break;
+ case HAL_SDRAM_REFRESH_ERR_CB_ID :
+ hsdram->RefreshErrorCallback = pCallback;
+ break;
+ default :
+ /* update return status */
+ status = HAL_ERROR;
+ break;
}
}
- else if(hsdram->State == HAL_SDRAM_STATE_RESET)
+ else if (hsdram->State == HAL_SDRAM_STATE_RESET)
{
switch (CallbackId)
{
- case HAL_SDRAM_MSP_INIT_CB_ID :
- hsdram->MspInitCallback = pCallback;
- break;
- case HAL_SDRAM_MSP_DEINIT_CB_ID :
- hsdram->MspDeInitCallback = pCallback;
- break;
- default :
- /* update return status */
- status = HAL_ERROR;
- break;
+ case HAL_SDRAM_MSP_INIT_CB_ID :
+ hsdram->MspInitCallback = pCallback;
+ break;
+ case HAL_SDRAM_MSP_DEINIT_CB_ID :
+ hsdram->MspDeInitCallback = pCallback;
+ break;
+ default :
+ /* update return status */
+ status = HAL_ERROR;
+ break;
}
}
else
@@ -872,54 +881,54 @@ HAL_StatusTypeDef HAL_SDRAM_RegisterCallback (SDRAM_HandleTypeDef *hsdram, HAL_S
* @arg @ref HAL_SDRAM_DMA_XFER_ERR_CB_ID SDRAM DMA Xfer Error callback ID
* @retval status
*/
-HAL_StatusTypeDef HAL_SDRAM_UnRegisterCallback (SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId)
+HAL_StatusTypeDef HAL_SDRAM_UnRegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId)
{
HAL_StatusTypeDef status = HAL_OK;
HAL_SDRAM_StateTypeDef state;
-
+
/* Process locked */
__HAL_LOCK(hsdram);
state = hsdram->State;
- if((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
+ if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
{
switch (CallbackId)
{
- case HAL_SDRAM_MSP_INIT_CB_ID :
- hsdram->MspInitCallback = HAL_SDRAM_MspInit;
- break;
- case HAL_SDRAM_MSP_DEINIT_CB_ID :
- hsdram->MspDeInitCallback = HAL_SDRAM_MspDeInit;
- break;
- case HAL_SDRAM_REFRESH_ERR_CB_ID :
- hsdram->RefreshErrorCallback = HAL_SDRAM_RefreshErrorCallback;
- break;
- case HAL_SDRAM_DMA_XFER_CPLT_CB_ID :
- hsdram->DmaXferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
- break;
- case HAL_SDRAM_DMA_XFER_ERR_CB_ID :
- hsdram->DmaXferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
- break;
- default :
- /* update return status */
- status = HAL_ERROR;
- break;
+ case HAL_SDRAM_MSP_INIT_CB_ID :
+ hsdram->MspInitCallback = HAL_SDRAM_MspInit;
+ break;
+ case HAL_SDRAM_MSP_DEINIT_CB_ID :
+ hsdram->MspDeInitCallback = HAL_SDRAM_MspDeInit;
+ break;
+ case HAL_SDRAM_REFRESH_ERR_CB_ID :
+ hsdram->RefreshErrorCallback = HAL_SDRAM_RefreshErrorCallback;
+ break;
+ case HAL_SDRAM_DMA_XFER_CPLT_CB_ID :
+ hsdram->DmaXferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
+ break;
+ case HAL_SDRAM_DMA_XFER_ERR_CB_ID :
+ hsdram->DmaXferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
+ break;
+ default :
+ /* update return status */
+ status = HAL_ERROR;
+ break;
}
}
- else if(hsdram->State == HAL_SDRAM_STATE_RESET)
+ else if (hsdram->State == HAL_SDRAM_STATE_RESET)
{
switch (CallbackId)
{
- case HAL_SDRAM_MSP_INIT_CB_ID :
- hsdram->MspInitCallback = HAL_SDRAM_MspInit;
- break;
- case HAL_SDRAM_MSP_DEINIT_CB_ID :
- hsdram->MspDeInitCallback = HAL_SDRAM_MspDeInit;
- break;
- default :
- /* update return status */
- status = HAL_ERROR;
- break;
+ case HAL_SDRAM_MSP_INIT_CB_ID :
+ hsdram->MspInitCallback = HAL_SDRAM_MspInit;
+ break;
+ case HAL_SDRAM_MSP_DEINIT_CB_ID :
+ hsdram->MspDeInitCallback = HAL_SDRAM_MspDeInit;
+ break;
+ default :
+ /* update return status */
+ status = HAL_ERROR;
+ break;
}
}
else
@@ -944,12 +953,13 @@ HAL_StatusTypeDef HAL_SDRAM_UnRegisterCallback (SDRAM_HandleTypeDef *hsdram, HAL
* @param pCallback : pointer to the Callback function
* @retval status
*/
-HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId, pSDRAM_DmaCallbackTypeDef pCallback)
+HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId,
+ pSDRAM_DmaCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
HAL_SDRAM_StateTypeDef state;
-
- if(pCallback == NULL)
+
+ if (pCallback == NULL)
{
return HAL_ERROR;
}
@@ -958,20 +968,20 @@ HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL
__HAL_LOCK(hsdram);
state = hsdram->State;
- if((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
+ if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
{
switch (CallbackId)
{
- case HAL_SDRAM_DMA_XFER_CPLT_CB_ID :
- hsdram->DmaXferCpltCallback = pCallback;
- break;
- case HAL_SDRAM_DMA_XFER_ERR_CB_ID :
- hsdram->DmaXferErrorCallback = pCallback;
- break;
- default :
- /* update return status */
- status = HAL_ERROR;
- break;
+ case HAL_SDRAM_DMA_XFER_CPLT_CB_ID :
+ hsdram->DmaXferCpltCallback = pCallback;
+ break;
+ case HAL_SDRAM_DMA_XFER_ERR_CB_ID :
+ hsdram->DmaXferErrorCallback = pCallback;
+ break;
+ default :
+ /* update return status */
+ status = HAL_ERROR;
+ break;
}
}
else
@@ -984,7 +994,7 @@ HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL
__HAL_UNLOCK(hsdram);
return status;
}
-#endif
+#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
/**
* @}
@@ -992,8 +1002,8 @@ HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL
/** @defgroup SDRAM_Exported_Functions_Group3 Control functions
* @ingroup RTEMSBSPsARMSTM32H7
- * @brief management functions
- *
+ * @brief management functions
+ *
@verbatim
==============================================================================
##### SDRAM Control functions #####
@@ -1047,7 +1057,7 @@ HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram)
HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram)
{
HAL_SDRAM_StateTypeDef state = hsdram->State;
-
+
/* Check the SDRAM controller state */
if (state == HAL_SDRAM_STATE_BUSY)
{
@@ -1080,16 +1090,17 @@ HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram)
* @param Timeout Timeout duration
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout)
+HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command,
+ uint32_t Timeout)
{
HAL_SDRAM_StateTypeDef state = hsdram->State;
-
+
/* Check the SDRAM controller state */
if (state == HAL_SDRAM_STATE_BUSY)
{
return HAL_BUSY;
}
- else if((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_PRECHARGED))
+ else if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_PRECHARGED))
{
/* Update the SDRAM state */
hsdram->State = HAL_SDRAM_STATE_BUSY;
@@ -1199,8 +1210,8 @@ uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram)
/** @defgroup SDRAM_Exported_Functions_Group4 State functions
* @ingroup RTEMSBSPsARMSTM32H7
- * @brief Peripheral State functions
- *
+ * @brief Peripheral State functions
+ *
@verbatim
==============================================================================
##### SDRAM State functions #####
@@ -1232,8 +1243,8 @@ HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram)
* @}
*/
-/**
- @cond 0
+/** @addtogroup SDRAM_Private_Functions SDRAM Private Functions
+ * @{
*/
/**
* @brief MDMA SDRAM process complete callback.
@@ -1242,7 +1253,7 @@ HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram)
*/
static void SDRAM_DMACplt(MDMA_HandleTypeDef *hmdma)
{
- SDRAM_HandleTypeDef* hsdram = ( SDRAM_HandleTypeDef* )(hmdma->Parent);
+ SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hmdma->Parent);
/* Disable the MDMA channel */
__HAL_MDMA_DISABLE(hmdma);
@@ -1254,7 +1265,7 @@ static void SDRAM_DMACplt(MDMA_HandleTypeDef *hmdma)
hsdram->DmaXferCpltCallback(hmdma);
#else
HAL_SDRAM_DMA_XferCpltCallback(hmdma);
-#endif
+#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
}
/**
@@ -1264,7 +1275,7 @@ static void SDRAM_DMACplt(MDMA_HandleTypeDef *hmdma)
*/
static void SDRAM_DMACpltProt(MDMA_HandleTypeDef *hmdma)
{
- SDRAM_HandleTypeDef* hsdram = ( SDRAM_HandleTypeDef* )(hmdma->Parent);
+ SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hmdma->Parent);
/* Disable the MDMA channel */
__HAL_MDMA_DISABLE(hmdma);
@@ -1276,7 +1287,7 @@ static void SDRAM_DMACpltProt(MDMA_HandleTypeDef *hmdma)
hsdram->DmaXferCpltCallback(hmdma);
#else
HAL_SDRAM_DMA_XferCpltCallback(hmdma);
-#endif
+#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
}
/**
@@ -1286,7 +1297,7 @@ static void SDRAM_DMACpltProt(MDMA_HandleTypeDef *hmdma)
*/
static void SDRAM_DMAError(MDMA_HandleTypeDef *hmdma)
{
- SDRAM_HandleTypeDef* hsdram = ( SDRAM_HandleTypeDef* )(hmdma->Parent);
+ SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hmdma->Parent);
/* Disable the MDMA channel */
__HAL_MDMA_DISABLE(hmdma);
@@ -1298,12 +1309,12 @@ static void SDRAM_DMAError(MDMA_HandleTypeDef *hmdma)
hsdram->DmaXferErrorCallback(hmdma);
#else
HAL_SDRAM_DMA_XferErrorCallback(hmdma);
-#endif
+#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
}
+
/**
- @endcond
+ * @}
*/
-
/**
* @}
*/
@@ -1314,5 +1325,3 @@ static void SDRAM_DMAError(MDMA_HandleTypeDef *hmdma)
* @}
*/
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-09 06:08:43 +0000