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-rw-r--r--bsps/arm/stm32h7/hal/stm32h7xx_hal_pwr_ex.c106
1 files changed, 74 insertions, 32 deletions
diff --git a/bsps/arm/stm32h7/hal/stm32h7xx_hal_pwr_ex.c b/bsps/arm/stm32h7/hal/stm32h7xx_hal_pwr_ex.c
index 3186d841ad..d329d0a85b 100644
--- a/bsps/arm/stm32h7/hal/stm32h7xx_hal_pwr_ex.c
+++ b/bsps/arm/stm32h7/hal/stm32h7xx_hal_pwr_ex.c
@@ -6,6 +6,17 @@
* This file provides firmware functions to manage the following
* functionalities of PWR extension peripheral:
* + Peripheral Extended features functions
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -102,7 +113,7 @@
(#) Call HAL_PWREx_EnableUSBReg(), HAL_PWREx_DisableUSBReg(),
HAL_PWREx_EnableUSBVoltageDetector() and
HAL_PWREx_DisableUSBVoltageDetector() functions to manage USB power
- regulation functionnalities.
+ regulation functionalities.
(#) Call HAL_PWREx_EnableBatteryCharging() and
HAL_PWREx_DisableBatteryCharging() functions to enable and disable the
@@ -120,7 +131,7 @@
(#) Call HAL_PWREx_GetMMCVoltage() and HAL_PWREx_DisableMonitoring()
function to get VDDMMC voltage level. This API is used only for
- STM32H7AxxQ, STM32H7BxxQ, STM32H7Axxx and STM32H7Bxxx lines
+ STM32H7Axxx and STM32H7Bxxx lines
(#) Call HAL_PWREx_ConfigAVD() after setting parameter to be configured
(event mode and voltage threshold) in order to set up the Analog Voltage
@@ -136,18 +147,6 @@
AVD interrupt request.
@endverbatim
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -199,9 +198,14 @@
* @{
*/
/* Wake-Up Pins EXTI register mask */
+#if defined (EXTI_IMR2_IM57)
#define PWR_EXTI_WAKEUP_PINS_MASK (EXTI_IMR2_IM55 | EXTI_IMR2_IM56 |\
EXTI_IMR2_IM57 | EXTI_IMR2_IM58 |\
EXTI_IMR2_IM59 | EXTI_IMR2_IM60)
+#else
+#define PWR_EXTI_WAKEUP_PINS_MASK (EXTI_IMR2_IM55 | EXTI_IMR2_IM56 |\
+ EXTI_IMR2_IM58 | EXTI_IMR2_IM60)
+#endif /* defined (EXTI_IMR2_IM57) */
/* Wake-Up Pins PWR Pin Pull shift offsets */
#define PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET (2U)
@@ -391,11 +395,6 @@ uint32_t HAL_PWREx_GetSupplyConfig (void)
/**
* @brief Configure the main internal regulator output voltage.
- * @note For STM32H7x3, STM32H7x5, STM32H7x7, STM32H742 and STM32H750 lines,
- * configuring Voltage Scale 0 is only possible when Vcore is supplied
- * from LDO (Low DropOut). The SYSCFG Clock must be enabled through
- * __HAL_RCC_SYSCFG_CLK_ENABLE() macro before configuring Voltage
- * Scale 0.
* @param VoltageScaling : Specifies the regulator output voltage to achieve
* a tradeoff between performance and power
* consumption.
@@ -408,6 +407,13 @@ uint32_t HAL_PWREx_GetSupplyConfig (void)
* range 2 mode.
* @arg PWR_REGULATOR_VOLTAGE_SCALE3 : Regulator voltage output
* range 3 mode.
+ * @note For STM32H74x and STM32H75x lines, configuring Voltage Scale 0 is
+ * only possible when Vcore is supplied from LDO (Low DropOut). The
+ * SYSCFG Clock must be enabled through __HAL_RCC_SYSCFG_CLK_ENABLE()
+ * macro before configuring Voltage Scale 0.
+ * To enter low power mode , and if current regulator voltage is
+ * Voltage Scale 0 then first switch to Voltage Scale 1 before entering
+ * low power mode.
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling (uint32_t VoltageScaling)
@@ -428,6 +434,7 @@ HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling (uint32_t VoltageScaling)
/* Set the voltage range */
MODIFY_REG (PWR->SRDCR, PWR_SRDCR_VOS, VoltageScaling);
#else
+#if defined(SYSCFG_PWRCR_ODEN) /* STM32H74xxx and STM32H75xxx lines */
if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE0)
{
if ((PWR->CR3 & PWR_CR3_LDOEN) == PWR_CR3_LDOEN)
@@ -482,6 +489,10 @@ HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling (uint32_t VoltageScaling)
/* Set the voltage range */
MODIFY_REG (PWR->D3CR, PWR_D3CR_VOS, VoltageScaling);
}
+#else /* STM32H72xxx and STM32H73xxx lines */
+ /* Set the voltage range */
+ MODIFY_REG(PWR->D3CR, PWR_D3CR_VOS, VoltageScaling);
+#endif /* defined (SYSCFG_PWRCR_ODEN) */
#endif /* defined (PWR_SRDCR_VOS) */
/* Get tick */
@@ -626,9 +637,9 @@ uint32_t HAL_PWREx_GetStopModeVoltageRange (void)
(+++) PWR_STOPENTRY_WFI : enter STOP mode with WFI instruction
(+++) PWR_STOPENTRY_WFE : enter STOP mode with WFE instruction
(++) Domain:
- (+++) PWR_D1_DOMAIN : Enters D1 domain to DSTOP mode.
+ (+++) PWR_D1_DOMAIN : Enters D1/CD domain to DSTOP mode.
(+++) PWR_D2_DOMAIN : Enters D2 domain to DSTOP mode.
- (+++) PWR_D3_DOMAIN : Enters D3 domain to DSTOP mode.
+ (+++) PWR_D3_DOMAIN : Enters D3/SRD domain to DSTOP mode.
(+) Exit:
Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
@@ -649,9 +660,9 @@ uint32_t HAL_PWREx_GetStopModeVoltageRange (void)
The DSTANDBY mode is entered using the HAL_PWREx_EnterSTANDBYMode
(Domain) function with:
(++) Domain:
- (+++) PWR_D1_DOMAIN : Enters D1 domain to DSTANDBY mode.
+ (+++) PWR_D1_DOMAIN : Enters D1/CD domain to DSTANDBY mode.
(+++) PWR_D2_DOMAIN : Enters D2 domain to DSTANDBY mode.
- (+++) PWR_D3_DOMAIN : Enters D3 domain to DSTANDBY mode.
+ (+++) PWR_D3_DOMAIN : Enters D3/SRD domain to DSTANDBY mode.
(+) Exit:
WKUP pin rising or falling edge, RTC alarm (Alarm A and Alarm B), RTC
@@ -862,9 +873,6 @@ void HAL_PWREx_EnterSTOPMode (uint32_t Regulator, uint8_t STOPEntry, uint32_t Do
#if defined (PWR_CPUCR_PDDS_D2)
else if (Domain == PWR_D2_DOMAIN)
{
- /* Keep DSTOP mode when D2 domain enters Deepsleep */
- CLEAR_BIT (PWR->CPUCR, PWR_CPUCR_PDDS_D2);
-
#if defined (DUAL_CORE)
/* Check current core */
if (HAL_GetCurrentCPUID () != CM4_CPUID)
@@ -876,6 +884,9 @@ void HAL_PWREx_EnterSTOPMode (uint32_t Regulator, uint8_t STOPEntry, uint32_t Do
return;
}
+ /* Keep DSTOP mode when D2 domain enters Deepsleep */
+ CLEAR_BIT (PWR->CPU2CR, PWR_CPU2CR_PDDS_D2);
+
/* Set SLEEPDEEP bit of Cortex System Control Register */
SET_BIT (SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
@@ -897,13 +908,30 @@ void HAL_PWREx_EnterSTOPMode (uint32_t Regulator, uint8_t STOPEntry, uint32_t Do
/* Clear SLEEPDEEP bit of Cortex-Mx in the System Control Register */
CLEAR_BIT (SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
-#endif /* defined (DUAL_CORE) */
+#else
+ /* Keep DSTOP mode when D2 domain enters Deepsleep */
+ CLEAR_BIT (PWR->CPUCR, PWR_CPUCR_PDDS_D2);
+#endif /* defined (DUAL_CORE) */
}
#endif /* defined (PWR_CPUCR_PDDS_D2) */
else
{
+#if defined (DUAL_CORE)
+ /* Check current core */
+ if (HAL_GetCurrentCPUID () == CM7_CPUID)
+ {
+ /* Keep DSTOP mode when D3 domain enters Deepsleep */
+ CLEAR_BIT (PWR->CPUCR, PWR_CPUCR_PDDS_D3);
+ }
+ else
+ {
+ /* Keep DSTOP mode when D3 domain enters Deepsleep */
+ CLEAR_BIT (PWR->CPU2CR, PWR_CPU2CR_PDDS_D3);
+ }
+#else
/* Keep DSTOP mode when D3/SRD domain enters Deepsleep */
CLEAR_BIT (PWR->CPUCR, PWR_CPUCR_PDDS_D3);
+#endif /* defined (DUAL_CORE) */
}
}
@@ -912,6 +940,7 @@ void HAL_PWREx_EnterSTOPMode (uint32_t Regulator, uint8_t STOPEntry, uint32_t Do
* @note This API clears the pending event in order to enter a given CPU
* to CSLEEP or CSTOP. It should be called just before APIs performing
* enter low power mode using Wait For Event request.
+ * @note Cortex-M7 must be in CRUN mode when calling this API by Cortex-M4.
* @retval None.
*/
void HAL_PWREx_ClearPendingEvent (void)
@@ -1036,11 +1065,11 @@ void HAL_PWREx_EnterSTANDBYMode (uint32_t Domain)
else
{
/* Allow DSTANDBY mode when D3/SRD domain enters Deepsleep */
- SET_BIT (PWR-> CPUCR, PWR_CPUCR_PDDS_D3);
+ SET_BIT (PWR->CPUCR, PWR_CPUCR_PDDS_D3);
#if defined (DUAL_CORE)
/* Allow DSTANDBY mode when D3/SRD domain enters Deepsleep */
- SET_BIT (PWR-> CPU2CR, PWR_CPU2CR_PDDS_D3);
+ SET_BIT (PWR->CPU2CR, PWR_CPU2CR_PDDS_D3);
#endif /* defined (DUAL_CORE) */
}
}
@@ -1315,6 +1344,8 @@ void HAL_PWREx_EnableWakeUpPin (PWREx_WakeupPinTypeDef *sPinParams)
* @arg PWR_WAKEUP_PIN4 : Disable PC13 wake-up PIN.
* @arg PWR_WAKEUP_PIN5 : Disable PI11 wake-up PIN.
* @arg PWR_WAKEUP_PIN6 : Disable PC1 wake-up PIN.
+ * @note The PWR_WAKEUP_PIN3 and PWR_WAKEUP_PIN5 are available only for
+ * devices that support GPIOI port.
* @retval None
*/
void HAL_PWREx_DisableWakeUpPin (uint32_t WakeUpPin)
@@ -1338,6 +1369,8 @@ void HAL_PWREx_DisableWakeUpPin (uint32_t WakeUpPin)
* @arg PWR_WAKEUP_FLAG6 : Get wakeup event received from PC1.
* @arg PWR_WAKEUP_FLAG_ALL : Get Wakeup event received from all
* wake up pins.
+ * @note The PWR_WAKEUP_FLAG3 and PWR_WAKEUP_FLAG5 are available only for
+ * devices that support GPIOI port.
* @retval The Wake-Up pin flag.
*/
uint32_t HAL_PWREx_GetWakeupFlag (uint32_t WakeUpFlag)
@@ -1361,6 +1394,8 @@ uint32_t HAL_PWREx_GetWakeupFlag (uint32_t WakeUpFlag)
* @arg PWR_WAKEUP_FLAG6 : Clear the wakeup event received from PC1.
* @arg PWR_WAKEUP_FLAG_ALL : Clear the wakeup events received from
* all wake up pins.
+ * @note The PWR_WAKEUP_FLAG3 and PWR_WAKEUP_FLAG5 are available only for
+ * devices that support GPIOI port.
* @retval HAL status.
*/
HAL_StatusTypeDef HAL_PWREx_ClearWakeupFlag (uint32_t WakeUpFlag)
@@ -1404,6 +1439,7 @@ void HAL_PWREx_WAKEUP_PIN_IRQHandler (void)
/* PWR WKUP2 interrupt user callback */
HAL_PWREx_WKUP2_Callback ();
}
+#if defined (PWR_WKUPFR_WKUPF3)
else if (READ_BIT (PWR->WKUPFR, PWR_WKUPFR_WKUPF3) != 0U)
{
/* Clear PWR WKUPF3 flag */
@@ -1412,6 +1448,7 @@ void HAL_PWREx_WAKEUP_PIN_IRQHandler (void)
/* PWR WKUP3 interrupt user callback */
HAL_PWREx_WKUP3_Callback ();
}
+#endif /* defined (PWR_WKUPFR_WKUPF3) */
else if (READ_BIT (PWR->WKUPFR, PWR_WKUPFR_WKUPF4) != 0U)
{
/* Clear PWR WKUPF4 flag */
@@ -1420,6 +1457,7 @@ void HAL_PWREx_WAKEUP_PIN_IRQHandler (void)
/* PWR WKUP4 interrupt user callback */
HAL_PWREx_WKUP4_Callback ();
}
+#if defined (PWR_WKUPFR_WKUPF5)
else if (READ_BIT (PWR->WKUPFR, PWR_WKUPFR_WKUPF5) != 0U)
{
/* Clear PWR WKUPF5 flag */
@@ -1428,6 +1466,7 @@ void HAL_PWREx_WAKEUP_PIN_IRQHandler (void)
/* PWR WKUP5 interrupt user callback */
HAL_PWREx_WKUP5_Callback ();
}
+#endif /* defined (PWR_WKUPFR_WKUPF5) */
else
{
/* Clear PWR WKUPF6 flag */
@@ -1460,6 +1499,7 @@ __weak void HAL_PWREx_WKUP2_Callback (void)
*/
}
+#if defined (PWR_WKUPFR_WKUPF3)
/**
* @brief PWR WKUP3 interrupt callback.
* @retval None.
@@ -1470,6 +1510,7 @@ __weak void HAL_PWREx_WKUP3_Callback (void)
the HAL_PWREx_WKUP3Callback can be implemented in the user file
*/
}
+#endif /* defined (PWR_WKUPFR_WKUPF3) */
/**
* @brief PWR WKUP4 interrupt callback.
@@ -1482,6 +1523,7 @@ __weak void HAL_PWREx_WKUP4_Callback (void)
*/
}
+#if defined (PWR_WKUPFR_WKUPF5)
/**
* @brief PWR WKUP5 interrupt callback.
* @retval None.
@@ -1492,6 +1534,7 @@ __weak void HAL_PWREx_WKUP5_Callback (void)
the HAL_PWREx_WKUP5Callback can be implemented in the user file
*/
}
+#endif /* defined (PWR_WKUPFR_WKUPF5) */
/**
* @brief PWR WKUP6 interrupt callback.
@@ -2012,14 +2055,14 @@ void HAL_PWREx_DisableAVD (void)
void HAL_PWREx_PVD_AVD_IRQHandler (void)
{
/* Check if the Programmable Voltage Detector is enabled (PVD) */
- if(READ_BIT (PWR->CR1, PWR_CR1_PVDEN) != 0U)
+ if (READ_BIT (PWR->CR1, PWR_CR1_PVDEN) != 0U)
{
#if defined (DUAL_CORE)
if (HAL_GetCurrentCPUID () == CM7_CPUID)
#endif /* defined (DUAL_CORE) */
{
/* Check PWR D1/CD EXTI flag */
- if(__HAL_PWR_PVD_EXTI_GET_FLAG () != 0U)
+ if (__HAL_PWR_PVD_EXTI_GET_FLAG () != 0U)
{
/* PWR PVD interrupt user callback */
HAL_PWR_PVDCallback ();
@@ -2106,4 +2149,3 @@ __weak void HAL_PWREx_AVDCallback (void)
* @}
*/
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-09 11:57:53 +0000