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Diffstat (limited to 'bsps/arm/stm32h7/hal/stm32h7xx_hal_dma.c')
-rw-r--r--bsps/arm/stm32h7/hal/stm32h7xx_hal_dma.c129
1 files changed, 68 insertions, 61 deletions
diff --git a/bsps/arm/stm32h7/hal/stm32h7xx_hal_dma.c b/bsps/arm/stm32h7/hal/stm32h7xx_hal_dma.c
index fcdb50bd2a..7bfc087228 100644
--- a/bsps/arm/stm32h7/hal/stm32h7xx_hal_dma.c
+++ b/bsps/arm/stm32h7/hal/stm32h7xx_hal_dma.c
@@ -8,6 +8,17 @@
* + Initialization and de-initialization functions
* + IO operation functions
* + Peripheral State and errors functions
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -78,18 +89,6 @@
(@) You can refer to the DMA HAL driver header file for more useful macros.
@endverbatim
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -108,6 +107,9 @@
#ifdef HAL_DMA_MODULE_ENABLED
/* Private types -------------------------------------------------------------*/
+/** @addtogroup DMA_Private_Types
+ * @{
+ */
typedef struct
{
__IO uint32_t ISR; /*!< DMA interrupt status register */
@@ -120,6 +122,9 @@ typedef struct
__IO uint32_t ISR; /*!< BDMA interrupt status register */
__IO uint32_t IFCR; /*!< BDMA interrupt flag clear register */
} BDMA_Base_Registers;
+/**
+ * @}
+ */
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
@@ -245,12 +250,12 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
}
- /* Allocate lock resource */
- __HAL_UNLOCK(hdma);
-
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
+ /* Allocate lock resource */
+ __HAL_UNLOCK(hdma);
+
/* Disable the peripheral */
__HAL_DMA_DISABLE(hdma);
@@ -293,7 +298,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
}
/* Work around for Errata 2.22: UART/USART- DMA transfer lock: DMA stream could be
- lock when transfering data to/from USART/UART */
+ lock when transferring data to/from USART/UART */
#if (STM32H7_DEV_ID == 0x450UL)
if((DBGMCU->IDCODE & 0xFFFF0000U) >= 0x20000000U)
{
@@ -359,12 +364,12 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
assert_param(IS_BDMA_REQUEST(hdma->Init.Request));
}
- /* Allocate lock resource */
- __HAL_UNLOCK(hdma);
-
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
+ /* Allocate lock resource */
+ __HAL_UNLOCK(hdma);
+
/* Get the CR register value */
registerValue = ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR;
@@ -440,7 +445,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
}
else
{
- hdma->DMAmuxRequestGen = NULL;
+ hdma->DMAmuxRequestGen = 0U;
hdma->DMAmuxRequestGenStatus = 0U;
hdma->DMAmuxRequestGenStatusMask = 0U;
}
@@ -530,13 +535,15 @@ HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
return HAL_ERROR;
}
+#if defined (BDMA1) /* No DMAMUX available for BDMA1 available on STM32H7Ax/Bx devices only */
if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
+#endif /* BDMA1 */
{
/* Initialize parameters for DMAMUX channel :
DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask */
DMA_CalcDMAMUXChannelBaseAndMask(hdma);
- if(hdma->DMAmuxChannel != NULL)
+ if(hdma->DMAmuxChannel != 0U)
{
/* Resett he DMAMUX channel that corresponds to the DMA stream */
hdma->DMAmuxChannel->CCR = 0U;
@@ -558,7 +565,7 @@ HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
}
- hdma->DMAmuxRequestGen = NULL;
+ hdma->DMAmuxRequestGen = 0U;
hdma->DMAmuxRequestGenStatus = 0U;
hdma->DMAmuxRequestGenStatusMask = 0U;
}
@@ -651,12 +658,12 @@ HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, ui
}
else
{
- /* Process unlocked */
- __HAL_UNLOCK(hdma);
-
/* Set the error code to busy */
hdma->ErrorCode = HAL_DMA_ERROR_BUSY;
+ /* Process unlocked */
+ __HAL_UNLOCK(hdma);
+
/* Return error status */
status = HAL_ERROR;
}
@@ -734,7 +741,7 @@ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress,
hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE;
}
- if(hdma->DMAmuxRequestGen != NULL)
+ if(hdma->DMAmuxRequestGen != 0U)
{
/* if using DMAMUX request generator, enable the DMAMUX request generator overrun IT*/
/* enable the request gen overrun IT */
@@ -747,12 +754,12 @@ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress,
}
else
{
- /* Process unlocked */
- __HAL_UNLOCK(hdma);
-
/* Set the error code to busy */
hdma->ErrorCode = HAL_DMA_ERROR_BUSY;
+ /* Process unlocked */
+ __HAL_UNLOCK(hdma);
+
/* Return error status */
status = HAL_ERROR;
}
@@ -834,12 +841,12 @@ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
-
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_ERROR;
+ /* Process Unlocked */
+ __HAL_UNLOCK(hdma);
+
return HAL_ERROR;
}
}
@@ -861,7 +868,7 @@ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
/* Clear the DMAMUX synchro overrun flag */
hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
- if(hdma->DMAmuxRequestGen != NULL)
+ if(hdma->DMAmuxRequestGen != 0U)
{
/* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT */
/* disable the request gen overrun IT */
@@ -872,11 +879,11 @@ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
}
}
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
-
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hdma);
}
return HAL_OK;
@@ -933,7 +940,7 @@ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
/* Clear the DMAMUX synchro overrun flag */
hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
- if(hdma->DMAmuxRequestGen != NULL)
+ if(hdma->DMAmuxRequestGen != 0U)
{
/* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
/* disable the request gen overrun IT */
@@ -944,12 +951,12 @@ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
}
}
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
-
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
+ /* Process Unlocked */
+ __HAL_UNLOCK(hdma);
+
/* Call User Abort callback */
if(hdma->XferAbortCallback != NULL)
{
@@ -966,7 +973,7 @@ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param CompleteLevel: Specifies the DMA level complete.
- * @note The polling mode is kept in this version for legacy. it is recommanded to use the IT model instead.
+ * @note The polling mode is kept in this version for legacy. it is recommended to use the IT model instead.
* This model could be used for debug purpose.
* @note The HAL_DMA_PollForTransfer API cannot be used in circular and double buffering mode (automatic circular mode).
* @param Timeout: Timeout duration.
@@ -1133,7 +1140,7 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
{
/* Check for DMAMUX Request generator (if used) overrun status */
- if(hdma->DMAmuxRequestGen != NULL)
+ if(hdma->DMAmuxRequestGen != 0U)
{
/* if using DMAMUX request generator Check for DMAMUX request generator overrun */
if((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U)
@@ -1172,10 +1179,10 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
(*ifcr_reg) = (BDMA_FLAG_TC0 << (hdma->StreamIndex & 0x1FU));
}
+ hdma->State = HAL_DMA_STATE_READY;
+
/* Process Unlocked */
__HAL_UNLOCK(hdma);
-
- hdma->State = HAL_DMA_STATE_READY;
}
else /*CompleteLevel = HAL_DMA_HALF_TRANSFER*/
{
@@ -1323,12 +1330,12 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
/* Clear all interrupt flags at correct offset within the register */
regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
-
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
+ /* Process Unlocked */
+ __HAL_UNLOCK(hdma);
+
if(hdma->XferAbortCallback != NULL)
{
hdma->XferAbortCallback(hdma);
@@ -1365,11 +1372,11 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
/* Disable the transfer complete interrupt */
((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TC);
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
-
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hdma);
}
if(hdma->XferCpltCallback != NULL)
@@ -1400,9 +1407,6 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
}
while((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U);
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
-
if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
{
/* Change the DMA state to error if DMA disable fails */
@@ -1413,6 +1417,9 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
/* Change the DMA state to Ready if DMA disable success */
hdma->State = HAL_DMA_STATE_READY;
}
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hdma);
}
if(hdma->XferErrorCallback != NULL)
@@ -1508,11 +1515,11 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
/* Disable the transfer complete and error interrupt, if the DMA mode is not CIRCULAR */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
-
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hdma);
}
if(hdma->XferCpltCallback != NULL)
@@ -1536,12 +1543,12 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TE;
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
-
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
+ /* Process Unlocked */
+ __HAL_UNLOCK(hdma);
+
if (hdma->XferErrorCallback != NULL)
{
/* Transfer error callback */
@@ -1612,6 +1619,7 @@ HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_Call
break;
default:
+ status = HAL_ERROR;
break;
}
}
@@ -1774,7 +1782,7 @@ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t
/* Clear the DMAMUX synchro overrun flag */
hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
- if(hdma->DMAmuxRequestGen != NULL)
+ if(hdma->DMAmuxRequestGen != 0U)
{
/* Clear the DMAMUX request generator overrun flag */
hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
@@ -2053,4 +2061,3 @@ static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma)
* @}
*/
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-09 19:02:23 +0000