diff options
Diffstat (limited to 'bsps/arm/shared/pins')
-rw-r--r-- | bsps/arm/shared/pins/imx-gpio.c | 75 | ||||
-rw-r--r-- | bsps/arm/shared/pins/imx_iomux.c | 10 |
2 files changed, 68 insertions, 17 deletions
diff --git a/bsps/arm/shared/pins/imx-gpio.c b/bsps/arm/shared/pins/imx-gpio.c index 552e1d5cc2..1e39822b93 100644 --- a/bsps/arm/shared/pins/imx-gpio.c +++ b/bsps/arm/shared/pins/imx-gpio.c @@ -1,7 +1,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2019-2020 embedded brains GmbH. + * Copyright (C) 2019, 2020 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -33,14 +33,17 @@ #include <rtems.h> #include <rtems/sysinit.h> -#define IMX_GPIO_ALIAS_NAME "gpioX" +/* + * Most of the time it's gpio1 or gpio13. + */ +#define IMX_GPIO_ALIAS_NAME "gpioXY" /* - * i.MX6ULL has 5, i.MX7D has 7 + * i.MX6ULL has 5, i.MX7D has 7, i.MXRT1160 has 13 (base) + 2 (core-specific). * * Be careful when changing this. The attach() does a simple ASCII conversion. */ -#define IMX_MAX_GPIO_MODULES 7 +#define IMX_MAX_GPIO_MODULES 15 struct imx_gpio_regs { uint32_t dr; @@ -88,7 +91,14 @@ static void imx_gpio_attach(void) int len; memcpy(imx_gpio[i].name, IMX_GPIO_ALIAS_NAME, sizeof(IMX_GPIO_ALIAS_NAME)); - imx_gpio[i].name[sizeof(IMX_GPIO_ALIAS_NAME)-2] = (char)('0' + i); + if (i < 10) { + imx_gpio[i].name[sizeof(IMX_GPIO_ALIAS_NAME)-3] = (char)('0' + i); + imx_gpio[i].name[sizeof(IMX_GPIO_ALIAS_NAME)-2] = '\0'; + } else { + imx_gpio[i].name[sizeof(IMX_GPIO_ALIAS_NAME)-3] = (char)('0' + i / 10); + imx_gpio[i].name[sizeof(IMX_GPIO_ALIAS_NAME)-2] = (char)('0' + i % 10); + imx_gpio[i].name[sizeof(IMX_GPIO_ALIAS_NAME)-1] = '\0'; + } path = fdt_get_alias(fdt, imx_gpio[i].name); if (path == NULL) { @@ -181,12 +191,11 @@ static void imx_gpio_set_interrupt_mode(struct imx_gpio_pin *pin, uint32_t mode) } } -rtems_status_code imx_gpio_init_from_fdt_property ( +rtems_status_code imx_gpio_init_from_fdt_property_pointer ( struct imx_gpio_pin *pin, - int node_offset, - const char *property, + const uint32_t *prop_pointer, enum imx_gpio_mode mode, - size_t index + const uint32_t **next_prop_pointer ) { int len; @@ -195,7 +204,6 @@ rtems_status_code imx_gpio_init_from_fdt_property ( const void *fdt; uint32_t gpio_regs; const unsigned pin_length_dwords = 3; - const unsigned pin_length_bytes = (pin_length_dwords * sizeof(uint32_t)); uint32_t gpio_phandle; uint32_t pin_nr; int cfgnode; @@ -203,16 +211,12 @@ rtems_status_code imx_gpio_init_from_fdt_property ( memset(pin, 0, sizeof(*pin)); fdt = bsp_fdt_get(); - val = fdt_getprop(fdt, node_offset, property, &len); - if (val == NULL || (len % pin_length_bytes != 0) || - (index >= len / pin_length_bytes)) { - sc = RTEMS_UNSATISFIED; - } if (sc == RTEMS_SUCCESSFUL) { - pin_nr = fdt32_to_cpu(val[1 + index * pin_length_dwords]); - gpio_phandle = fdt32_to_cpu(val[0 + index * pin_length_dwords]); + pin_nr = fdt32_to_cpu(prop_pointer[1]); + gpio_phandle = fdt32_to_cpu(prop_pointer[0]); cfgnode = fdt_node_offset_by_phandle(fdt, gpio_phandle); + /* FIXME: Check compatible strings here. */ val = fdt_getprop(fdt, cfgnode, "reg", &len); if (len > 0) { gpio_regs = fdt32_to_cpu(val[0]); @@ -229,6 +233,43 @@ rtems_status_code imx_gpio_init_from_fdt_property ( if (sc == RTEMS_SUCCESSFUL) { imx_gpio_init(pin); } + if (sc == RTEMS_SUCCESSFUL && next_prop_pointer != NULL) { + *next_prop_pointer = prop_pointer + pin_length_dwords; + } + + return sc; +} + +rtems_status_code imx_gpio_init_from_fdt_property ( + struct imx_gpio_pin *pin, + int node_offset, + const char *property, + enum imx_gpio_mode mode, + size_t index +) +{ + int len; + const uint32_t *val; + rtems_status_code sc = RTEMS_SUCCESSFUL; + const void *fdt; + const unsigned pin_length_dwords = 3; + const unsigned pin_length_bytes = pin_length_dwords * 4; + + memset(pin, 0, sizeof(*pin)); + + fdt = bsp_fdt_get(); + val = fdt_getprop(fdt, node_offset, property, &len); + if (val == NULL || (len % pin_length_bytes != 0) || + (index >= len / pin_length_bytes)) { + sc = RTEMS_UNSATISFIED; + } + if (sc == RTEMS_SUCCESSFUL) { + sc = imx_gpio_init_from_fdt_property_pointer( + pin, + val + index * pin_length_dwords, + mode, + NULL); + } return sc; } diff --git a/bsps/arm/shared/pins/imx_iomux.c b/bsps/arm/shared/pins/imx_iomux.c index 1ff4186360..e6c604481a 100644 --- a/bsps/arm/shared/pins/imx_iomux.c +++ b/bsps/arm/shared/pins/imx_iomux.c @@ -307,7 +307,17 @@ int imx_iomux_configure_pins(const void *fdt, uint32_t cfgxref) WR4(sc, cfg->mux_reg, cfg->mux_val | sion); iomux_configure_input(sc, cfg->input_reg, cfg->input_val); if ((cfg->padconf_val & PADCONF_NONE) == 0) +#ifndef __rtems__ WR4(sc, cfg->padconf_reg, cfg->padconf_val); +#else /* __rtems__ */ + /* + * Need to mask the flags. On (for example) i.MXRT1166 + * they are used for domain write protection. On other + * i.MX* these are Reserved. + */ + WR4(sc, cfg->padconf_reg, cfg->padconf_val + & ~(PADCONF_SION | PADCONF_NONE)); +#endif /* __rtems__ */ #ifndef __rtems__ if (bootverbose) { char name[32]; |