diff options
Diffstat (limited to 'bsps/arm/shared/clock')
-rw-r--r-- | bsps/arm/shared/clock/clock-a9mpcore.c | 40 | ||||
-rw-r--r-- | bsps/arm/shared/clock/clock-armv7m.c | 4 | ||||
-rw-r--r-- | bsps/arm/shared/clock/clock-nxp-lpc.c | 19 |
3 files changed, 35 insertions, 28 deletions
diff --git a/bsps/arm/shared/clock/clock-a9mpcore.c b/bsps/arm/shared/clock/clock-a9mpcore.c index d4c374d4e2..c393933c81 100644 --- a/bsps/arm/shared/clock/clock-a9mpcore.c +++ b/bsps/arm/shared/clock/clock-a9mpcore.c @@ -1,7 +1,16 @@ /* SPDX-License-Identifier: BSD-2-Clause */ +/** + * @file + * + * @ingroup A9MPCoreSupport + * + * @brief This source file contains the Clock Driver for Cortex-A9 MPCore + * compatible devices. + */ + /* - * Copyright (c) 2013, 2016 embedded brains GmbH. All rights reserved. + * Copyright (C) 2013, 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -38,32 +47,33 @@ static struct timecounter a9mpcore_tc; -/* This is defined in dev/clock/clockimpl.h */ -void Clock_isr(rtems_irq_hdl_param arg); - __attribute__ ((weak)) uint32_t a9mpcore_clock_periphclk(void) { /* default to the BSP option. */ return BSP_ARM_A9MPCORE_PERIPHCLK; } -static void a9mpcore_clock_at_tick(void) +static void a9mpcore_clock_at_tick(volatile a9mpcore_gt *gt) { - volatile a9mpcore_gt *gt = A9MPCORE_GT; - gt->irqst = A9MPCORE_GT_IRQST_EFLG; } -static void a9mpcore_clock_handler_install(void) +static rtems_interrupt_entry a9mpcore_clock_interrupt_entry; + +static void a9mpcore_clock_handler_install(rtems_interrupt_handler handler) { rtems_status_code sc; - sc = rtems_interrupt_handler_install( + rtems_interrupt_entry_initialize( + &a9mpcore_clock_interrupt_entry, + handler, + RTEMS_DEVOLATILE(a9mpcore_gt *, A9MPCORE_GT), + "Clock" + ); + sc = rtems_interrupt_entry_install( A9MPCORE_IRQ_GT, - "Clock", RTEMS_INTERRUPT_UNIQUE, - (rtems_interrupt_handler) Clock_isr, - NULL + &a9mpcore_clock_interrupt_entry ); if (sc != RTEMS_SUCCESSFUL) { bsp_fatal(BSP_ARM_A9MPCORE_FATAL_CLOCK_IRQ_INSTALL); @@ -179,14 +189,14 @@ CPU_Counter_ticks _CPU_Counter_read(void) return gt->cntrlower; } -#define Clock_driver_support_at_tick() \ - a9mpcore_clock_at_tick() +#define Clock_driver_support_at_tick(arg) \ + a9mpcore_clock_at_tick(arg) #define Clock_driver_support_initialize_hardware() \ a9mpcore_clock_initialize() #define Clock_driver_support_install_isr(isr) \ - a9mpcore_clock_handler_install() + a9mpcore_clock_handler_install(isr) /* Include shared source clock driver code */ #include "../../shared/dev/clock/clockimpl.h" diff --git a/bsps/arm/shared/clock/clock-armv7m.c b/bsps/arm/shared/clock/clock-armv7m.c index 255de1ca42..ce1d3b38bd 100644 --- a/bsps/arm/shared/clock/clock-armv7m.c +++ b/bsps/arm/shared/clock/clock-armv7m.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * Copyright (C) 2020 embedded brains GmbH & Co. KG * Copyright (C) 2011, 2018 Sebastian Huber * * Redistribution and use in source and binary forms, with or without @@ -90,7 +90,7 @@ static void _ARMV7M_Clock_initialize_early(void) interval = (uint32_t) ((freq * us_per_tick) / 1000000); - systick->rvr = interval; + systick->rvr = interval - 1; systick->cvr = 0; systick->csr = ARMV7M_SYSTICK_CSR_ENABLE | ARMV7M_SYSTICK_CSR_CLKSOURCE; } diff --git a/bsps/arm/shared/clock/clock-nxp-lpc.c b/bsps/arm/shared/clock/clock-nxp-lpc.c index 1490699ec5..77d6d423a2 100644 --- a/bsps/arm/shared/clock/clock-nxp-lpc.c +++ b/bsps/arm/shared/clock/clock-nxp-lpc.c @@ -9,7 +9,7 @@ */ /* - * Copyright (c) 2009-2015 embedded brains GmbH. All rights reserved. + * Copyright (C) 2009, 2015 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -41,9 +41,6 @@ #ifdef ARM_MULTILIB_ARCH_V4 -/* This is defined in ../../../shared/dev/clock/clockimpl.h */ -void Clock_isr(rtems_irq_hdl_param arg); - static volatile lpc_timer *const lpc_clock = (volatile lpc_timer *) LPC_CLOCK_TIMER_BASE; @@ -57,12 +54,12 @@ static uint32_t lpc_clock_tc_get_timecount(struct timecounter *tc) return lpc_timecounter->tc; } -static void lpc_clock_at_tick(void) +static void lpc_clock_at_tick(volatile lpc_timer *regs) { - lpc_clock->ir = LPC_TIMER_IR_MR0; + regs->ir = LPC_TIMER_IR_MR0; } -static void lpc_clock_handler_install(void) +static void lpc_clock_handler_install(rtems_interrupt_handler handler) { rtems_status_code sc = RTEMS_SUCCESSFUL; @@ -70,8 +67,8 @@ static void lpc_clock_handler_install(void) LPC_CLOCK_INTERRUPT, "Clock", RTEMS_INTERRUPT_UNIQUE, - (rtems_interrupt_handler) Clock_isr, - NULL + handler, + RTEMS_DEVOLATILE(lpc_timer *, lpc_clock) ); if (sc != RTEMS_SUCCESSFUL) { rtems_fatal_error_occurred(0xdeadbeef); @@ -118,10 +115,10 @@ static void lpc_clock_initialize(void) rtems_timecounter_install(&lpc_clock_tc); } -#define Clock_driver_support_at_tick() lpc_clock_at_tick() +#define Clock_driver_support_at_tick(arg) lpc_clock_at_tick(arg) #define Clock_driver_support_initialize_hardware() lpc_clock_initialize() #define Clock_driver_support_install_isr(isr) \ - lpc_clock_handler_install() + lpc_clock_handler_install(isr) /* Include shared source clock driver code */ #include "../../../shared/dev/clock/clockimpl.h" |