diff options
Diffstat (limited to 'bsps/arm/lpc32xx')
37 files changed, 890 insertions, 250 deletions
diff --git a/bsps/arm/lpc32xx/console/console-config.c b/bsps/arm/lpc32xx/console/console-config.c index 9d7b76fe9a..98a1f6a331 100644 --- a/bsps/arm/lpc32xx/console/console-config.c +++ b/bsps/arm/lpc32xx/console/console-config.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2009-2014 embedded brains GmbH. All rights reserved. + * Copyright (C) 2009, 2014 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <libchip/ns16550.h> diff --git a/bsps/arm/lpc32xx/console/hsu.c b/bsps/arm/lpc32xx/console/hsu.c index 5f0a42a797..3e90f1f22d 100644 --- a/bsps/arm/lpc32xx/console/hsu.c +++ b/bsps/arm/lpc32xx/console/hsu.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2010-2014 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2014 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <bsp.h> diff --git a/bsps/arm/lpc32xx/i2c/i2c.c b/bsps/arm/lpc32xx/i2c/i2c.c index c17c99d294..a8e18c0cb2 100644 --- a/bsps/arm/lpc32xx/i2c/i2c.c +++ b/bsps/arm/lpc32xx/i2c/i2c.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2010-2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2011 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <rtems.h> diff --git a/bsps/arm/lpc32xx/include/bsp.h b/bsps/arm/lpc32xx/include/bsp.h index 91367a4a96..bb779ace16 100644 --- a/bsps/arm/lpc32xx/include/bsp.h +++ b/bsps/arm/lpc32xx/include/bsp.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2009, 2011 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef LIBBSP_ARM_LPC32XX_BSP_H diff --git a/bsps/arm/lpc32xx/include/bsp/boot.h b/bsps/arm/lpc32xx/include/bsp/boot.h index bc8b13a5aa..aef65c7ada 100644 --- a/bsps/arm/lpc32xx/include/bsp/boot.h +++ b/bsps/arm/lpc32xx/include/bsp/boot.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef LIBBSP_ARM_LPC32XX_BOOT_H @@ -19,8 +38,6 @@ #include <stdint.h> -#include <bsp/nand-mlc.h> - #ifdef __cplusplus extern "C" { #endif /* __cplusplus */ @@ -87,7 +104,7 @@ typedef union { uint8_t d12; uint8_t reserved_12 [463]; } field; - uint32_t data [MLC_SMALL_DATA_WORD_COUNT]; + uint32_t data [128]; } lpc32xx_boot_block; void lpc32xx_setup_boot_block( diff --git a/bsps/arm/lpc32xx/include/bsp/emc.h b/bsps/arm/lpc32xx/include/bsp/emc.h index cb6f00b6c9..04d23b02c8 100644 --- a/bsps/arm/lpc32xx/include/bsp/emc.h +++ b/bsps/arm/lpc32xx/include/bsp/emc.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2010-2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2011 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef LIBBSP_ARM_LPC32XX_EMC_H diff --git a/bsps/arm/lpc32xx/include/bsp/hsu.h b/bsps/arm/lpc32xx/include/bsp/hsu.h index 785de6164c..36d4c0641e 100644 --- a/bsps/arm/lpc32xx/include/bsp/hsu.h +++ b/bsps/arm/lpc32xx/include/bsp/hsu.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2010-2014 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2014 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef LIBBSP_ARM_LPC32XX_HSU_H diff --git a/bsps/arm/lpc32xx/include/bsp/i2c.h b/bsps/arm/lpc32xx/include/bsp/i2c.h index 81a04ec4cd..6757ebbd9b 100644 --- a/bsps/arm/lpc32xx/include/bsp/i2c.h +++ b/bsps/arm/lpc32xx/include/bsp/i2c.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef LIBBSP_ARM_LPC32XX_I2C_H diff --git a/bsps/arm/lpc32xx/include/bsp/irq.h b/bsps/arm/lpc32xx/include/bsp/irq.h index d8ad65b3d2..1571ea5e6b 100644 --- a/bsps/arm/lpc32xx/include/bsp/irq.h +++ b/bsps/arm/lpc32xx/include/bsp/irq.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2009 embedded brains GmbH. All rights reserved. + * Copyright (c) 2009 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef LIBBSP_ARM_LPC32XX_IRQ_H @@ -32,7 +51,7 @@ extern "C" { * * @ingroup RTEMSBSPsARMLPC32XX * - * @ingroup bsp_interrupt + * @ingroup RTEMSImplClassicIntr * * @{ */ @@ -136,8 +155,12 @@ extern "C" { #define BSP_INTERRUPT_VECTOR_COUNT (LPC32XX_IRQ_SYSCLK + 1) +#define BSP_INTERRUPT_CUSTOM_VALID_VECTOR + #define LPC32XX_IRQ_COUNT BSP_INTERRUPT_VECTOR_COUNT +bool bsp_interrupt_is_valid_vector(rtems_vector_number vector); + void lpc32xx_irq_set_priority(rtems_vector_number vector, unsigned priority); unsigned lpc32xx_irq_get_priority(rtems_vector_number vector); diff --git a/bsps/arm/lpc32xx/include/bsp/lpc-clock-config.h b/bsps/arm/lpc32xx/include/bsp/lpc-clock-config.h index d90c16cdcb..b723e93c87 100644 --- a/bsps/arm/lpc32xx/include/bsp/lpc-clock-config.h +++ b/bsps/arm/lpc32xx/include/bsp/lpc-clock-config.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2009 embedded brains GmbH. All rights reserved. + * Copyright (c) 2009 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef LIBBSP_ARM_LPC32XX_LPC_CLOCK_CONFIG_H diff --git a/bsps/arm/lpc32xx/include/bsp/lpc-ethernet-config.h b/bsps/arm/lpc32xx/include/bsp/lpc-ethernet-config.h index 1100dd7002..df74b085b1 100644 --- a/bsps/arm/lpc32xx/include/bsp/lpc-ethernet-config.h +++ b/bsps/arm/lpc32xx/include/bsp/lpc-ethernet-config.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2009 embedded brains GmbH. All rights reserved. + * Copyright (c) 2009 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef LIBBSP_ARM_LPC32XX_LPC_ETHERNET_CONFIG_H @@ -47,7 +66,7 @@ extern "C" { #define LPC_ETH_CONFIG_RX_UNIT_COUNT_DEFAULT 16 #define LPC_ETH_CONFIG_RX_UNIT_COUNT_MAX INT_MAX -#define LPC_ETH_CONFIG_TX_UNIT_COUNT_DEFAULT 32 +#define LPC_ETH_CONFIG_TX_UNIT_COUNT_DEFAULT 128 #define LPC_ETH_CONFIG_TX_UNIT_COUNT_MAX INT_MAX #define LPC_ETH_CONFIG_UNIT_MULTIPLE 8U @@ -81,7 +100,7 @@ static char *lpc_eth_config_alloc_table_area(size_t size) static void lpc_eth_config_free_table_area(char *table_area) { /* FIXME: Type */ - free(table_area, (int) 0xdeadbeef); + free(table_area, NULL); } /** @} */ diff --git a/bsps/arm/lpc32xx/include/bsp/lpc32xx.h b/bsps/arm/lpc32xx/include/bsp/lpc32xx.h index efb3972366..cd56c96080 100644 --- a/bsps/arm/lpc32xx/include/bsp/lpc32xx.h +++ b/bsps/arm/lpc32xx/include/bsp/lpc32xx.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2009, 2010 embedded brains GmbH. All rights reserved. + * Copyright (C) 2009, 2010 embedded brains GmbH & Co. KG * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at diff --git a/bsps/arm/lpc32xx/include/bsp/mmu.h b/bsps/arm/lpc32xx/include/bsp/mmu.h index d638bb2c01..ba628a19f0 100644 --- a/bsps/arm/lpc32xx/include/bsp/mmu.h +++ b/bsps/arm/lpc32xx/include/bsp/mmu.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2009, 2011 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef LIBBSP_ARM_LPC32XX_MMU_H @@ -55,14 +74,11 @@ extern "C" { * * @return Previous section flags of the first modified entry. */ -static inline uint32_t lpc32xx_set_translation_table_entries( +uint32_t lpc32xx_set_translation_table_entries( const void *begin, const void *end, uint32_t section_flags -) -{ - return arm_cp15_set_translation_table_entries(begin, end, section_flags); -} +); /** @} */ diff --git a/bsps/arm/lpc32xx/include/bsp/nand-mlc.h b/bsps/arm/lpc32xx/include/bsp/nand-mlc.h index 8633106db0..2097634702 100644 --- a/bsps/arm/lpc32xx/include/bsp/nand-mlc.h +++ b/bsps/arm/lpc32xx/include/bsp/nand-mlc.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2010-2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2011 embedded brains GmbH & Co. KG * * Copyright (c) 2011 Stephan Hoffmann <sho@reLinux.de> * diff --git a/bsps/arm/lpc32xx/include/tm27.h b/bsps/arm/lpc32xx/include/tm27.h index 3ae09dec90..bd06894354 100644 --- a/bsps/arm/lpc32xx/include/tm27.h +++ b/bsps/arm/lpc32xx/include/tm27.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /* @file * * @ingroup RTEMSBSPsARMLPC32XX @@ -6,11 +8,28 @@ */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef _RTEMS_TMTEST27 @@ -20,8 +39,6 @@ #ifndef __tm27_h #define __tm27_h -#include <assert.h> - #include <rtems.h> #include <bsp/lpc32xx.h> @@ -30,37 +47,59 @@ #define MUST_WAIT_FOR_INTERRUPT 1 -static void Install_tm27_vector(void (*handler)(rtems_vector_number)) +#define LPC32XX_TM27_TIMER (&lpc32xx.timer_2) + +#define LPC32XX_TM27_IRQ LPC32XX_IRQ_TIMER_2 + +static inline void Install_tm27_vector( rtems_interrupt_handler handler ) { - rtems_status_code sc = RTEMS_SUCCESSFUL; + static rtems_interrupt_entry entry; + volatile lpc_timer *timer = LPC32XX_TM27_TIMER; - LPC32XX_SW_INT = 0; + LPC32XX_TIMCLK_CTRL1 |= 1U << 4; - sc = rtems_interrupt_handler_install( - LPC32XX_IRQ_SW, - "SW", - RTEMS_INTERRUPT_UNIQUE, - (rtems_interrupt_handler) handler, - NULL + timer->tcr = LPC_TIMER_TCR_RST; + timer->ctcr = 0x0; + timer->pr = 0x0; + timer->ir = 0xff; + timer->mcr = LPC_TIMER_MCR_MR0_INTR | LPC_TIMER_MCR_MR0_STOP | + LPC_TIMER_MCR_MR0_RST; + timer->ccr = 0x0; + timer->emr = 0x0; + timer->mr0 = 0x1; + + rtems_interrupt_entry_initialize( + &entry, + handler, + NULL, + "tm27" + ); + (void) rtems_interrupt_entry_install( + LPC32XX_TM27_IRQ, + RTEMS_INTERRUPT_SHARED, + &entry ); - assert(sc == RTEMS_SUCCESSFUL); } -static void Cause_tm27_intr(void) +static inline void Cause_tm27_intr(void) { - LPC32XX_SW_INT = 0x1; + volatile lpc_timer *timer = LPC32XX_TM27_TIMER; + + timer->tcr = LPC_TIMER_TCR_EN; } -static void Clear_tm27_intr(void) +static inline void Clear_tm27_intr(void) { - LPC32XX_SW_INT = 0; - lpc32xx_irq_set_priority(LPC32XX_IRQ_SW, LPC32XX_IRQ_PRIORITY_LOWEST); + volatile lpc_timer *timer = LPC32XX_TM27_TIMER; + + timer->ir = LPC_TIMER_IR_MR0; + lpc32xx_irq_set_priority(LPC32XX_TM27_IRQ, LPC32XX_IRQ_PRIORITY_LOWEST); } -static void Lower_tm27_intr(void) +static inline void Lower_tm27_intr(void) { - bsp_interrupt_vector_enable(LPC32XX_IRQ_SW); - lpc32xx_irq_set_priority(LPC32XX_IRQ_SW, LPC32XX_IRQ_PRIORITY_HIGHEST); + bsp_interrupt_vector_enable(LPC32XX_TM27_IRQ); + lpc32xx_irq_set_priority(LPC32XX_TM27_IRQ, LPC32XX_IRQ_PRIORITY_HIGHEST); } #endif /* __tm27_h */ diff --git a/bsps/arm/lpc32xx/irq/irq.c b/bsps/arm/lpc32xx/irq/irq.c index e10393265b..418798f8cb 100644 --- a/bsps/arm/lpc32xx/irq/irq.c +++ b/bsps/arm/lpc32xx/irq/irq.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2009 embedded brains GmbH. All rights reserved. + * Copyright (C) 2009, 2022 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <rtems/score/armv4.h> @@ -23,12 +42,8 @@ #include <bsp/linker-symbols.h> #include <bsp/mmu.h> -/* - * Mask out SIC 1 and 2 IRQ request. There is no need to mask out the FIQ, - * since a pending FIQ would be a fatal error. The default handler will be - * invoked in this case. - */ -#define LPC32XX_MIC_STATUS_MASK (~0x3U) +/* Mask out SIC 1 and 2 IRQ/FIQ requests */ +#define LPC32XX_MIC_STATUS_MASK 0x3ffffffcU typedef union { struct { @@ -45,6 +60,14 @@ static lpc32xx_irq_fields lpc32xx_irq_priority_masks [LPC32XX_IRQ_PRIORITY_COUNT static lpc32xx_irq_fields lpc32xx_irq_enable; +static const lpc32xx_irq_fields lpc32xx_irq_is_valid = { + .field = { + .mic = 0x3fffeff8U, + .sic_1 = 0xffde71d6U, + .sic_2 = 0x9fdc9fffU + } +}; + static inline bool lpc32xx_irq_priority_is_valid(unsigned priority) { return priority <= LPC32XX_IRQ_PRIORITY_LOWEST; @@ -88,6 +111,16 @@ static inline void lpc32xx_irq_clear_bit_in_register(unsigned index, unsigned re *reg &= ~(1U << bit); } +static inline bool lpc32xx_irq_is_bit_set_in_field( + unsigned index, + const lpc32xx_irq_fields *fields +) +{ + LPC32XX_IRQ_BIT_OPS_DEFINE; + + return fields->fields_table [module] & (1U << bit); +} + static inline void lpc32xx_irq_set_bit_in_field(unsigned index, lpc32xx_irq_fields *fields) { LPC32XX_IRQ_BIT_OPS_DEFINE; @@ -102,6 +135,15 @@ static inline void lpc32xx_irq_clear_bit_in_field(unsigned index, lpc32xx_irq_fi fields->fields_table [module] &= ~(1U << bit); } +bool bsp_interrupt_is_valid_vector(rtems_vector_number vector) +{ + if (vector >= BSP_INTERRUPT_VECTOR_COUNT) { + return false; + } + + return lpc32xx_irq_is_bit_set_in_field(vector, &lpc32xx_irq_is_valid); +} + static inline unsigned lpc32xx_irq_get_index(uint32_t val) { ARM_SWITCH_REGISTERS; @@ -211,7 +253,14 @@ lpc32xx_irq_activation_type lpc32xx_irq_get_activation_type(rtems_vector_number void bsp_interrupt_dispatch(void) { - uint32_t status = lpc32xx.mic.sr & LPC32XX_MIC_STATUS_MASK; + /* + * Do not dispatch interrupts configured as FIQ. Use the corresponding + * interrupt type register to mask these interrupts. The status register may + * indicate an interrupt configured for FIQ before the FIQ exception is + * serviced by the processor. + */ + uint32_t status = (lpc32xx.mic.sr & ~lpc32xx.mic.itr) & + LPC32XX_MIC_STATUS_MASK; uint32_t er_mic = lpc32xx.mic.er; uint32_t er_sic_1 = lpc32xx.sic_1.er; uint32_t er_sic_2 = lpc32xx.sic_2.er; @@ -223,11 +272,11 @@ void bsp_interrupt_dispatch(void) if (status != 0) { vector = lpc32xx_irq_get_index(status); } else { - status = lpc32xx.sic_1.sr; + status = lpc32xx.sic_1.sr & ~lpc32xx.sic_1.itr; if (status != 0) { vector = lpc32xx_irq_get_index(status) + LPC32XX_IRQ_MODULE_SIC_1; } else { - status = lpc32xx.sic_2.sr; + status = lpc32xx.sic_2.sr & ~lpc32xx.sic_2.itr; if (status != 0) { vector = lpc32xx_irq_get_index(status) + LPC32XX_IRQ_MODULE_SIC_2; } else { @@ -260,6 +309,24 @@ rtems_status_code bsp_interrupt_get_attributes( rtems_interrupt_attributes *attributes ) { + bool is_sw_irq; + + bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); + bsp_interrupt_assert(attributes != NULL); + + attributes->is_maskable = + !lpc32xx_irq_is_bit_set_in_register(vector, LPC32XX_IRQ_OFFSET_ITR); + attributes->can_enable = true; + attributes->maybe_enable = true; + attributes->can_disable = true; + attributes->maybe_disable = true; + is_sw_irq = vector == LPC32XX_IRQ_SW; + attributes->can_raise = is_sw_irq; + attributes->can_raise_on = is_sw_irq; + attributes->can_clear = is_sw_irq; + attributes->can_get_affinity = true; + attributes->can_set_affinity = true; + return RTEMS_SUCCESSFUL; } @@ -270,20 +337,36 @@ rtems_status_code bsp_interrupt_is_pending( { bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); bsp_interrupt_assert(pending != NULL); - *pending = false; - return RTEMS_UNSATISFIED; + + *pending = lpc32xx_irq_is_bit_set_in_register(vector, LPC32XX_IRQ_OFFSET_RSR); + + return RTEMS_SUCCESSFUL; } rtems_status_code bsp_interrupt_raise(rtems_vector_number vector) { bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); - return RTEMS_UNSATISFIED; + + if (vector != LPC32XX_IRQ_SW) { + return RTEMS_UNSATISFIED; + } + + LPC32XX_SW_INT = 0x1; + + return RTEMS_SUCCESSFUL; } rtems_status_code bsp_interrupt_clear(rtems_vector_number vector) { bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); - return RTEMS_UNSATISFIED; + + if (vector != LPC32XX_IRQ_SW) { + return RTEMS_UNSATISFIED; + } + + LPC32XX_SW_INT = 0x0; + + return RTEMS_SUCCESSFUL; } rtems_status_code bsp_interrupt_vector_is_enabled( @@ -293,8 +376,10 @@ rtems_status_code bsp_interrupt_vector_is_enabled( { bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); bsp_interrupt_assert(enabled != NULL); - *enabled = false; - return RTEMS_UNSATISFIED; + + *enabled = lpc32xx_irq_is_bit_set_in_field(vector, &lpc32xx_irq_enable); + + return RTEMS_SUCCESSFUL; } rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector) @@ -304,8 +389,12 @@ rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector) bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); rtems_interrupt_disable(level); - lpc32xx_irq_set_bit_in_register(vector, LPC32XX_IRQ_OFFSET_ER); - lpc32xx_irq_set_bit_in_field(vector, &lpc32xx_irq_enable); + + if (!lpc32xx_irq_is_bit_set_in_field(vector, &lpc32xx_irq_enable)) { + lpc32xx_irq_set_bit_in_field(vector, &lpc32xx_irq_enable); + lpc32xx_irq_set_bit_in_register(vector, LPC32XX_IRQ_OFFSET_ER); + } + rtems_interrupt_enable(level); return RTEMS_SUCCESSFUL; diff --git a/bsps/arm/lpc32xx/nand/nand-mlc-erase-block-safe.c b/bsps/arm/lpc32xx/nand/nand-mlc-erase-block-safe.c index b3318ea653..3ad5daf779 100644 --- a/bsps/arm/lpc32xx/nand/nand-mlc-erase-block-safe.c +++ b/bsps/arm/lpc32xx/nand/nand-mlc-erase-block-safe.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -8,11 +10,28 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <bsp/nand-mlc.h> diff --git a/bsps/arm/lpc32xx/nand/nand-mlc-read-blocks.c b/bsps/arm/lpc32xx/nand/nand-mlc-read-blocks.c index 671c2ec505..90481f975a 100644 --- a/bsps/arm/lpc32xx/nand/nand-mlc-read-blocks.c +++ b/bsps/arm/lpc32xx/nand/nand-mlc-read-blocks.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <bsp/nand-mlc.h> diff --git a/bsps/arm/lpc32xx/nand/nand-mlc-write-blocks.c b/bsps/arm/lpc32xx/nand/nand-mlc-write-blocks.c index f5157c46e5..4a4c31964a 100644 --- a/bsps/arm/lpc32xx/nand/nand-mlc-write-blocks.c +++ b/bsps/arm/lpc32xx/nand/nand-mlc-write-blocks.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2010-2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2011 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <bsp/nand-mlc.h> diff --git a/bsps/arm/lpc32xx/nand/nand-mlc.c b/bsps/arm/lpc32xx/nand/nand-mlc.c index ed60fa93d0..b9cc4e669e 100644 --- a/bsps/arm/lpc32xx/nand/nand-mlc.c +++ b/bsps/arm/lpc32xx/nand/nand-mlc.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2010-2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2011 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <bsp/lpc32xx.h> diff --git a/bsps/arm/lpc32xx/nand/nand-select.c b/bsps/arm/lpc32xx/nand/nand-select.c index 4f37afa301..2a0e7396f1 100644 --- a/bsps/arm/lpc32xx/nand/nand-select.c +++ b/bsps/arm/lpc32xx/nand/nand-select.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2012 embedded brains GmbH. All rights reserved. + * Copyright (c) 2012 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <bsp.h> diff --git a/bsps/arm/lpc32xx/rtc/rtc-config.c b/bsps/arm/lpc32xx/rtc/rtc-config.c index 4f5b31f3b1..35d66f2523 100644 --- a/bsps/arm/lpc32xx/rtc/rtc-config.c +++ b/bsps/arm/lpc32xx/rtc/rtc-config.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2009, 2011 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <libchip/rtc.h> diff --git a/bsps/arm/lpc32xx/start/boot.c b/bsps/arm/lpc32xx/start/boot.c index ec0d22a6f2..84577d105b 100644 --- a/bsps/arm/lpc32xx/start/boot.c +++ b/bsps/arm/lpc32xx/start/boot.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <string.h> diff --git a/bsps/arm/lpc32xx/start/bspidle.c b/bsps/arm/lpc32xx/start/bspidle.c index d6a6c54fef..17f195b8fa 100644 --- a/bsps/arm/lpc32xx/start/bspidle.c +++ b/bsps/arm/lpc32xx/start/bspidle.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2012 embedded brains GmbH. All rights reserved. + * Copyright (c) 2012 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <bsp.h> diff --git a/bsps/arm/lpc32xx/start/bspreset.c b/bsps/arm/lpc32xx/start/bspreset.c index 306c86ba2e..26da2037c5 100644 --- a/bsps/arm/lpc32xx/start/bspreset.c +++ b/bsps/arm/lpc32xx/start/bspreset.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2009-2010 embedded brains GmbH. All rights reserved. + * Copyright (C) 2009, 2010 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <stdbool.h> diff --git a/bsps/arm/lpc32xx/start/bspstart.c b/bsps/arm/lpc32xx/start/bspstart.c index 1655602528..7b6c1230f3 100644 --- a/bsps/arm/lpc32xx/start/bspstart.c +++ b/bsps/arm/lpc32xx/start/bspstart.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2009-2014 embedded brains GmbH. All rights reserved. + * Copyright (C) 2009, 2014 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <rtems/counter.h> diff --git a/bsps/arm/lpc32xx/start/bspstarthooks.c b/bsps/arm/lpc32xx/start/bspstarthooks.c index cf4f327bd3..213cb43c19 100644 --- a/bsps/arm/lpc32xx/start/bspstarthooks.c +++ b/bsps/arm/lpc32xx/start/bspstarthooks.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2009-2013 embedded brains GmbH. All rights reserved. + * Copyright (C) 2009, 2013 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #define ARM_CP15_TEXT_SECTION BSP_START_TEXT_SECTION diff --git a/bsps/arm/lpc32xx/start/emc.c b/bsps/arm/lpc32xx/start/emc.c index 41ae91f32b..5d1bea77b5 100644 --- a/bsps/arm/lpc32xx/start/emc.c +++ b/bsps/arm/lpc32xx/start/emc.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <bsp/emc.h> diff --git a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx index 200e7f3e04..f38f7903b2 100644 --- a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx +++ b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx @@ -12,6 +12,6 @@ lpc32xx = 0x20020000; lpc32xx_magic_zero_begin = 0x05000000; lpc32xx_magic_zero_end = 0x07000000; -lpc32xx_magic_zero_size = lpc32xx_magic_zero_end - lpc32xx_magic_zero_end; +lpc32xx_magic_zero_size = lpc32xx_magic_zero_end - lpc32xx_magic_zero_begin; INCLUDE linkcmds.armv4 diff --git a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx index cf388dfbba..b0d2ecd8a6 100644 --- a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx +++ b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx @@ -12,33 +12,13 @@ * @ingroup bsp_linker * * @brief MZX application memory map. - * - * <table> - * <tr><th>Region Name</th><th>Region Begin</th><th>Region Size</th></tr> - * <tr><td>RAM_INT</td><td>0x08000000</td><td>256k</td></tr> - * <tr><td>RAM_MMU</td><td>0x80000000</td><td>16k</td></tr> - * <tr><td>RAM_EXT</td><td>0x80004000</td><td>32M - 16k</td></tr> - * </table> - * - * <table> - * <tr><th>Section Name</th><th>Section Runtime Region</th><th>Section Load Region</th></tr> - * <tr><td>.start</td><td>RAM_EXT</td><td></td></tr> - * <tr><td>.vector</td><td>RAM_INT</td><td></td></tr> - * <tr><td>.text</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> - * <tr><td>.rodata</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> - * <tr><td>.data</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> - * <tr><td>.fast</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> - * <tr><td>.bss</td><td>RAM_EXT</td><td></td></tr> - * <tr><td>.work</td><td>RAM_EXT</td><td></td></tr> - * <tr><td>.stack</td><td>RAM_INT</td><td></td></tr> - * </table> */ MEMORY { RAM_INT : ORIGIN = 0x08000000, LENGTH = 256k RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k /* SDRAM on DYCS0 */ RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */ - RAM_EXT : ORIGIN = 0x80005000, LENGTH = 32M - 20k /* SDRAM on DYCS0 */ + RAM_EXT : ORIGIN = 0x80005000, LENGTH = 64M - 20k /* SDRAM on DYCS0 */ } REGION_ALIAS ("REGION_START", RAM_EXT); diff --git a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_1 b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_1 index eae076e235..d50f17d7b7 100644 --- a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_1 +++ b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_1 @@ -12,26 +12,6 @@ * @ingroup bsp_linker * * @brief MZX stage-1 program memory map. - * - * <table> - * <tr><th>Region Name</th><th>Region Begin</th><th>Region Size</th></tr> - * <tr><td>RAM_INT</td><td>0x08000000</td><td>232k</td></tr> - * <tr><td>RAM_MMU</td><td>0x0803a000</td><td>16k</td></tr> - * <tr><td>RAM_VEC</td><td>0x0803d000</td><td>8k</td></tr> - * </table> - * - * <table> - * <tr><th>Section Name</th><th>Section Runtime Region</th><th>Section Load Region</th></tr> - * <tr><td>.start</td><td>RAM_INT</td><td></td></tr> - * <tr><td>.vector</td><td>RAM_INT</td><td></td></tr> - * <tr><td>.text</td><td>RAM_INT</td><td>RAM_INT</td></tr> - * <tr><td>.rodata</td><td>RAM_INT</td><td>RAM_INT</td></tr> - * <tr><td>.data</td><td>RAM_INT</td><td>RAM_INT</td></tr> - * <tr><td>.fast</td><td>RAM_INT</td><td>RAM_INT</td></tr> - * <tr><td>.bss</td><td>RAM_INT</td><td></td></tr> - * <tr><td>.work</td><td>RAM_INT</td><td></td></tr> - * <tr><td>.stack</td><td>RAM_INT</td><td></td></tr> - * </table> */ MEMORY { diff --git a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_2 b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_2 index 2aa8c34091..4950ce735e 100644 --- a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_2 +++ b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_2 @@ -12,26 +12,6 @@ * @ingroup bsp_linker * * @brief MZX stage-2 program memory map. - * - * <table> - * <tr><th>Region Name</th><th>Region Begin</th><th>Region Size</th></tr> - * <tr><td>RAM_INT</td><td>0x08000000</td><td>256k</td></tr> - * <tr><td>RAM_MMU</td><td>0x81c00000</td><td>16k</td></tr> - * <tr><td>RAM_EXT</td><td>0x81c04000</td><td>4M - 16k</td></tr> - * </table> - * - * <table> - * <tr><th>Section Name</th><th>Section Runtime Region</th><th>Section Load Region</th></tr> - * <tr><td>.start</td><td>RAM_EXT</td><td></td></tr> - * <tr><td>.vector</td><td>RAM_INT</td><td></td></tr> - * <tr><td>.text</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> - * <tr><td>.rodata</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> - * <tr><td>.data</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> - * <tr><td>.fast</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> - * <tr><td>.bss</td><td>RAM_EXT</td><td></td></tr> - * <tr><td>.work</td><td>RAM_EXT</td><td></td></tr> - * <tr><td>.stack</td><td>RAM_INT</td><td></td></tr> - * </table> */ MEMORY { @@ -39,7 +19,7 @@ MEMORY { RAM_FAST : ORIGIN = 0x0803c000, LENGTH = 16k RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k /* SDRAM on DYCS0 */ RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */ - RAM_EXT : ORIGIN = 0x81c00000, LENGTH = 4M /* SDRAM on DYCS0 */ + RAM_EXT : ORIGIN = 0x83000000, LENGTH = 16M /* SDRAM on DYCS0 */ } REGION_ALIAS ("REGION_START", RAM_EXT); diff --git a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_phycore b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_phycore index 2459da2557..34542a6dcb 100644 --- a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_phycore +++ b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_phycore @@ -12,27 +12,6 @@ * @ingroup bsp_linker * * @brief phyCORE-LPC3250 memory map. - * - * <table> - * <tr><th>Region Name</th><th>Region Begin</th><th>Region Size</th></tr> - * <tr><td>RAM_INT</td><td>0x08000000</td><td>256k</td></tr> - * <tr><td>RAM_MMU</td><td>0x80000000</td><td>16k</td></tr> - * <tr><td>RAM_EXT</td><td>0x80004000</td><td>64M - 16k</td></tr> - * <tr><td>ROM_EXT</td><td>0xe0000000</td><td>2M</td></tr> - * </table> - * - * <table> - * <tr><th>Section Name</th><th>Section Runtime Region</th><th>Section Load Region</th></tr> - * <tr><td>.start</td><td>RAM_EXT</td><td></td></tr> - * <tr><td>.vector</td><td>RAM_INT</td><td></td></tr> - * <tr><td>.text</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> - * <tr><td>.rodata</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> - * <tr><td>.data</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> - * <tr><td>.fast</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> - * <tr><td>.bss</td><td>RAM_EXT</td><td></td></tr> - * <tr><td>.work</td><td>RAM_EXT</td><td></td></tr> - * <tr><td>.stack</td><td>RAM_INT</td><td></td></tr> - * </table> */ MEMORY { diff --git a/bsps/arm/lpc32xx/start/mmu.c b/bsps/arm/lpc32xx/start/mmu.c new file mode 100644 index 0000000000..0c2f355a45 --- /dev/null +++ b/bsps/arm/lpc32xx/start/mmu.c @@ -0,0 +1,81 @@ +/** + * @file + * + * @ingroup lpc32xx_mmu + * + * @brief MMU support implementation. + */ + +/* + * Copyright (c) 2010-2011 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Obere Lagerstr. 30 + * 82178 Puchheim + * Germany + * <rtems@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#include <bsp/mmu.h> + +static uint32_t disable_mmu(void) +{ + uint32_t ctrl = 0; + + arm_cp15_data_cache_test_and_clean_and_invalidate(); + + ctrl = arm_cp15_get_control(); + arm_cp15_set_control(ctrl & ~ARM_CP15_CTRL_M); + + arm_cp15_tlb_invalidate(); + + return ctrl; +} + +static void restore_mmu_control(uint32_t ctrl) +{ + arm_cp15_set_control(ctrl); +} + +static uint32_t set_translation_table_entries( + const void *begin, + const void *end, + uint32_t section_flags +) +{ + uint32_t *ttb = arm_cp15_get_translation_table_base(); + uint32_t i = ARM_MMU_SECT_GET_INDEX(begin); + uint32_t iend = ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(end)); + uint32_t ctrl = disable_mmu(); + uint32_t section_flags_of_first_entry = ttb [i]; + + while (i < iend) { + ttb [i] = (i << ARM_MMU_SECT_BASE_SHIFT) | section_flags; + ++i; + } + + restore_mmu_control(ctrl); + + return section_flags_of_first_entry; +} + +uint32_t lpc32xx_set_translation_table_entries( + const void *begin, + const void *end, + uint32_t section_flags +) +{ + rtems_interrupt_level level; + uint32_t section_flags_of_first_entry = 0; + + rtems_interrupt_disable(level); + section_flags_of_first_entry = + set_translation_table_entries(begin, end, section_flags); + rtems_interrupt_enable(level); + + return section_flags_of_first_entry; +} diff --git a/bsps/arm/lpc32xx/start/restart.c b/bsps/arm/lpc32xx/start/restart.c index 275e8e8403..c92dfc6174 100644 --- a/bsps/arm/lpc32xx/start/restart.c +++ b/bsps/arm/lpc32xx/start/restart.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2010, 2011 embedded brains GmbH. All rights reserved. + * Copyright (C) 2010, 2011 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <rtems.h> diff --git a/bsps/arm/lpc32xx/start/system-clocks.c b/bsps/arm/lpc32xx/start/system-clocks.c index 76415d708d..a82d8c2bd7 100644 --- a/bsps/arm/lpc32xx/start/system-clocks.c +++ b/bsps/arm/lpc32xx/start/system-clocks.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <bsp.h> diff --git a/bsps/arm/lpc32xx/start/timer.c b/bsps/arm/lpc32xx/start/timer.c index 6f6087760b..998bc73f7f 100644 --- a/bsps/arm/lpc32xx/start/timer.c +++ b/bsps/arm/lpc32xx/start/timer.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2008, 2009 embedded brains GmbH. All rights reserved. + * Copyright (C) 2008, 2009 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <rtems.h> |