diff options
Diffstat (limited to 'bsps/arm/include/libcpu/am335x.h')
| -rw-r--r-- | bsps/arm/include/libcpu/am335x.h | 35 |
1 files changed, 24 insertions, 11 deletions
diff --git a/bsps/arm/include/libcpu/am335x.h b/bsps/arm/include/libcpu/am335x.h index a78cbd028d..b69c822d62 100644 --- a/bsps/arm/include/libcpu/am335x.h +++ b/bsps/arm/include/libcpu/am335x.h @@ -664,6 +664,9 @@ #define AM335X_I2C_CON_MST (0x00000400u) #define AM335X_I2C_CON_STB (0x00000800u) #define AM335X_I2C_SYSC_AUTOIDLE (0x00000001u) +#define AM335X_I2C_SYSC_SRST (0x00000002u) +#define AM335X_I2C_SYSC_ENAWAKEUP (0x00000004u) +#define AM335X_I2C_SYSS_RDONE (0x00000001u) /*I2C0 module clock registers*/ #define AM335X_CM_WKUP_CONTROL_CLKCTRL (0x4) @@ -686,29 +689,39 @@ #define AM335X_CM_PER_CONTROL_CLKCTRL_IDLEST (0x00030000u) +#define AM335X_I2C_BUF_TXTRSH_SHIFT (0) +#define AM335X_I2C_BUF_TXTRSH_MASK (0x0000003Fu) +#define AM335X_I2C_BUF_TXTRSH(X) (((X) << AM335X_I2C_BUF_TXTRSH_SHIFT) \ + & AM335X_I2C_BUF_TXTRSH_MASK) +#define AM335X_I2C_BUF_TXFIFO_CLR (0x00000040u) +#define AM335X_I2C_BUF_RXTRSH_SHIFT (8) +#define AM335X_I2C_BUF_RXTRSH_MASK (0x00003F00u) +#define AM335X_I2C_BUF_RXTRSH(X) (((X) << AM335X_I2C_BUF_RXTRSH_SHIFT) \ + & AM335X_I2C_BUF_RXTRSH_MASK) +#define AM335X_I2C_BUF_RXFIFO_CLR (0x00004000u) + /* I2C status Register */ +#define AM335X_I2C_IRQSTATUS_AL (1 << 0) #define AM335X_I2C_IRQSTATUS_NACK (1 << 1) -#define AM335X_I2C_IRQSTATUS_ROVR (1 << 11) -#define AM335X_I2C_IRQSTATUS_AL (1<<0) #define AM335X_I2C_IRQSTATUS_ARDY (1 << 2) #define AM335X_I2C_IRQSTATUS_RRDY (1 << 3) #define AM335X_I2C_IRQSTATUS_XRDY (1 << 4) -#define AM335X_I2C_IRQSTATUS_XUDF (1 << 10) -#define AM335X_I2C_BUF_TXFIFO_CLR (0x00000040u) -#define AM335X_I2C_BUF_RXFIFO_CLR (0x00004000u) -#define AM335X_I2C_IRQSTATUS_AAS (1 << 9) -#define AM335X_I2C_IRQSTATUS_BF (1 << 8) +#define AM335X_I2C_IRQSTATUS_GC (1 << 5) #define AM335X_I2C_IRQSTATUS_STC (1 << 6) -#define AM335X_I2C_IRQSTATUS_GC (1 << 5) -#define AM335X_I2C_IRQSTATUS_XDR (1 << 14) -#define AM335X_I2C_IRQSTATUS_RDR (1 << 13) +#define AM335X_I2C_IRQSTATUS_AERR (1 << 7) +#define AM335X_I2C_IRQSTATUS_BF (1 << 8) +#define AM335X_I2C_IRQSTATUS_AAS (1 << 9) +#define AM335X_I2C_IRQSTATUS_XUDF (1 << 10) +#define AM335X_I2C_IRQSTATUS_ROVR (1 << 11) +#define AM335X_I2C_IRQSTATUS_BB (1 << 12) +#define AM335X_I2C_IRQSTATUS_RDR (1 << 13) +#define AM335X_I2C_IRQSTATUS_XDR (1 << 14) #define AM335X_I2C_INT_RECV_READY AM335X_I2C_IRQSTATUS_RRDY #define AM335X_I2C_CON_STOP (0x00000002u) #define AM335X_I2C_CON_START (0x00000001u) #define AM335X_I2C_CFG_MST_RX AM335X_I2C_CON_MST #define AM335X_I2C_CFG_MST_TX (AM335X_I2C_CON_TRX | AM335X_I2C_CON_MST) -#define AM335X_I2C_IRQSTATUS_RAW_BB (0x00001000u) #define AM335X_CM_PER_OCPWP_L3_CLKSTCTRL_CLKACTIVITY_OCPWP_L4_GCLK (0x00000020u) #define AM335X_I2C_INT_STOP_CONDITION AM335X_I2C_IRQSTATUS_BF |