diff options
Diffstat (limited to 'bsps/arm/imxrt/include/fsl_device_registers.h')
-rw-r--r-- | bsps/arm/imxrt/include/fsl_device_registers.h | 57 |
1 files changed, 31 insertions, 26 deletions
diff --git a/bsps/arm/imxrt/include/fsl_device_registers.h b/bsps/arm/imxrt/include/fsl_device_registers.h index 54caf43ca6..00c3fc7036 100644 --- a/bsps/arm/imxrt/include/fsl_device_registers.h +++ b/bsps/arm/imxrt/include/fsl_device_registers.h @@ -1,36 +1,41 @@ -/* - * Copyright 2014-2016 Freescale Semiconductor, Inc. - * Copyright 2016-2018 NXP - * All rights reserved. +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file * - * SPDX-License-Identifier: BSD-3-Clause + * @ingroup RTEMSBSPsARMimxrt * + * @brief Helper file for including registers for SDK drivers. */ -#ifndef __FSL_DEVICE_REGISTERS_H__ -#define __FSL_DEVICE_REGISTERS_H__ - /* - * Include the cpu specific register header files. + * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) * - * The CPU macro should be declared in the project or makefile. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ -#if (defined(CPU_MIMXRT1052CVJ5B) || defined(CPU_MIMXRT1052CVL5B) || defined(CPU_MIMXRT1052DVJ6B) || \ - defined(CPU_MIMXRT1052DVL6B)) - -#define MIMXRT1052_SERIES - -/* CMSIS-style register definitions */ -#include "MIMXRT1052.h" -/* CPU specific feature definitions */ -#include "MIMXRT1052_features.h" -#else - #error "No valid CPU defined!" -#endif +#ifndef FSL_DEVICE_REGISTERS_H +#define FSL_DEVICE_REGISTERS_H -#endif /* __FSL_DEVICE_REGISTERS_H__ */ +#include <chip.h> -/******************************************************************************* - * EOF - ******************************************************************************/ +#endif /* FSL_DEVICE_REGISTERS_H */ |