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-rw-r--r--bsps/aarch64/xilinx-zynqmp/console/console.c210
-rw-r--r--bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c51
-rw-r--r--bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts114
-rw-r--r--bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c130
-rw-r--r--bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts98
-rw-r--r--bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c105
-rw-r--r--bsps/aarch64/xilinx-zynqmp/include/bsp.h30
-rw-r--r--bsps/aarch64/xilinx-zynqmp/include/bsp/i2c.h2
-rw-r--r--bsps/aarch64/xilinx-zynqmp/include/bsp/irq.h7
-rw-r--r--bsps/aarch64/xilinx-zynqmp/include/bsp/jffs2_xnandpsu.h56
-rw-r--r--bsps/aarch64/xilinx-zynqmp/include/bsp/jffs2_xqspipsu.h62
-rw-r--r--bsps/aarch64/xilinx-zynqmp/jffs2_xnandpsu.c375
-rw-r--r--bsps/aarch64/xilinx-zynqmp/jffs2_xqspipsu.c186
-rw-r--r--bsps/aarch64/xilinx-zynqmp/start/bspstarthooks.c42
-rw-r--r--bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c33
15 files changed, 1434 insertions, 67 deletions
diff --git a/bsps/aarch64/xilinx-zynqmp/console/console.c b/bsps/aarch64/xilinx-zynqmp/console/console.c
index d1948f1a0c..4023d5c6f3 100644
--- a/bsps/aarch64/xilinx-zynqmp/console/console.c
+++ b/bsps/aarch64/xilinx-zynqmp/console/console.c
@@ -9,7 +9,7 @@
*/
/*
- * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
@@ -35,22 +35,163 @@
*/
#include <rtems/console.h>
-#include <rtems/bspIo.h>
+#include <rtems/endian.h>
#include <rtems/sysinit.h>
+#include <rtems/termiostypes.h>
+#include <bsp/aarch64-mmu.h>
+#include <bsp/fdt.h>
#include <bsp/irq.h>
+
#include <dev/serial/zynq-uart.h>
+#include <dev/serial/zynq-uart-regs.h>
#include <bspopts.h>
+#include <libfdt.h>
+
+#include <libchip/ns16550.h>
+
+uint32_t mgmt_uart_reg_shift = 0;
+static uint8_t get_register(uintptr_t addr, uint8_t i)
+{
+ volatile uint8_t *reg = (uint8_t *) addr;
+
+ i <<= mgmt_uart_reg_shift;
+ return reg [i];
+}
+
+static void set_register(uintptr_t addr, uint8_t i, uint8_t val)
+{
+ volatile uint8_t *reg = (uint8_t *) addr;
+
+ i <<= mgmt_uart_reg_shift;
+ reg [i] = val;
+}
+
+static ns16550_context zynqmp_mgmt_uart_context = {
+ .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("Management UART 0"),
+ .get_reg = get_register,
+ .set_reg = set_register,
+ .port = 0,
+ .irq = 0,
+ .clock = 0,
+ .initial_baud = 0,
+};
+
+__attribute__ ((weak)) void zynqmp_configure_management_console(rtems_termios_device_context *base)
+{
+ /* This SLIP-encoded watchdog command sets timeouts to 0xFFFFFFFF seconds. */
+ const char mgmt_watchdog_cmd[] =
+ "\xc0\xda\x00\x00\xff\xff\xff\xff\xff\x00\xff\xff\xff\xffM#\xc0";
+
+ /* Send the system watchdog configuration command */
+ for (int i = 0; i < sizeof(mgmt_watchdog_cmd); i++) {
+ ns16550_polled_putchar(base, mgmt_watchdog_cmd[i]);
+ }
+}
+
+static void zynqmp_management_console_init(void)
+{
+ /* Find the management console in the device tree */
+ const void *fdt = bsp_fdt_get();
+ const uint32_t *prop;
+ uint32_t outprop[4];
+ int proplen;
+ int node;
+
+ const char *alias = fdt_get_alias(fdt, "mgmtport");
+ if (alias == NULL) {
+ return;
+ }
+ node = fdt_path_offset(fdt, alias);
+
+ prop = fdt_getprop(fdt, node, "clock-frequency", &proplen);
+ if ( prop == NULL || proplen != 4 ) {
+ zynqmp_mgmt_uart_context.port = 0;
+ return;
+ }
+ outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
+ zynqmp_mgmt_uart_context.clock = outprop[0];
+
+ prop = fdt_getprop(fdt, node, "current-speed", &proplen);
+ if ( prop == NULL || proplen != 4 ) {
+ zynqmp_mgmt_uart_context.port = 0;
+ return;
+ }
+ outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
+ zynqmp_mgmt_uart_context.initial_baud = outprop[0];
+
+ prop = fdt_getprop(fdt, node, "interrupts", &proplen);
+ if ( prop == NULL || proplen != 12 ) {
+ zynqmp_mgmt_uart_context.port = 0;
+ return;
+ }
+ outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
+ outprop[1] = rtems_uint32_from_big_endian((const uint8_t *) &prop[1]);
+ outprop[2] = rtems_uint32_from_big_endian((const uint8_t *) &prop[2]);
+ /* proplen is in bytes, interrupt mapping expects a length in 32-bit cells */
+ zynqmp_mgmt_uart_context.irq = bsp_fdt_map_intr(outprop, proplen / 4);
+ if ( zynqmp_mgmt_uart_context.irq == 0 ) {
+ zynqmp_mgmt_uart_context.port = 0;
+ return;
+ }
+
+ prop = fdt_getprop(fdt, node, "reg", &proplen);
+ if ( prop == NULL || proplen != 16 ) {
+ zynqmp_mgmt_uart_context.port = 0;
+ return;
+ }
+ outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
+ outprop[1] = rtems_uint32_from_big_endian((const uint8_t *) &prop[1]);
+ outprop[2] = rtems_uint32_from_big_endian((const uint8_t *) &prop[2]);
+ outprop[3] = rtems_uint32_from_big_endian((const uint8_t *) &prop[3]);
+ zynqmp_mgmt_uart_context.port = ( ( (uint64_t) outprop[0] ) << 32 ) | outprop[1];
+ uintptr_t uart_base = zynqmp_mgmt_uart_context.port;
+ size_t uart_size = ( ( (uint64_t) outprop[2] ) << 32 ) | outprop[3];
+
+ rtems_status_code sc = aarch64_mmu_map( uart_base,
+ uart_size,
+ AARCH64_MMU_DEVICE);
+ if ( sc != RTEMS_SUCCESSFUL ) {
+ zynqmp_mgmt_uart_context.port = 0;
+ return;
+ }
+
+ prop = fdt_getprop(fdt, node, "reg-offset", &proplen);
+ if ( prop == NULL || proplen != 4 ) {
+ zynqmp_mgmt_uart_context.port = 0;
+ return;
+ }
+ outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
+ zynqmp_mgmt_uart_context.port += outprop[0];
+
+ prop = fdt_getprop(fdt, node, "reg-shift", &proplen);
+ if ( prop == NULL || proplen != 4 ) {
+ zynqmp_mgmt_uart_context.port = 0;
+ return;
+ }
+ outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
+ mgmt_uart_reg_shift = outprop[0];
+
+ ns16550_probe(&zynqmp_mgmt_uart_context.base);
+
+ zynqmp_configure_management_console(&zynqmp_mgmt_uart_context.base);
+}
+
+RTEMS_SYSINIT_ITEM(
+ zynqmp_management_console_init,
+ RTEMS_SYSINIT_BSP_START,
+ RTEMS_SYSINIT_ORDER_FIRST
+);
static zynq_uart_context zynqmp_uart_instances[2] = {
{
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ),
- .regs = (volatile struct zynq_uart *) 0xff010000,
+ .regs = (volatile zynq_uart *) ZYNQ_UART_0_BASE_ADDR,
.irq = ZYNQMP_IRQ_UART_0
}, {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ),
- .regs = (volatile struct zynq_uart *) 0xff000000,
+ .regs = (volatile zynq_uart *) ZYNQ_UART_1_BASE_ADDR,
.irq = ZYNQMP_IRQ_UART_1
}
};
@@ -66,6 +207,7 @@ rtems_status_code console_initialize(
rtems_termios_initialize();
for (i = 0; i < RTEMS_ARRAY_SIZE(zynqmp_uart_instances); ++i) {
+ zynq_uart_context *ctx = &zynqmp_uart_instances[i];
char uart[] = "/dev/ttySX";
uart[sizeof(uart) - 2] = (char) ('0' + i);
@@ -73,63 +215,27 @@ rtems_status_code console_initialize(
&uart[0],
&zynq_uart_handler,
NULL,
- &zynqmp_uart_instances[i].base
+ &ctx->base
);
- if (i == BSP_CONSOLE_MINOR) {
+ if (ctx->regs == (zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR) {
link(&uart[0], CONSOLE_DEVICE_NAME);
}
}
+ if ( zynqmp_mgmt_uart_context.port != 0 ) {
+ rtems_termios_device_install(
+ "/dev/ttyMGMT0",
+ &ns16550_handler_interrupt,
+ NULL,
+ &zynqmp_mgmt_uart_context.base
+ );
+ }
+
return RTEMS_SUCCESSFUL;
}
void zynqmp_debug_console_flush(void)
{
- zynq_uart_reset_tx_flush(&zynqmp_uart_instances[BSP_CONSOLE_MINOR]);
-}
-
-static void zynqmp_debug_console_out(char c)
-{
- rtems_termios_device_context *base =
- &zynqmp_uart_instances[BSP_CONSOLE_MINOR].base;
-
- zynq_uart_write_polled(base, c);
-}
-
-static void zynqmp_debug_console_init(void)
-{
- rtems_termios_device_context *base =
- &zynqmp_uart_instances[BSP_CONSOLE_MINOR].base;
-
- zynq_uart_initialize(base);
- BSP_output_char = zynqmp_debug_console_out;
+ zynq_uart_reset_tx_flush((zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR);
}
-
-static void zynqmp_debug_console_early_init(char c)
-{
- rtems_termios_device_context *base =
- &zynqmp_uart_instances[BSP_CONSOLE_MINOR].base;
-
- zynq_uart_initialize(base);
- BSP_output_char = zynqmp_debug_console_out;
- zynqmp_debug_console_out(c);
-}
-
-static int zynqmp_debug_console_in(void)
-{
- rtems_termios_device_context *base =
- &zynqmp_uart_instances[BSP_CONSOLE_MINOR].base;
-
- return zynq_uart_read_polled(base);
-}
-
-BSP_output_char_function_type BSP_output_char = zynqmp_debug_console_early_init;
-
-BSP_polling_getchar_function_type BSP_poll_char = zynqmp_debug_console_in;
-
-RTEMS_SYSINIT_ITEM(
- zynqmp_debug_console_init,
- RTEMS_SYSINIT_BSP_START,
- RTEMS_SYSINIT_ORDER_LAST_BUT_5
-);
diff --git a/bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c b/bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c
new file mode 100644
index 0000000000..0748639256
--- /dev/null
+++ b/bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64XilinxZynqMP
+ *
+ * @brief This source file contains the implementatin of bsp_fdt_get().
+ */
+
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore@oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <bsp.h>
+#include <bsp/fdt.h>
+
+const void *bsp_fdt_get(void)
+{
+ return zynqmp_dtb;
+}
+
+uint32_t bsp_fdt_map_intr(const uint32_t *intr, size_t icells)
+{
+ if (icells != 3) {
+ return 0;
+ }
+ return (intr[0] == 0 ? 32 : 16) + intr[1];
+}
diff --git a/bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts b/bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts
new file mode 100644
index 0000000000..05647e0848
--- /dev/null
+++ b/bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts
@@ -0,0 +1,114 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64XilinxZynqMP
+ *
+ * @brief This file provides the CFC-400X device tree
+ */
+
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore@oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ interrupt-controller@f9010000 {
+ compatible = "arm,gic-400";
+ #address-cells = <0x02>;
+ #interrupt-cells = <0x03>;
+ reg = <0x00 0xf9010000 0x00 0x10000>;
+ interrupt-controller;
+ phandle = <0x01>;
+ };
+
+ ethernet@ff0b0000 {
+ compatible = "cdns,gem";
+ status = "okay";
+ interrupt-parent = <0x01>;
+ interrupts = <0x00 0x39 0x04>;
+ reg = <0x00 0xff0b0000 0x00 0x1000>;
+ phy-mode = "sgmii";
+ ref-clock-num = <0>;
+ };
+
+ ethernet@ff0c0000 {
+ compatible = "cdns,gem";
+ status = "okay";
+ interrupt-parent = <0x01>;
+ interrupts = <0x00 0x3b 0x04>;
+ reg = <0x00 0xff0c0000 0x00 0x1000>;
+ phy-mode = "sgmii";
+ ref-clock-num = <1>;
+ };
+
+ ethernet@ff0d0000 {
+ compatible = "cdns,gem";
+ status = "okay";
+ interrupt-parent = <0x01>;
+ interrupts = <0x00 0x3d 0x04>;
+ reg = <0x00 0xff0d0000 0x00 0x1000>;
+ phy-mode = "sgmii";
+ ref-clock-num = <2>;
+ };
+
+ ethernet@ff0e0000 {
+ compatible = "cdns,gem";
+ status = "okay";
+ interrupt-parent = <0x01>;
+ interrupts = <0x00 0x3f 0x04>;
+ reg = <0x00 0xff0e0000 0x00 0x1000>;
+ phy-mode = "sgmii";
+ ref-clock-num = <3>;
+ };
+
+ serial@800a0000 {
+ clock-frequency = <0x189c000>;
+ compatible = "ns16550a";
+ current-speed = <0x1c200>;
+ device_type = "serial";
+ interrupt-parent = <0x01>;
+ interrupts = <0x00 0x6e 0x04>;
+ reg = <0x00 0x800a0000 0x00 0x10000>;
+ reg-offset = <0x1000>;
+ reg-shift = <0x02>;
+ };
+ };
+
+ aliases {
+ mgmtport = "/amba/serial@800a0000";
+ };
+};
diff --git a/bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c b/bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c
new file mode 100644
index 0000000000..7a45b4f7dd
--- /dev/null
+++ b/bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c
@@ -0,0 +1,130 @@
+unsigned char zynqmp_dtb[] = {
+ 0xd0, 0x0d, 0xfe, 0xed, 0x00, 0x00, 0x05, 0xf1, 0x00, 0x00, 0x00, 0x38,
+ 0x00, 0x00, 0x05, 0x10, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x11,
+ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe1,
+ 0x00, 0x00, 0x04, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x01, 0x61, 0x6d, 0x62, 0x61, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0b, 0x00, 0x00, 0x00, 0x1b,
+ 0x73, 0x69, 0x6d, 0x70, 0x6c, 0x65, 0x2d, 0x62, 0x75, 0x73, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04,
+ 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x26, 0x00, 0x00, 0x00, 0x01,
+ 0x69, 0x6e, 0x74, 0x65, 0x72, 0x72, 0x75, 0x70, 0x74, 0x2d, 0x63, 0x6f,
+ 0x6e, 0x74, 0x72, 0x6f, 0x6c, 0x6c, 0x65, 0x72, 0x40, 0x66, 0x39, 0x30,
+ 0x31, 0x30, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x1b, 0x61, 0x72, 0x6d, 0x2c,
+ 0x67, 0x69, 0x63, 0x2d, 0x34, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x2d,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x10,
+ 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0xf9, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x42, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x57, 0x00, 0x00, 0x00, 0x01,
+ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x65, 0x74, 0x68, 0x65,
+ 0x72, 0x6e, 0x65, 0x74, 0x40, 0x66, 0x66, 0x30, 0x62, 0x30, 0x30, 0x30,
+ 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x09,
+ 0x00, 0x00, 0x00, 0x1b, 0x63, 0x64, 0x6e, 0x73, 0x2c, 0x67, 0x65, 0x6d,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x05,
+ 0x00, 0x00, 0x00, 0x5f, 0x6f, 0x6b, 0x61, 0x79, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x66,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0c,
+ 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x39,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x10,
+ 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0b, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x82, 0x73, 0x67, 0x6d, 0x69,
+ 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04,
+ 0x00, 0x00, 0x00, 0x8b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x01, 0x65, 0x74, 0x68, 0x65, 0x72, 0x6e, 0x65, 0x74,
+ 0x40, 0x66, 0x66, 0x30, 0x63, 0x30, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x1b,
+ 0x63, 0x64, 0x6e, 0x73, 0x2c, 0x67, 0x65, 0x6d, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x5f,
+ 0x6f, 0x6b, 0x61, 0x79, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00, 0x01,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x77,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3b, 0x00, 0x00, 0x00, 0x04,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x3e,
+ 0x00, 0x00, 0x00, 0x00, 0xff, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x06,
+ 0x00, 0x00, 0x00, 0x82, 0x73, 0x67, 0x6d, 0x69, 0x69, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x8b,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01,
+ 0x65, 0x74, 0x68, 0x65, 0x72, 0x6e, 0x65, 0x74, 0x40, 0x66, 0x66, 0x30,
+ 0x64, 0x30, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x1b, 0x63, 0x64, 0x6e, 0x73,
+ 0x2c, 0x67, 0x65, 0x6d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x5f, 0x6f, 0x6b, 0x61, 0x79,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04,
+ 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x3d, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00,
+ 0xff, 0x0d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x82,
+ 0x73, 0x67, 0x6d, 0x69, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x8b, 0x00, 0x00, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x65, 0x74, 0x68, 0x65,
+ 0x72, 0x6e, 0x65, 0x74, 0x40, 0x66, 0x66, 0x30, 0x65, 0x30, 0x30, 0x30,
+ 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x09,
+ 0x00, 0x00, 0x00, 0x1b, 0x63, 0x64, 0x6e, 0x73, 0x2c, 0x67, 0x65, 0x6d,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x05,
+ 0x00, 0x00, 0x00, 0x5f, 0x6f, 0x6b, 0x61, 0x79, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x66,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0c,
+ 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x10,
+ 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0e, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x82, 0x73, 0x67, 0x6d, 0x69,
+ 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04,
+ 0x00, 0x00, 0x00, 0x8b, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x01, 0x73, 0x65, 0x72, 0x69, 0x61, 0x6c, 0x40, 0x38,
+ 0x30, 0x30, 0x61, 0x30, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x99, 0x01, 0x89, 0xc0, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x1b,
+ 0x6e, 0x73, 0x31, 0x36, 0x35, 0x35, 0x30, 0x61, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xa9,
+ 0x00, 0x01, 0xc2, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x07,
+ 0x00, 0x00, 0x00, 0xb7, 0x73, 0x65, 0x72, 0x69, 0x61, 0x6c, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x66,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0c,
+ 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6e,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x10,
+ 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0a, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xc3, 0x00, 0x00, 0x10, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xce,
+ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x01, 0x61, 0x6c, 0x69, 0x61, 0x73, 0x65, 0x73, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0xd8,
+ 0x2f, 0x61, 0x6d, 0x62, 0x61, 0x2f, 0x73, 0x65, 0x72, 0x69, 0x61, 0x6c,
+ 0x40, 0x38, 0x30, 0x30, 0x61, 0x30, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x09,
+ 0x23, 0x61, 0x64, 0x64, 0x72, 0x65, 0x73, 0x73, 0x2d, 0x63, 0x65, 0x6c,
+ 0x6c, 0x73, 0x00, 0x23, 0x73, 0x69, 0x7a, 0x65, 0x2d, 0x63, 0x65, 0x6c,
+ 0x6c, 0x73, 0x00, 0x63, 0x6f, 0x6d, 0x70, 0x61, 0x74, 0x69, 0x62, 0x6c,
+ 0x65, 0x00, 0x72, 0x61, 0x6e, 0x67, 0x65, 0x73, 0x00, 0x23, 0x69, 0x6e,
+ 0x74, 0x65, 0x72, 0x72, 0x75, 0x70, 0x74, 0x2d, 0x63, 0x65, 0x6c, 0x6c,
+ 0x73, 0x00, 0x72, 0x65, 0x67, 0x00, 0x69, 0x6e, 0x74, 0x65, 0x72, 0x72,
+ 0x75, 0x70, 0x74, 0x2d, 0x63, 0x6f, 0x6e, 0x74, 0x72, 0x6f, 0x6c, 0x6c,
+ 0x65, 0x72, 0x00, 0x70, 0x68, 0x61, 0x6e, 0x64, 0x6c, 0x65, 0x00, 0x73,
+ 0x74, 0x61, 0x74, 0x75, 0x73, 0x00, 0x69, 0x6e, 0x74, 0x65, 0x72, 0x72,
+ 0x75, 0x70, 0x74, 0x2d, 0x70, 0x61, 0x72, 0x65, 0x6e, 0x74, 0x00, 0x69,
+ 0x6e, 0x74, 0x65, 0x72, 0x72, 0x75, 0x70, 0x74, 0x73, 0x00, 0x70, 0x68,
+ 0x79, 0x2d, 0x6d, 0x6f, 0x64, 0x65, 0x00, 0x72, 0x65, 0x66, 0x2d, 0x63,
+ 0x6c, 0x6f, 0x63, 0x6b, 0x2d, 0x6e, 0x75, 0x6d, 0x00, 0x63, 0x6c, 0x6f,
+ 0x63, 0x6b, 0x2d, 0x66, 0x72, 0x65, 0x71, 0x75, 0x65, 0x6e, 0x63, 0x79,
+ 0x00, 0x63, 0x75, 0x72, 0x72, 0x65, 0x6e, 0x74, 0x2d, 0x73, 0x70, 0x65,
+ 0x65, 0x64, 0x00, 0x64, 0x65, 0x76, 0x69, 0x63, 0x65, 0x5f, 0x74, 0x79,
+ 0x70, 0x65, 0x00, 0x72, 0x65, 0x67, 0x2d, 0x6f, 0x66, 0x66, 0x73, 0x65,
+ 0x74, 0x00, 0x72, 0x65, 0x67, 0x2d, 0x73, 0x68, 0x69, 0x66, 0x74, 0x00,
+ 0x6d, 0x67, 0x6d, 0x74, 0x70, 0x6f, 0x72, 0x74, 0x00
+};
+unsigned int zynqmp_dtb_len = 1521;
diff --git a/bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts b/bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts
new file mode 100644
index 0000000000..ec13563072
--- /dev/null
+++ b/bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts
@@ -0,0 +1,98 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64XilinxZynqMP
+ *
+ * @brief This file provides the base ZynqMP device tree
+ */
+
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore@oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ interrupt-controller@f9010000 {
+ compatible = "arm,gic-400";
+ #address-cells = <0x02>;
+ #interrupt-cells = <0x03>;
+ reg = <0x00 0xf9010000 0x00 0x10000>;
+ interrupt-controller;
+ phandle = <0x01>;
+ };
+
+ ethernet@ff0b0000 {
+ compatible = "cdns,gem";
+ status = "okay";
+ interrupt-parent = <0x01>;
+ interrupts = <0x00 0x39 0x04>;
+ reg = <0x00 0xff0b0000 0x00 0x1000>;
+ phy-mode = "rgmii-id";
+ ref-clock-num = <0>;
+ };
+
+ ethernet@ff0c0000 {
+ compatible = "cdns,gem";
+ status = "okay";
+ interrupt-parent = <0x01>;
+ interrupts = <0x00 0x3b 0x04>;
+ reg = <0x00 0xff0c0000 0x00 0x1000>;
+ phy-mode = "rgmii-id";
+ ref-clock-num = <1>;
+ };
+
+ ethernet@ff0d0000 {
+ compatible = "cdns,gem";
+ status = "okay";
+ interrupt-parent = <0x01>;
+ interrupts = <0x00 0x3d 0x04>;
+ reg = <0x00 0xff0d0000 0x00 0x1000>;
+ phy-mode = "rgmii-id";
+ ref-clock-num = <2>;
+ };
+
+ ethernet@ff0e0000 {
+ compatible = "cdns,gem";
+ status = "okay";
+ interrupt-parent = <0x01>;
+ interrupts = <0x00 0x3f 0x04>;
+ reg = <0x00 0xff0e0000 0x00 0x1000>;
+ phy-mode = "rgmii-id";
+ ref-clock-num = <3>;
+ };
+ };
+};
diff --git a/bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c b/bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c
new file mode 100644
index 0000000000..677dca3ea4
--- /dev/null
+++ b/bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c
@@ -0,0 +1,105 @@
+unsigned char zynqmp_dtb[] = {
+ 0xd0, 0x0d, 0xfe, 0xed, 0x00, 0x00, 0x04, 0xbd, 0x00, 0x00, 0x00, 0x38,
+ 0x00, 0x00, 0x04, 0x24, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x11,
+ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x99,
+ 0x00, 0x00, 0x03, 0xec, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x01, 0x61, 0x6d, 0x62, 0x61, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0b, 0x00, 0x00, 0x00, 0x1b,
+ 0x73, 0x69, 0x6d, 0x70, 0x6c, 0x65, 0x2d, 0x62, 0x75, 0x73, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04,
+ 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x26, 0x00, 0x00, 0x00, 0x01,
+ 0x69, 0x6e, 0x74, 0x65, 0x72, 0x72, 0x75, 0x70, 0x74, 0x2d, 0x63, 0x6f,
+ 0x6e, 0x74, 0x72, 0x6f, 0x6c, 0x6c, 0x65, 0x72, 0x40, 0x66, 0x39, 0x30,
+ 0x31, 0x30, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x1b, 0x61, 0x72, 0x6d, 0x2c,
+ 0x67, 0x69, 0x63, 0x2d, 0x34, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x2d,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x10,
+ 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0xf9, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x42, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x57, 0x00, 0x00, 0x00, 0x01,
+ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x65, 0x74, 0x68, 0x65,
+ 0x72, 0x6e, 0x65, 0x74, 0x40, 0x66, 0x66, 0x30, 0x62, 0x30, 0x30, 0x30,
+ 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x09,
+ 0x00, 0x00, 0x00, 0x1b, 0x63, 0x64, 0x6e, 0x73, 0x2c, 0x67, 0x65, 0x6d,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x05,
+ 0x00, 0x00, 0x00, 0x5f, 0x6f, 0x6b, 0x61, 0x79, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x66,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0c,
+ 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x39,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x10,
+ 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0b, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x82, 0x72, 0x67, 0x6d, 0x69,
+ 0x69, 0x2d, 0x69, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x8b, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x65, 0x74, 0x68, 0x65,
+ 0x72, 0x6e, 0x65, 0x74, 0x40, 0x66, 0x66, 0x30, 0x63, 0x30, 0x30, 0x30,
+ 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x09,
+ 0x00, 0x00, 0x00, 0x1b, 0x63, 0x64, 0x6e, 0x73, 0x2c, 0x67, 0x65, 0x6d,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x05,
+ 0x00, 0x00, 0x00, 0x5f, 0x6f, 0x6b, 0x61, 0x79, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x66,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0c,
+ 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3b,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x10,
+ 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0c, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x82, 0x72, 0x67, 0x6d, 0x69,
+ 0x69, 0x2d, 0x69, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x8b, 0x00, 0x00, 0x00, 0x01,
+ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x65, 0x74, 0x68, 0x65,
+ 0x72, 0x6e, 0x65, 0x74, 0x40, 0x66, 0x66, 0x30, 0x64, 0x30, 0x30, 0x30,
+ 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x09,
+ 0x00, 0x00, 0x00, 0x1b, 0x63, 0x64, 0x6e, 0x73, 0x2c, 0x67, 0x65, 0x6d,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x05,
+ 0x00, 0x00, 0x00, 0x5f, 0x6f, 0x6b, 0x61, 0x79, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x66,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0c,
+ 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3d,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x10,
+ 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0d, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x82, 0x72, 0x67, 0x6d, 0x69,
+ 0x69, 0x2d, 0x69, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x8b, 0x00, 0x00, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x65, 0x74, 0x68, 0x65,
+ 0x72, 0x6e, 0x65, 0x74, 0x40, 0x66, 0x66, 0x30, 0x65, 0x30, 0x30, 0x30,
+ 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x09,
+ 0x00, 0x00, 0x00, 0x1b, 0x63, 0x64, 0x6e, 0x73, 0x2c, 0x67, 0x65, 0x6d,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x05,
+ 0x00, 0x00, 0x00, 0x5f, 0x6f, 0x6b, 0x61, 0x79, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x66,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0c,
+ 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x10,
+ 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0e, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x82, 0x72, 0x67, 0x6d, 0x69,
+ 0x69, 0x2d, 0x69, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x8b, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x09, 0x23, 0x61, 0x64, 0x64, 0x72, 0x65, 0x73, 0x73,
+ 0x2d, 0x63, 0x65, 0x6c, 0x6c, 0x73, 0x00, 0x23, 0x73, 0x69, 0x7a, 0x65,
+ 0x2d, 0x63, 0x65, 0x6c, 0x6c, 0x73, 0x00, 0x63, 0x6f, 0x6d, 0x70, 0x61,
+ 0x74, 0x69, 0x62, 0x6c, 0x65, 0x00, 0x72, 0x61, 0x6e, 0x67, 0x65, 0x73,
+ 0x00, 0x23, 0x69, 0x6e, 0x74, 0x65, 0x72, 0x72, 0x75, 0x70, 0x74, 0x2d,
+ 0x63, 0x65, 0x6c, 0x6c, 0x73, 0x00, 0x72, 0x65, 0x67, 0x00, 0x69, 0x6e,
+ 0x74, 0x65, 0x72, 0x72, 0x75, 0x70, 0x74, 0x2d, 0x63, 0x6f, 0x6e, 0x74,
+ 0x72, 0x6f, 0x6c, 0x6c, 0x65, 0x72, 0x00, 0x70, 0x68, 0x61, 0x6e, 0x64,
+ 0x6c, 0x65, 0x00, 0x73, 0x74, 0x61, 0x74, 0x75, 0x73, 0x00, 0x69, 0x6e,
+ 0x74, 0x65, 0x72, 0x72, 0x75, 0x70, 0x74, 0x2d, 0x70, 0x61, 0x72, 0x65,
+ 0x6e, 0x74, 0x00, 0x69, 0x6e, 0x74, 0x65, 0x72, 0x72, 0x75, 0x70, 0x74,
+ 0x73, 0x00, 0x70, 0x68, 0x79, 0x2d, 0x6d, 0x6f, 0x64, 0x65, 0x00, 0x72,
+ 0x65, 0x66, 0x2d, 0x63, 0x6c, 0x6f, 0x63, 0x6b, 0x2d, 0x6e, 0x75, 0x6d,
+ 0x00
+};
+unsigned int zynqmp_dtb_len = 1213;
diff --git a/bsps/aarch64/xilinx-zynqmp/include/bsp.h b/bsps/aarch64/xilinx-zynqmp/include/bsp.h
index 6d49b9ad2a..38a9fad768 100644
--- a/bsps/aarch64/xilinx-zynqmp/include/bsp.h
+++ b/bsps/aarch64/xilinx-zynqmp/include/bsp.h
@@ -45,12 +45,17 @@
#include <bspopts.h>
+#define BSP_FEATURE_IRQ_EXTENSION
+
#ifndef ASM
#include <bsp/default-initial-extension.h>
#include <bsp/start.h>
#include <rtems.h>
+#include <rtems/termiostypes.h>
+
+#include <dev/serial/zynq-uart-zynqmp.h>
#ifdef __cplusplus
extern "C" {
@@ -60,6 +65,13 @@ extern "C" {
#define BSP_ARM_GIC_DIST_BASE 0xf9010000
#define BSP_RESET_SMC
+#define BSP_CPU_ON_USES_SMC
+
+#define BSP_FDT_IS_SUPPORTED
+extern unsigned int zynqmp_dtb_len;
+extern unsigned char zynqmp_dtb[];
+
+#define NANDPSU_BASEADDR 0xFF100000
/**
* @brief Zynq UltraScale+ MPSoC specific set up of the MMU.
@@ -68,12 +80,30 @@ extern "C" {
*/
BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void);
+/**
+ * @brief Zynq UltraScale+ MPSoC specific set up of the MMU for non-primary
+ * cores.
+ *
+ * Provide in the application to override the defaults in the BSP.
+ */
+BSP_START_TEXT_SECTION void zynqmp_setup_secondary_cpu_mmu_and_cache( void );
+
void zynqmp_debug_console_flush(void);
uint32_t zynqmp_clock_i2c0(void);
uint32_t zynqmp_clock_i2c1(void);
+/**
+ * @brief Zynq UltraScale+ MPSoC specific set up of a management console.
+ *
+ * Some systems may have a management interface which needs special
+ * initialization. Provide in the application to override the defaults in the
+ * BSP. This will only be called if the interface is found in the device tree.
+ */
+__attribute__ ((weak))
+void zynqmp_configure_management_console(rtems_termios_device_context *base);
+
#ifdef __cplusplus
}
#endif /* __cplusplus */
diff --git a/bsps/aarch64/xilinx-zynqmp/include/bsp/i2c.h b/bsps/aarch64/xilinx-zynqmp/include/bsp/i2c.h
index a83d9ed467..f79006b94c 100644
--- a/bsps/aarch64/xilinx-zynqmp/include/bsp/i2c.h
+++ b/bsps/aarch64/xilinx-zynqmp/include/bsp/i2c.h
@@ -2,7 +2,7 @@
* SPDX-License-Identifier: BSD-2-Clause
*
* Copyright (C) 2021 On-Line Applications Research (OAR)
- * Copyright (C) 2014 embedded brains GmbH
+ * Copyright (C) 2014 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
diff --git a/bsps/aarch64/xilinx-zynqmp/include/bsp/irq.h b/bsps/aarch64/xilinx-zynqmp/include/bsp/irq.h
index 9af41643bd..024fd0d89a 100644
--- a/bsps/aarch64/xilinx-zynqmp/include/bsp/irq.h
+++ b/bsps/aarch64/xilinx-zynqmp/include/bsp/irq.h
@@ -48,15 +48,16 @@
extern "C" {
#endif /* __cplusplus */
-#define BSP_INTERRUPT_VECTOR_COUNT 1024
+#define BSP_INTERRUPT_VECTOR_COUNT 192
/* Interrupts vectors */
#define BSP_TIMER_VIRT_PPI 27
#define BSP_TIMER_PHYS_NS_PPI 30
+#define ZYNQMP_IRQ_QSPI 47
#define ZYNQMP_IRQ_I2C_0 49
#define ZYNQMP_IRQ_I2C_1 50
-#define ZYNQMP_IRQ_UART_0 54
-#define ZYNQMP_IRQ_UART_1 53
+#define ZYNQMP_IRQ_UART_0 53
+#define ZYNQMP_IRQ_UART_1 54
#define ZYNQMP_IRQ_ETHERNET_0 89
#define ZYNQMP_IRQ_ETHERNET_1 91
#define ZYNQMP_IRQ_ETHERNET_2 93
diff --git a/bsps/aarch64/xilinx-zynqmp/include/bsp/jffs2_xnandpsu.h b/bsps/aarch64/xilinx-zynqmp/include/bsp/jffs2_xnandpsu.h
new file mode 100644
index 0000000000..6b55e50b2b
--- /dev/null
+++ b/bsps/aarch64/xilinx-zynqmp/include/bsp/jffs2_xnandpsu.h
@@ -0,0 +1,56 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_XILINX_ZYNQMP_JFFS2_XNANDPSU_H
+#define LIBBSP_XILINX_ZYNQMP_JFFS2_XNANDPSU_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif /* __cplusplus */
+
+#include <dev/nand/xnandpsu.h>
+#include <rtems/jffs2.h>
+
+/**
+ * @brief Mount JFFS2 filesystem on NAND device.
+ *
+ * @param[in] mount_dir The directory to mount the filesystem at.
+ * @param[in] NandPsuInstancePtr A pointer to an initialized NAND instance.
+ *
+ * @retval 0 Successful operation. Negative number otherwise.
+ */
+int xilinx_zynqmp_nand_jffs2_initialize(
+ const char *mount_dir,
+ XNandPsu *NandPsuInstancePtr
+);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_XILINX_ZYNQMP_JFFS2_XNANDPSU_H */
diff --git a/bsps/aarch64/xilinx-zynqmp/include/bsp/jffs2_xqspipsu.h b/bsps/aarch64/xilinx-zynqmp/include/bsp/jffs2_xqspipsu.h
new file mode 100644
index 0000000000..5f05308a1f
--- /dev/null
+++ b/bsps/aarch64/xilinx-zynqmp/include/bsp/jffs2_xqspipsu.h
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64XilinxZynqMP
+ *
+ * @brief XilinxZynqMP QSPI JFFS2 flash driver definitions
+ */
+
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_XILINX_ZYNQMP_JFFS2_XQSPIPSU_H
+#define LIBBSP_XILINX_ZYNQMP_JFFS2_XQSPIPSU_H
+
+#include <dev/spi/xqspipsu.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * @brief Mount jffs2 filesystem.
+ *
+ * @param[in] mount_dir The directory to mount the filesystem at.
+ * @param[in] qspipsu_ptr A pointer to an initialized QSPI instance.
+ *
+ * @retval 0 Successful operation. Negative number otherwise.
+ */
+int xilinx_zynqmp_nor_jffs2_initialize(
+ const char *mount_dir,
+ XQspiPsu *qspipsu_ptr
+);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_XILINX_ZYNQMP_JFFS2_XQSPIPSU_H */
diff --git a/bsps/aarch64/xilinx-zynqmp/jffs2_xnandpsu.c b/bsps/aarch64/xilinx-zynqmp/jffs2_xnandpsu.c
new file mode 100644
index 0000000000..3fa70cc0c3
--- /dev/null
+++ b/bsps/aarch64/xilinx-zynqmp/jffs2_xnandpsu.c
@@ -0,0 +1,375 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file contains an implementation of a basic JFFS2 filesystem adapter for
+ * the NandPsu peripheral that uses the entirety of the available NAND chip(s)
+ * for a JFFS2 filesystem or up to the maximum size possible. If an
+ * implementation would prefer to only use a portion of the NAND flash chip,
+ * this template would need rework to account for a reduced size and possibly a
+ * start offset while also taking into account the driver's handling of bad
+ * blocks and how that might affect the offset.
+ */
+
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <string.h>
+#include <assert.h>
+#include <errno.h>
+#include <stdlib.h>
+
+#include <bsp/jffs2_xnandpsu.h>
+#include <rtems/libio.h>
+#include <rtems/libcsupport.h>
+#include <rtems/malloc.h>
+#include <rtems/thread.h>
+#include <dev/nand/xnandpsu_bbm.h>
+
+typedef struct {
+ rtems_jffs2_flash_control super;
+ XNandPsu *nandpsu;
+ rtems_mutex access_lock;
+} flash_control;
+
+static flash_control *get_flash_control(rtems_jffs2_flash_control *super)
+{
+ return (flash_control *) super;
+}
+
+static int flash_read(
+ rtems_jffs2_flash_control *super,
+ uint32_t offset,
+ unsigned char *buffer,
+ size_t size_of_buffer
+)
+{
+ XNandPsu *nandpsu = get_flash_control(super)->nandpsu;
+ rtems_status_code sc;
+
+ rtems_mutex_lock(&(get_flash_control(super)->access_lock));
+ sc = XNandPsu_Read(nandpsu, offset, size_of_buffer, buffer);
+ rtems_mutex_unlock(&(get_flash_control(super)->access_lock));
+ if (sc) {
+ return -EIO;
+ }
+ return 0;
+}
+
+static int flash_write(
+ rtems_jffs2_flash_control *super,
+ uint32_t offset,
+ const unsigned char *buffer,
+ size_t size_of_buffer
+)
+{
+ XNandPsu *nandpsu = get_flash_control(super)->nandpsu;
+ rtems_status_code sc;
+
+ rtems_mutex_lock(&(get_flash_control(super)->access_lock));
+ sc = XNandPsu_Write(nandpsu, offset, size_of_buffer, (void *)buffer);
+ rtems_mutex_unlock(&(get_flash_control(super)->access_lock));
+ if (sc) {
+ return -EIO;
+ }
+ return 0;
+}
+
+static int flash_erase(
+ rtems_jffs2_flash_control *super,
+ uint32_t offset
+)
+{
+ XNandPsu *nandpsu = get_flash_control(super)->nandpsu;
+ rtems_status_code sc;
+ uint64_t BlockSize = nandpsu->Geometry.BlockSize;
+
+ if (offset > nandpsu->Geometry.DeviceSize) {
+ return -EIO;
+ }
+
+ /* Perform erase operation. */
+ rtems_mutex_lock(&(get_flash_control(super)->access_lock));
+ sc = XNandPsu_Erase(nandpsu, RTEMS_ALIGN_DOWN(offset, BlockSize), BlockSize);
+ rtems_mutex_unlock(&(get_flash_control(super)->access_lock));
+ if (sc ) {
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int flash_block_is_bad(
+ rtems_jffs2_flash_control *super,
+ uint32_t offset,
+ bool *bad
+)
+{
+ XNandPsu *nandpsu = get_flash_control(super)->nandpsu;
+ uint32_t BlockIndex;
+ uint8_t BlockData;
+ uint8_t BlockShift;
+ uint8_t BlockType;
+ uint32_t BlockOffset;
+
+ assert(bad);
+
+ if (offset > nandpsu->Geometry.DeviceSize) {
+ return -EIO;
+ }
+
+ *bad = true;
+
+ BlockIndex = offset / nandpsu->Geometry.BlockSize;
+
+ rtems_mutex_lock(&(get_flash_control(super)->access_lock));
+
+ /* XNandPsu_IsBlockBad() is insufficient for this use case */
+ BlockOffset = BlockIndex >> XNANDPSU_BBT_BLOCK_SHIFT;
+ BlockShift = XNandPsu_BbtBlockShift(BlockIndex);
+ BlockData = nandpsu->Bbt[BlockOffset];
+ BlockType = (BlockData >> BlockShift) & XNANDPSU_BLOCK_TYPE_MASK;
+
+ if (BlockType == XNANDPSU_BLOCK_GOOD) {
+ *bad = false;
+ }
+
+ int TargetBlockIndex = BlockIndex % nandpsu->Geometry.NumTargetBlocks;
+ /* The last 4 blocks of every device target are reserved for the BBT */
+ if (nandpsu->Geometry.NumTargetBlocks - TargetBlockIndex <= 4) {
+ *bad = true;
+ }
+
+ rtems_mutex_unlock(&(get_flash_control(super)->access_lock));
+ return 0;
+}
+
+static int flash_block_mark_bad(
+ rtems_jffs2_flash_control *super,
+ uint32_t offset
+)
+{
+ rtems_status_code sc;
+ XNandPsu *nandpsu = get_flash_control(super)->nandpsu;
+ uint32_t BlockIndex;
+
+ if (offset > nandpsu->Geometry.DeviceSize) {
+ return -EIO;
+ }
+
+ BlockIndex = offset / nandpsu->Geometry.BlockSize;
+
+ rtems_mutex_lock(&(get_flash_control(super)->access_lock));
+ sc = XNandPsu_MarkBlockBad(nandpsu, BlockIndex);
+ rtems_mutex_unlock(&(get_flash_control(super)->access_lock));
+ if ( sc != XST_SUCCESS ) {
+ return -EIO;
+ }
+ return RTEMS_SUCCESSFUL;
+}
+
+static int flash_read_oob_locked(
+ rtems_jffs2_flash_control *super,
+ uint32_t offset,
+ uint8_t *oobbuf,
+ uint32_t ooblen
+)
+{
+ uint8_t *spare_bytes;
+ XNandPsu *nandpsu = get_flash_control(super)->nandpsu;
+ uint32_t SpareBytesPerPage = nandpsu->Geometry.SpareBytesPerPage;
+
+ if (offset > nandpsu->Geometry.DeviceSize) {
+ return -EIO;
+ }
+
+ /* Can't request more spare bytes than exist */
+ if (ooblen > SpareBytesPerPage * nandpsu->Geometry.PagesPerBlock) {
+ return -EIO;
+ }
+
+ /* Get page index */
+ uint32_t PageIndex = offset / nandpsu->Geometry.BytesPerPage;
+
+ spare_bytes = rtems_malloc(SpareBytesPerPage);
+ if (spare_bytes == NULL) {
+ return -ENOMEM;
+ }
+
+ while (ooblen) {
+ int rv = XNandPsu_ReadSpareBytes(nandpsu, PageIndex, spare_bytes);
+ /* no guarantee oobbuf can hold all of spare bytes, so read and then copy */
+ uint32_t readlen = SpareBytesPerPage;
+ if (ooblen < readlen) {
+ readlen = ooblen;
+ }
+
+ if (rv) {
+ free(spare_bytes);
+ return -EIO;
+ }
+
+ memcpy(oobbuf, spare_bytes, readlen);
+
+ PageIndex++;
+ ooblen -= readlen;
+ oobbuf += readlen;
+ }
+ free(spare_bytes);
+ return RTEMS_SUCCESSFUL;
+}
+
+static int flash_read_oob(
+ rtems_jffs2_flash_control *super,
+ uint32_t offset,
+ uint8_t *oobbuf,
+ uint32_t ooblen
+)
+{
+ rtems_mutex_lock(&(get_flash_control(super)->access_lock));
+ int ret = flash_read_oob_locked(super, offset, oobbuf, ooblen);
+ rtems_mutex_unlock(&(get_flash_control(super)->access_lock));
+ return ret;
+}
+
+static int flash_write_oob(
+ rtems_jffs2_flash_control *super,
+ uint32_t offset,
+ uint8_t *oobbuf,
+ uint32_t ooblen
+)
+{
+ rtems_status_code sc;
+ uint8_t *spare_bytes;
+ uint8_t *buffer = oobbuf;
+ XNandPsu *nandpsu = get_flash_control(super)->nandpsu;
+ uint32_t SpareBytesPerPage = nandpsu->Geometry.SpareBytesPerPage;
+
+ if (offset > nandpsu->Geometry.DeviceSize) {
+ return -EIO;
+ }
+
+ /* Writing a page spare area to large will result in ignored data. */
+ if (ooblen > SpareBytesPerPage) {
+ return -EIO;
+ }
+
+ spare_bytes = rtems_malloc(SpareBytesPerPage);
+ if (spare_bytes == NULL) {
+ return -ENOMEM;
+ }
+
+ /* Writing a page spare area to small will result in invalid accesses */
+ rtems_mutex_lock(&(get_flash_control(super)->access_lock));
+ if (ooblen < SpareBytesPerPage) {
+ int rv = flash_read_oob_locked(super, offset, spare_bytes, SpareBytesPerPage);
+ if (rv) {
+ free(spare_bytes);
+ rtems_mutex_unlock(&(get_flash_control(super)->access_lock));
+ return rv;
+ }
+ buffer = spare_bytes;
+ memcpy(buffer, oobbuf, ooblen);
+ }
+
+ /* Get page index */
+ uint32_t PageIndex = offset / nandpsu->Geometry.BytesPerPage;
+
+ sc = XNandPsu_WriteSpareBytes(nandpsu, PageIndex, buffer);
+ rtems_mutex_unlock(&(get_flash_control(super)->access_lock));
+ free(spare_bytes);
+
+ if ( sc != XST_SUCCESS ) {
+ return -EIO;
+ }
+ return RTEMS_SUCCESSFUL;
+}
+
+static uint32_t flash_get_oob_size(
+ rtems_jffs2_flash_control *super
+)
+{
+ flash_control *self = get_flash_control(super);
+
+ return self->nandpsu->Geometry.SpareBytesPerPage;
+}
+
+static flash_control flash_instance = {
+ .super = {
+ .read = flash_read,
+ .write = flash_write,
+ .erase = flash_erase,
+ .block_is_bad = flash_block_is_bad,
+ .block_mark_bad = flash_block_mark_bad,
+ .oob_read = flash_read_oob,
+ .oob_write = flash_write_oob,
+ .get_oob_size = flash_get_oob_size,
+ }
+};
+
+static rtems_jffs2_compressor_control compressor_instance = {
+ .compress = rtems_jffs2_compressor_rtime_compress,
+ .decompress = rtems_jffs2_compressor_rtime_decompress
+};
+
+static rtems_jffs2_mount_data mount_data;
+
+int xilinx_zynqmp_nand_jffs2_initialize(
+ const char *mount_dir,
+ XNandPsu *NandInstPtr
+)
+{
+ flash_instance.super.block_size = NandInstPtr->Geometry.BlockSize;
+
+ uint64_t max_size = 0x100000000LU - flash_instance.super.block_size;
+
+ /* JFFS2 maximum FS size is one block less than 4GB */
+ if (NandInstPtr->Geometry.DeviceSize > max_size) {
+ flash_instance.super.flash_size = max_size;
+ } else {
+ flash_instance.super.flash_size = NandInstPtr->Geometry.DeviceSize;
+ }
+
+ flash_instance.super.write_size = NandInstPtr->Geometry.BytesPerPage;
+ flash_instance.nandpsu = NandInstPtr;
+ rtems_mutex_init(&flash_instance.access_lock, "XNandPsu JFFS2 adapter lock");
+ mount_data.flash_control = &flash_instance.super;
+ mount_data.compressor_control = &compressor_instance;
+
+ int rv = 0;
+ rv = mount(
+ NULL,
+ mount_dir,
+ RTEMS_FILESYSTEM_TYPE_JFFS2,
+ RTEMS_FILESYSTEM_READ_WRITE,
+ &mount_data
+ );
+ if ( rv != 0 ) {
+ return rv;
+ }
+
+ return 0;
+}
diff --git a/bsps/aarch64/xilinx-zynqmp/jffs2_xqspipsu.c b/bsps/aarch64/xilinx-zynqmp/jffs2_xqspipsu.c
new file mode 100644
index 0000000000..70d954550d
--- /dev/null
+++ b/bsps/aarch64/xilinx-zynqmp/jffs2_xqspipsu.c
@@ -0,0 +1,186 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <string.h>
+
+#include <bsp/irq.h>
+#include <bsp/jffs2_xqspipsu.h>
+#include <rtems/jffs2.h>
+#include <rtems/libio.h>
+#include <xqspipsu-flash-helper.h>
+
+typedef struct {
+ rtems_jffs2_flash_control super;
+ XQspiPsu *qspipsu;
+} flash_control;
+
+#define FLASH_DEVICE_ID 0xbb20 /* Type: 0xbb, Capacity: 0x20 */
+
+static flash_control *get_flash_control( rtems_jffs2_flash_control *super )
+{
+ return (flash_control *) super;
+}
+
+static int do_read(
+ rtems_jffs2_flash_control *super,
+ uint32_t offset,
+ unsigned char *buffer,
+ size_t size_of_buffer
+)
+{
+ int Status;
+
+ flash_control *self = get_flash_control( super );
+ XQspiPsu *QspiPsuPtr = self->qspipsu;
+ u8* ReadBuffer = NULL;
+
+ Status = QspiPsu_NOR_Read(
+ QspiPsuPtr,
+ offset,
+ size_of_buffer,
+ &ReadBuffer
+ );
+ if ( Status != XST_SUCCESS ) {
+ return Status;
+ }
+
+ /*
+ * We have to copy since we can't be sure that buffer is properly aligned.
+ */
+ memcpy( buffer, ReadBuffer, size_of_buffer );
+
+ return 0;
+}
+
+static int do_write(
+ rtems_jffs2_flash_control *super,
+ uint32_t offset,
+ const unsigned char *buffer,
+ size_t size_of_buffer
+)
+{
+ int Status;
+
+ flash_control *self = get_flash_control( super );
+ XQspiPsu *QspiPsuPtr = self->qspipsu;
+
+ Status = QspiPsu_NOR_Write(
+ QspiPsuPtr,
+ offset,
+ size_of_buffer,
+ (unsigned char *) buffer
+ );
+ if ( Status != XST_SUCCESS ) {
+ return Status;
+ }
+
+ return 0;
+}
+
+static int do_erase(
+ rtems_jffs2_flash_control *super,
+ uint32_t offset
+)
+{
+ int Status;
+
+ flash_control *self = get_flash_control( super );
+ XQspiPsu *QspiPsuPtr = self->qspipsu;
+
+ Status = QspiPsu_NOR_Erase(
+ QspiPsuPtr,
+ offset,
+ super->block_size
+ );
+ if ( Status != XST_SUCCESS ) {
+ return Status;
+ }
+
+ return 0;
+}
+
+static void do_destroy( rtems_jffs2_flash_control *super )
+{
+ flash_control *self = get_flash_control( super );
+
+ rtems_interrupt_handler_remove(
+ ZYNQMP_IRQ_QSPI,
+ (rtems_interrupt_handler) XQspiPsu_InterruptHandler,
+ self->qspipsu
+ );
+}
+
+static flash_control flash_instance = {
+ .super = {
+ .read = do_read,
+ .write = do_write,
+ .erase = do_erase,
+ .destroy = do_destroy,
+ .device_identifier = FLASH_DEVICE_ID
+ }
+};
+
+static rtems_jffs2_mount_data mount_data = {
+ .flash_control = &flash_instance.super,
+ .compressor_control = NULL
+};
+
+int xilinx_zynqmp_nor_jffs2_initialize(
+ const char *mount_dir,
+ XQspiPsu *qspipsu_ptr
+)
+{
+ int rv = 0;
+
+ flash_instance.qspipsu = qspipsu_ptr;
+
+ rv = QspiPsu_NOR_Initialize(
+ flash_instance.qspipsu,
+ ZYNQMP_IRQ_QSPI
+ );
+ if ( rv != 0 ) {
+ return rv;
+ }
+
+ uint32_t sect_size = QspiPsu_NOR_Get_Sector_Size(qspipsu_ptr);
+ uint32_t flash_size = QspiPsu_NOR_Get_Device_Size(qspipsu_ptr);
+ flash_instance.super.flash_size = flash_size;
+ flash_instance.super.block_size = sect_size;
+
+ rv = mount(
+ NULL,
+ mount_dir,
+ RTEMS_FILESYSTEM_TYPE_JFFS2,
+ RTEMS_FILESYSTEM_READ_WRITE,
+ &mount_data
+ );
+ if ( rv != 0 ) {
+ return rv;
+ }
+
+ return 0;
+}
diff --git a/bsps/aarch64/xilinx-zynqmp/start/bspstarthooks.c b/bsps/aarch64/xilinx-zynqmp/start/bspstarthooks.c
index 7bd787592c..14f2bcc280 100644
--- a/bsps/aarch64/xilinx-zynqmp/start/bspstarthooks.c
+++ b/bsps/aarch64/xilinx-zynqmp/start/bspstarthooks.c
@@ -38,13 +38,49 @@
#include <bsp.h>
#include <bsp/start.h>
-BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
+#ifdef RTEMS_SMP
+#include <rtems/score/aarch64-system-registers.h>
+#include <rtems/score/smpimpl.h>
+
+#include <bsp/irq-generic.h>
+#endif
+
+BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
{
- /* Do nothing */
+ /* do nothing */
}
-BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
+BSP_START_TEXT_SECTION void bsp_start_hook_1( void )
{
+#ifdef RTEMS_SMP
+ uint32_t cpu_index_self;
+
+ cpu_index_self = _SMP_Get_current_processor();
+
+ if ( cpu_index_self != 0 ) {
+ if (
+ cpu_index_self >= rtems_configuration_get_maximum_processors()
+ || !_SMP_Should_start_processor( cpu_index_self )
+ ) {
+ while ( true ) {
+ _AARCH64_Wait_for_event();
+ }
+ }
+
+ /* Change the VBAR from the start to the normal vector table */
+ AArch64_start_set_vector_base();
+
+ zynqmp_setup_secondary_cpu_mmu_and_cache();
+ arm_gic_irq_initialize_secondary_cpu();
+
+ bsp_interrupt_vector_enable( ARM_GIC_IRQ_SGI_0 );
+ _SMP_Start_multitasking_on_secondary_processor(
+ _Per_CPU_Get_by_index( cpu_index_self )
+ );
+ /* Unreached */
+ }
+#endif /* RTEMS_SMP */
+
AArch64_start_set_vector_base();
bsp_start_copy_sections();
zynqmp_setup_mmu_and_cache();
diff --git a/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c b/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c
index 8d302e97b5..e727f9b1de 100644
--- a/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c
+++ b/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c
@@ -37,17 +37,11 @@
#include <bsp.h>
#include <bsp/start.h>
#include <bsp/aarch64-mmu.h>
+#include <libcpu/mmu-vmsav8-64.h>
BSP_START_DATA_SECTION static const aarch64_mmu_config_entry
zynqmp_mmu_config_table[] = {
AARCH64_MMU_DEFAULT_SECTIONS,
-#if defined( RTEMS_SMP )
- {
- .begin = 0xffff0000U,
- .end = 0xffffffffU,
- .flags = AARCH64_MMU_DEVICE
- },
-#endif
{
.begin = 0xf9000000U,
.end = 0xf9100000U,
@@ -56,6 +50,10 @@ zynqmp_mmu_config_table[] = {
.begin = 0xfd000000U,
.end = 0xffc00000U,
.flags = AARCH64_MMU_DEVICE
+ }, {
+ .begin = 0x80000000U,
+ .end = 0x80100000U,
+ .flags = 0
}
};
@@ -70,8 +68,27 @@ zynqmp_setup_mmu_and_cache( void )
{
aarch64_mmu_setup();
- aarch64_mmu_setup_translation_table_and_enable(
+ aarch64_mmu_setup_translation_table(
&zynqmp_mmu_config_table[ 0 ],
RTEMS_ARRAY_SIZE( zynqmp_mmu_config_table )
);
+
+ aarch64_mmu_enable();
+}
+
+/*
+ * Make weak and let the user override.
+ */
+BSP_START_TEXT_SECTION void zynqmp_setup_secondary_cpu_mmu_and_cache( void )
+__attribute__ ( ( weak ) );
+
+BSP_START_TEXT_SECTION void zynqmp_setup_secondary_cpu_mmu_and_cache( void )
+{
+ /* Perform basic MMU setup */
+ aarch64_mmu_setup();
+
+ /* Use the existing root page table already configured by CPU0 */
+ _AArch64_Write_ttbr0_el1( (uintptr_t) bsp_translation_table_base );
+
+ aarch64_mmu_enable();
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-27 11:50:12 +0000