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-rw-r--r--bsps/aarch64/xilinx-versal/include/bsp.h4
-rw-r--r--bsps/aarch64/xilinx-versal/include/bsp/i2c.h64
-rw-r--r--bsps/aarch64/xilinx-versal/include/bsp/irq.h2
-rw-r--r--bsps/aarch64/xilinx-versal/start/bspstart.c12
-rw-r--r--spec/build/bsps/aarch64/xilinx-versal/grp.yml4
-rw-r--r--spec/build/bsps/aarch64/xilinx-versal/grp_aiedge.yml2
-rw-r--r--spec/build/bsps/aarch64/xilinx-versal/grp_vck190.yml2
-rw-r--r--spec/build/bsps/aarch64/xilinx-versal/objcadencei2c.yml21
-rw-r--r--spec/build/bsps/aarch64/xilinx-versal/optclki2c0.yml17
-rw-r--r--spec/build/bsps/aarch64/xilinx-versal/optclki2c1.yml17
10 files changed, 145 insertions, 0 deletions
diff --git a/bsps/aarch64/xilinx-versal/include/bsp.h b/bsps/aarch64/xilinx-versal/include/bsp.h
index 0bd93f28bc..5b01637786 100644
--- a/bsps/aarch64/xilinx-versal/include/bsp.h
+++ b/bsps/aarch64/xilinx-versal/include/bsp.h
@@ -79,6 +79,10 @@ BSP_START_TEXT_SECTION void versal_setup_mmu_and_cache(void);
void versal_debug_console_flush(void);
+uint32_t versal_clock_i2c0(void);
+
+uint32_t versal_clock_i2c1(void);
+
#ifdef __cplusplus
}
#endif /* __cplusplus */
diff --git a/bsps/aarch64/xilinx-versal/include/bsp/i2c.h b/bsps/aarch64/xilinx-versal/include/bsp/i2c.h
new file mode 100644
index 0000000000..e76ae6cc9a
--- /dev/null
+++ b/bsps/aarch64/xilinx-versal/include/bsp/i2c.h
@@ -0,0 +1,64 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (C) 2022 Chris Johns <chris@contemporary.software>
+ * Copyright (C) 2014 embedded brains GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_ARM_XILINX_VERSAL_I2C_H
+#define LIBBSP_ARM_XILINX_VERSAL_I2C_H
+
+#include <dev/i2c/cadence-i2c.h>
+#include <bsp/irq.h>
+#include <bsp.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+static inline int versal_register_i2c_0(void)
+{
+ return i2c_bus_register_cadence(
+ "/dev/i2c-0",
+ 0x00FF020000,
+ versal_clock_i2c0(),
+ VERSAL_IRQ_I2C_0
+ );
+}
+
+static inline int versal_register_i2c_1(void)
+{
+ return i2c_bus_register_cadence(
+ "/dev/i2c-1",
+ 0x00FF030000,
+ versal_clock_i2c1(),
+ VERSAL_IRQ_I2C_1
+ );
+}
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_XILINX_VERSAL_I2C_H */
diff --git a/bsps/aarch64/xilinx-versal/include/bsp/irq.h b/bsps/aarch64/xilinx-versal/include/bsp/irq.h
index c5f199a9ae..b34bdfd345 100644
--- a/bsps/aarch64/xilinx-versal/include/bsp/irq.h
+++ b/bsps/aarch64/xilinx-versal/include/bsp/irq.h
@@ -53,6 +53,8 @@ extern "C" {
#define BSP_TIMER_VIRT_PPI 27
#define BSP_TIMER_PHYS_S_PPI 29
#define BSP_TIMER_PHYS_NS_PPI 30
+#define VERSAL_IRQ_I2C_0 46
+#define VERSAL_IRQ_I2C_1 47
#define VERSAL_IRQ_UART_0 50
#define VERSAL_IRQ_UART_1 51
#define VERSAL_IRQ_ETHERNET_0 88
diff --git a/bsps/aarch64/xilinx-versal/start/bspstart.c b/bsps/aarch64/xilinx-versal/start/bspstart.c
index 2f0048ddf3..89b06a0ff4 100644
--- a/bsps/aarch64/xilinx-versal/start/bspstart.c
+++ b/bsps/aarch64/xilinx-versal/start/bspstart.c
@@ -38,6 +38,18 @@
#include <bsp/irq-generic.h>
#include <bsp/linker-symbols.h>
+#include <rtems/score/basedefs.h>
+
+RTEMS_WEAK uint32_t versal_clock_i2c0(void)
+{
+ return VERSAL_CLOCK_I2C0;
+}
+
+RTEMS_WEAK uint32_t versal_clock_i2c1(void)
+{
+ return VERSAL_CLOCK_I2C1;
+}
+
void bsp_start( void )
{
bsp_interrupt_initialize();
diff --git a/spec/build/bsps/aarch64/xilinx-versal/grp.yml b/spec/build/bsps/aarch64/xilinx-versal/grp.yml
index 27a77e9e6f..262278f214 100644
--- a/spec/build/bsps/aarch64/xilinx-versal/grp.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/grp.yml
@@ -33,6 +33,10 @@ links:
- role: build-dependency
uid: optramori
- role: build-dependency
+ uid: optclki2c0
+- role: build-dependency
+ uid: optclki2c1
+- role: build-dependency
uid: optclkuart
- role: build-dependency
uid: optconminor
diff --git a/spec/build/bsps/aarch64/xilinx-versal/grp_aiedge.yml b/spec/build/bsps/aarch64/xilinx-versal/grp_aiedge.yml
index 680584f36c..30f5852ac4 100644
--- a/spec/build/bsps/aarch64/xilinx-versal/grp_aiedge.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/grp_aiedge.yml
@@ -13,6 +13,8 @@ links:
- role: build-dependency
uid: grp
- role: build-dependency
+ uid: objcadencei2c
+- role: build-dependency
uid: tstaiedge
type: build
use-after: []
diff --git a/spec/build/bsps/aarch64/xilinx-versal/grp_vck190.yml b/spec/build/bsps/aarch64/xilinx-versal/grp_vck190.yml
index 661a528038..2f9662c597 100644
--- a/spec/build/bsps/aarch64/xilinx-versal/grp_vck190.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/grp_vck190.yml
@@ -13,6 +13,8 @@ links:
- role: build-dependency
uid: grp
- role: build-dependency
+ uid: objcadencei2c
+- role: build-dependency
uid: tstvck190
type: build
use-after: []
diff --git a/spec/build/bsps/aarch64/xilinx-versal/objcadencei2c.yml b/spec/build/bsps/aarch64/xilinx-versal/objcadencei2c.yml
new file mode 100644
index 0000000000..f290d433e7
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/objcadencei2c.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2021 On-Line Applications Research (OAR)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/aarch64/xilinx-versal/include/bsp/i2c.h
+- destination: ${BSP_INCLUDEDIR}/dev/i2c
+ source:
+ - bsps/include/dev/i2c/cadence-i2c-regs.h
+ - bsps/include/dev/i2c/cadence-i2c.h
+links: []
+source:
+- bsps/shared/dev/i2c/cadence-i2c.c
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/optclki2c0.yml b/spec/build/bsps/aarch64/xilinx-versal/optclki2c0.yml
new file mode 100644
index 0000000000..3d567c961c
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/optclki2c0.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2022 Chris Johns <chris@contemporary.software>
+default: 99999001
+default-by-variant: []
+description: |
+ Versal i2c0 clock frequency in Hz. This is the frequency after the signal
+ has been processed using the values passed to the I2C0_REF_CTRL register.
+enabled-by: true
+format: '{}'
+links: []
+name: VERSAL_CLOCK_I2C0
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/optclki2c1.yml b/spec/build/bsps/aarch64/xilinx-versal/optclki2c1.yml
new file mode 100644
index 0000000000..4f67f3ee95
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/optclki2c1.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2022 Chris Johns <chris@contemporary.software>
+default: 99999001
+default-by-variant: []
+description: |
+ Versal i2c1 clock frequency in Hz. This is the frequency after the signal
+ has been processed using the values passed to the I2C1_REF_CTRL register.
+enabled-by: true
+format: '{}'
+links: []
+name: VERSAL_CLOCK_I2C1
+type: build
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-04 08:30:43 +0000