diff options
| -rw-r--r-- | cpukit/score/cpu/powerpc/ChangeLog | 6 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/rtems/old-exceptions/cpu.h | 2 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/rtems/powerpc/registers.h | 2 |
3 files changed, 8 insertions, 2 deletions
diff --git a/cpukit/score/cpu/powerpc/ChangeLog b/cpukit/score/cpu/powerpc/ChangeLog index 7e3997ff81..d4a565da0c 100644 --- a/cpukit/score/cpu/powerpc/ChangeLog +++ b/cpukit/score/cpu/powerpc/ChangeLog @@ -1,3 +1,9 @@ +2006-07-12 Till Straumann <strauman@slac.stanford.edu> + + * rtems/old-exceptions/cpu.h, rtems/powerpc/registers.h: + Checked inline assembly; added early-clobber '&' to output operands + of multi-instruction asms. + 2006-01-16 Joel Sherrill <joel@OARcorp.com> * rtems/new-exceptions/cpu.h, rtems/old-exceptions/cpu.h, diff --git a/cpukit/score/cpu/powerpc/rtems/old-exceptions/cpu.h b/cpukit/score/cpu/powerpc/rtems/old-exceptions/cpu.h index a81b499446..19b76da56b 100644 --- a/cpukit/score/cpu/powerpc/rtems/old-exceptions/cpu.h +++ b/cpukit/score/cpu/powerpc/rtems/old-exceptions/cpu.h @@ -448,7 +448,7 @@ extern const unsigned int _PPC_MSR_DISABLE_MASK; { register unsigned int _disable_mask = _PPC_MSR_DISABLE_MASK; \ asm volatile ( \ "mtmsr %0; andc %1,%0,%1; mtmsr %1" : \ - "=r" ((_isr_cookie)), "=r" ((_disable_mask)) : \ + "=&r" ((_isr_cookie)), "=&r" ((_disable_mask)) : \ "0" ((_isr_cookie)), "1" ((_disable_mask)) \ ); \ } diff --git a/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h b/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h index b6eb43f3c5..f9cab2f565 100644 --- a/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h +++ b/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h @@ -334,7 +334,7 @@ lidate */ { register unsigned int _disable_mask = MSR_EE; \ asm volatile ( \ "mtmsr %0; andc %1,%0,%1; mtmsr %1" : \ - "=r" ((_isr_cookie)), "=r" ((_disable_mask)) : \ + "=&r" ((_isr_cookie)), "=&r" ((_disable_mask)) : \ "0" ((_isr_cookie)), "1" ((_disable_mask)) \ ); \ } |