diff options
-rw-r--r-- | c/src/lib/libcpu/mips/ChangeLog | 7 | ||||
-rw-r--r-- | c/src/lib/libcpu/mips/au1x00/include/au1x00.h | 9 | ||||
-rw-r--r-- | c/src/lib/libcpu/mips/au1x00/vectorisrs/vectorisrs.c | 1 |
3 files changed, 16 insertions, 1 deletions
diff --git a/c/src/lib/libcpu/mips/ChangeLog b/c/src/lib/libcpu/mips/ChangeLog index 108179d5ac..b72748f98c 100644 --- a/c/src/lib/libcpu/mips/ChangeLog +++ b/c/src/lib/libcpu/mips/ChangeLog @@ -1,3 +1,10 @@ +2010-05-28 Ralf Corsépius <ralf.corsepius@rtems.org> + + * au1x00/include/au1x00.h: Add prototypes for + mips_default_isr, assert_sw_irq, negate_sw_irq. + * au1x00/vectorisrs/vectorisrs.c: Remove prototype of + mips_default_isr. + 2010-04-28 Joel Sherrill <joel.sherrilL@OARcorp.com> * mongoosev/duart/mg5uart.c: Remove warnings. diff --git a/c/src/lib/libcpu/mips/au1x00/include/au1x00.h b/c/src/lib/libcpu/mips/au1x00/include/au1x00.h index 5a489fa959..6704b82b7c 100644 --- a/c/src/lib/libcpu/mips/au1x00/include/au1x00.h +++ b/c/src/lib/libcpu/mips/au1x00/include/au1x00.h @@ -517,4 +517,13 @@ void static inline au_sync(void) __asm__ volatile ("sync"); } + +extern void mips_default_isr( int vector ); + +/* Generate a software interrupt */ +extern int assert_sw_irq(uint32_t irqnum); + +/* Clear a software interrupt */ +extern int negate_sw_irq(uint32_t irqnum); + #endif diff --git a/c/src/lib/libcpu/mips/au1x00/vectorisrs/vectorisrs.c b/c/src/lib/libcpu/mips/au1x00/vectorisrs/vectorisrs.c index 4d6da36da3..cac27bd00e 100644 --- a/c/src/lib/libcpu/mips/au1x00/vectorisrs/vectorisrs.c +++ b/c/src/lib/libcpu/mips/au1x00/vectorisrs/vectorisrs.c @@ -16,7 +16,6 @@ #include <stdlib.h> #include <libcpu/au1x00.h> -void mips_default_isr( int vector ); static void call_vectored_isr(CPU_Interrupt_frame *, uint32_t , void *); #define CALL_ISR(_vector,_frame) \ |