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authorJoel Sherrill <joel.sherrill@OARcorp.com>2011-05-17 20:39:40 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2011-05-17 20:39:40 +0000
commitd751cecbb1ca1b7ac0a7bc8492e0e61e6c5fc0c7 (patch)
tree84a74c59b9f7f096e0fae3dd351e5274bf836bb5 /tools/cpu/nios2/README
parentd305d75c7eac1018c13788954b6707261b5fd176 (diff)
downloadrtems-d751cecbb1ca1b7ac0a7bc8492e0e61e6c5fc0c7.tar.bz2
* tools/build/.cvsignore, tools/build/ChangeLog,
tools/build/Makefile.am, tools/build/README, tools/build/binpatch.c, tools/build/cklength.c, tools/build/config.h.in, tools/build/configure.ac, tools/build/cvsignore-add.sh, tools/build/doxy-filter, tools/build/eolstrip.c, tools/build/install-if-change.in, tools/build/multigen, tools/build/packhex.c, tools/build/rtems-bin2c.c, tools/build/search-id.sh, tools/build/unhex.c, tools/cpu/.cvsignore, tools/cpu/ChangeLog, tools/cpu/Makefile.am, tools/cpu/configure.ac, tools/cpu/generic/.cvsignore, tools/cpu/generic/ChangeLog, tools/cpu/generic/Makefile.am, tools/cpu/generic/configure.ac, tools/cpu/generic/size_rtems.in, tools/cpu/nios2/.cvsignore, tools/cpu/nios2/ChangeLog, tools/cpu/nios2/Makefile.am, tools/cpu/nios2/README, tools/cpu/nios2/bridges.c, tools/cpu/nios2/bridges.h, tools/cpu/nios2/clocks.c, tools/cpu/nios2/clocks.h, tools/cpu/nios2/configure.ac, tools/cpu/nios2/devices.c, tools/cpu/nios2/devices.h, tools/cpu/nios2/linkcmds.c, tools/cpu/nios2/linkcmds.h, tools/cpu/nios2/memory.c, tools/cpu/nios2/memory.h, tools/cpu/nios2/nios2gen.c, tools/cpu/nios2/output.c, tools/cpu/nios2/output.h, tools/cpu/nios2/ptf.c, tools/cpu/nios2/ptf.h, tools/cpu/nios2/sample.ptf, tools/cpu/sh/.cvsignore, tools/cpu/sh/AUTHORS, tools/cpu/sh/COPYING, tools/cpu/sh/ChangeLog, tools/cpu/sh/Makefile.am, tools/cpu/sh/TODO, tools/cpu/sh/configure.ac, tools/cpu/sh/sci.c, tools/cpu/sh/sci.h, tools/cpu/sh/shgen.c: New files.
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+$Id$
+
+nios2gen:
+ Tool to generate BSP data for boards utilizing NIOS2 soft core processor.
+
+=================================
+What it does
+
+It creates a sopc.h and linkcmds file for RTEMS nios2 BSPs from one or more inputs:
+
+1. SOPC System Description PTF
+
+As an output from SOPC Builder you get a file with extension ".ptf" that fully
+describes the SOPC, including all CPUs, memory and integrated peripherals.
+(PTF simply means "plain-text file").
+
+2. BSP Configuration PTF
+
+This file, using the same format as the SOPC System Description PTF, describes
+which components of the SOPC shall be used by the BSP. For example, there may
+be several timers, but a BSP wants at least one named "CLOCK" and optionally
+another named "TIMER". This mapping can be specified in the BSP.
+
+=================================
+Contents of the configuration PTF
+
+There can be definitions of ...
+
+HEADER: This is written to sopc.h before anything else. Example:
+
+ HEADER = "
+ #ifndef __SOPC_H
+ #define __SOPC_H 1
+ ";
+
+EPILOG: This is written to sopc.h after anything else. Example:
+
+ EPILOG = "
+ #endif
+ ";
+
+CLOCKS section: Used to specify names for clocks to be used in definitions in
+the sopc.h. The default name (if none is specified here) is the uppercased name
+as in the system description PTF. Specify the name you want on the left, the
+name in the sopc PTF on the right! Example:
+
+ CLOCKS
+ {
+ GLOBAL_CLOCK = "sys_clk";
+ }
+
+MODULES section: Same as clocks but for modules / peripherals. As a special definition,
+if the PTF contains more than one nios2 CPU, it /must/ define a CPU to use. Example to
+select cpu_0 and rename timer_0 to CLOCK and timer_1 to TIMER:
+
+ MODULES
+ {
+ CPU = "cpu_0";
+ CLOCK = "timer_0";
+ TIMER = "timer_1";
+ }
+
+CLASS xyz sections: These specify what you want in the sopc.h, and how the definitions
+shall be named. Actually, the CLASS xyz should look exactly like the corresponding MODULE
+specification in the system description PTF of modules belonging to that class; e.g. a
+a JTAG UART is originally described like this:
+
+ MODULE jtag_uart_0
+ {
+ class = "altera_avalon_jtag_uart";
+ class_version = "1.0";
+ iss_model_name = "altera_avalon_jtag_uart";
+ SLAVE avalon_jtag_slave
+ {
+ SYSTEM_BUILDER_INFO
+ {
+ Bus_Type = "avalon";
+ Is_Printable_Device = "1";
+ Address_Alignment = "native";
+ Address_Width = "1";
+ Data_Width = "32";
+ Has_IRQ = "1";
+ Read_Wait_States = "peripheral_controlled";
+ Write_Wait_States = "peripheral_controlled";
+ JTAG_Hub_Base_Id = "0x04006E";
+ JTAG_Hub_Instance_Id = "0";
+ MASTERED_BY cpu_0/data_master
+ {
+ priority = "1";
+ }
+ IRQ_MASTER cpu_0/data_master
+ {
+ IRQ_Number = "2";
+ }
+ Base_Address = "0x08000000";
+ }
+ }
+ ...
+ }
+
+If you want to have definitions about its base address and irq number in your sopc.h,
+define a CLASS for altera_avalon_jtag_uart that matches the MODULE description above,
+but instead of values for the items you specify names to be used in your sopc.h (You
+can omit items from the MODULE as you like, but the section nesting must match; and
+section names (such as avalon_jtag_slave for the SLAVE section) also have to match)
+
+ CLASS altera_avalon_jtag_uart
+ {
+ SLAVE avalon_jtag_slave
+ {
+ SYSTEM_BUILDER_INFO
+ {
+ Base_Address = "BASE_ADDR";
+ IRQ_MASTER { IRQ_Number = "IRQ"; }
+ }
+ }
+ }
+
+The output for jtag_uart_0 will be:
+
+ #define JTAG_UART_BASE_ADDR 0x021208D0
+ #define JTAG_UART_IRQ 1
+
+There are some values with special meaning to nios2gen,
+
+N2G_CLOCKREF_CLOCK: This should be used whereever the value in the SOPC PTF
+specifies the name of a clock. nios2gen will use whatever you configured for
+the selected clock in your CLOCKS section.
+
+N2G_CLOCKREF_DEVICE: This should be used whereever the value in the SOPC PTF
+specifies the name of a module. nios2gen will use whatever you configured for
+the selected module in your MODULES section.
+
+Additionally, you can specify items in your CLASSes so that nios2gen will include
+constant definitions in the sopc.h whenever such CLASS is present. The format is
+
+ N2G_DEFINE_xyz = "123"
+
+and will result in
+
+#define MODULENAME_xyz 123
+
+
+
+
+
+
+