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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-02-21 14:21:33 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-02-24 09:21:47 +0100 |
commit | e58ecb843374b8f42ba736dfb809570b72e2aed5 (patch) | |
tree | 9f26cc5e4026f7b5bbc1eaa907158ffc8e1c5eac /testsuites | |
parent | Add Amaan to MAINTAINERS (diff) | |
download | rtems-e58ecb843374b8f42ba736dfb809570b72e2aed5.tar.bz2 |
bsps/arm: Initialize priorities of PPIs
At least on GICv1 the interrupts 0 up to including 31 are so called
Peripheral Private Interrupts (PPIs). We have to initialize the
priority of the PPIs on secondary processors.
Diffstat (limited to 'testsuites')
0 files changed, 0 insertions, 0 deletions