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authorSebastian Huber <sebastian.huber@embedded-brains.de>2013-08-23 16:15:50 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2013-08-30 11:16:28 +0200
commitbf30999cc697325eda3afd1833b78a7e64255fc4 (patch)
treebc365daf0a3c0e6fe7c72cfe33c7603f7da54351 /testsuites/tmtests
parentsapi: SMP support for chains (diff)
downloadrtems-bf30999cc697325eda3afd1833b78a7e64255fc4.tar.bz2
smp: Add and use _Assert_Owner_of_giant()
Add and use _ISR_Disable_without_giant() and _ISR_Enable_without_giant() if RTEMS_SMP is defined. On single processor systems the ISR disable/enable was the big hammer which ensured system-wide mutual exclusion. On SMP configurations this no longer works since other processors do not care about disabled interrupts on this processor and continue to execute freely. On SMP in addition to ISR disable/enable an SMP lock must be used. Currently we have only the Giant lock so we can check easily that ISR disable/enable is used only in the right context.
Diffstat (limited to 'testsuites/tmtests')
-rw-r--r--testsuites/tmtests/tm26/task1.c110
-rw-r--r--testsuites/tmtests/tm27/task1.c4
2 files changed, 87 insertions, 27 deletions
diff --git a/testsuites/tmtests/tm26/task1.c b/testsuites/tmtests/tm26/task1.c
index fbe0d2f9e9..5a51f4c209 100644
--- a/testsuites/tmtests/tm26/task1.c
+++ b/testsuites/tmtests/tm26/task1.c
@@ -21,6 +21,10 @@
#include <rtems/rtems/semimpl.h>
+#if defined( RTEMS_SMP ) && defined( RTEMS_DEBUG )
+ #define PREVENT_SMP_ASSERT_FAILURES
+#endif
+
/* TEST DATA */
rtems_id Semaphore_id;
@@ -84,56 +88,56 @@ void complete_test( void );
static void set_thread_dispatch_necessary( bool dispatch_necessary )
{
-#if defined( RTEMS_SMP )
- rtems_interrupt_level level;
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
+ ISR_Level level;
- rtems_interrupt_disable( level );
+ _ISR_Disable_without_giant( level );
#endif
_Thread_Dispatch_necessary = dispatch_necessary;
-#if defined( RTEMS_SMP )
- rtems_interrupt_enable( level );
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
+ _ISR_Enable_without_giant( level );
#endif
}
static void set_thread_heir( Thread_Control *thread )
{
-#if defined( RTEMS_SMP )
- rtems_interrupt_level level;
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
+ ISR_Level level;
- rtems_interrupt_disable( level );
+ _ISR_Disable_without_giant( level );
#endif
_Thread_Heir = thread;
-#if defined( RTEMS_SMP )
- rtems_interrupt_enable( level );
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
+ _ISR_Enable_without_giant( level );
#endif
}
static void set_thread_executing( Thread_Control *thread )
{
-#if defined( RTEMS_SMP )
- rtems_interrupt_level level;
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
+ ISR_Level level;
- rtems_interrupt_disable( level );
+ _ISR_Disable_without_giant( level );
#endif
_Thread_Executing = thread;
-#if defined( RTEMS_SMP )
- rtems_interrupt_enable( level );
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
+ _ISR_Enable_without_giant( level );
#endif
}
static void thread_disable_dispatch( void )
{
-#if defined( RTEMS_SMP )
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
Per_CPU_Control *self_cpu;
- rtems_interrupt_level level;
+ ISR_Level level;
- rtems_interrupt_disable( level );
+ _ISR_Disable_without_giant( level );
( void ) level;
self_cpu = _Per_CPU_Get();
@@ -145,6 +149,58 @@ static void thread_disable_dispatch( void )
#endif
}
+static void thread_set_state( Thread_Control *thread, States_Control state )
+{
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
+ _Thread_Disable_dispatch();
+#endif
+
+ _Thread_Set_state( thread, state );
+
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
+ _Thread_Unnest_dispatch();
+#endif
+}
+
+static void thread_resume( Thread_Control *thread )
+{
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
+ _Thread_Disable_dispatch();
+#endif
+
+ _Thread_Resume( thread );
+
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
+ _Thread_Unnest_dispatch();
+#endif
+}
+
+static void thread_unblock( Thread_Control *thread )
+{
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
+ _Thread_Disable_dispatch();
+#endif
+
+ _Thread_Unblock( thread );
+
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
+ _Thread_Unnest_dispatch();
+#endif
+}
+
+static void thread_ready( Thread_Control *thread )
+{
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
+ _Thread_Disable_dispatch();
+#endif
+
+ _Thread_Ready( thread );
+
+#if defined( PREVENT_SMP_ASSERT_FAILURES )
+ _Thread_Unnest_dispatch();
+#endif
+}
+
rtems_task null_task(
rtems_task_argument argument
)
@@ -273,6 +329,8 @@ rtems_task High_task(
{
rtems_interrupt_level level;
+ _Thread_Disable_dispatch();
+
benchmark_timer_initialize();
rtems_interrupt_disable( level );
isr_disable_time = benchmark_timer_read();
@@ -285,6 +343,8 @@ rtems_task High_task(
rtems_interrupt_enable( level );
isr_enable_time = benchmark_timer_read();
+ _Thread_Enable_dispatch();
+
benchmark_timer_initialize();
_Thread_Disable_dispatch();
thread_disable_dispatch_time = benchmark_timer_read();
@@ -294,7 +354,7 @@ rtems_task High_task(
thread_enable_dispatch_time = benchmark_timer_read();
benchmark_timer_initialize();
- _Thread_Set_state( _Thread_Get_executing(), STATES_SUSPENDED );
+ thread_set_state( _Thread_Get_executing(), STATES_SUSPENDED );
thread_set_state_time = benchmark_timer_read();
set_thread_dispatch_necessary( true );
@@ -311,7 +371,7 @@ rtems_task Middle_task(
thread_dispatch_no_fp_time = benchmark_timer_read();
- _Thread_Set_state( _Thread_Get_executing(), STATES_SUSPENDED );
+ thread_set_state( _Thread_Get_executing(), STATES_SUSPENDED );
Middle_tcb = _Thread_Get_executing();
@@ -478,19 +538,19 @@ void complete_test( void )
rtems_id task_id;
benchmark_timer_initialize();
- _Thread_Resume( Middle_tcb );
+ thread_resume( Middle_tcb );
thread_resume_time = benchmark_timer_read();
- _Thread_Set_state( Middle_tcb, STATES_WAITING_FOR_MESSAGE );
+ thread_set_state( Middle_tcb, STATES_WAITING_FOR_MESSAGE );
benchmark_timer_initialize();
- _Thread_Unblock( Middle_tcb );
+ thread_unblock( Middle_tcb );
thread_unblock_time = benchmark_timer_read();
- _Thread_Set_state( Middle_tcb, STATES_WAITING_FOR_MESSAGE );
+ thread_set_state( Middle_tcb, STATES_WAITING_FOR_MESSAGE );
benchmark_timer_initialize();
- _Thread_Ready( Middle_tcb );
+ thread_ready( Middle_tcb );
thread_ready_time = benchmark_timer_read();
benchmark_timer_initialize();
diff --git a/testsuites/tmtests/tm27/task1.c b/testsuites/tmtests/tm27/task1.c
index fac889c1f3..7b6726d119 100644
--- a/testsuites/tmtests/tm27/task1.c
+++ b/testsuites/tmtests/tm27/task1.c
@@ -184,7 +184,7 @@ rtems_task Task_1(
_Thread_Dispatch_set_disable_level( 0 );
#if defined(RTEMS_SMP)
- rtems_interrupt_disable(level);
+ _ISR_Disable_without_giant(level);
#endif
ready_queues = (Chain_Control *) _Scheduler.information;
@@ -194,7 +194,7 @@ rtems_task Task_1(
_Thread_Dispatch_necessary = 1;
#if defined(RTEMS_SMP)
- rtems_interrupt_enable(level);
+ _ISR_Enable_without_giant(level);
#endif
Interrupt_occurred = 0;