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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-07-31 12:59:35 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-07-31 15:09:04 +0200 |
| commit | 2d915cf3895fb84a2bc2ab33adbcf8cdad6b62c6 (patch) | |
| tree | 3b5807993b4e71b2095624176b02b28d87752668 /testsuites/sptests/sp37 | |
| parent | sptests/sp37: Improved interrupt lock tests (diff) | |
| download | rtems-2d915cf3895fb84a2bc2ab33adbcf8cdad6b62c6.tar.bz2 | |
score: Add and use ISR locks
ISR locks are low-level locks to protect critical sections accessed by
threads and interrupt service routines.
On single processor configurations the ISR locks degrade to simple ISR
disable/enable sequences. No additional storage or objects are
required.
This synchronization primitive is supported on SMP configurations. Here
SMP locks are used.
Diffstat (limited to 'testsuites/sptests/sp37')
| -rw-r--r-- | testsuites/sptests/sp37/init.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/testsuites/sptests/sp37/init.c b/testsuites/sptests/sp37/init.c index 0ae0b2118b..6f85c76232 100644 --- a/testsuites/sptests/sp37/init.c +++ b/testsuites/sptests/sp37/init.c @@ -44,6 +44,23 @@ rtems_timer_service_routine test_isr_in_progress( /* test bodies */ +static void test_isr_locks( void ) +{ + ISR_Level normal_interrupt_level = _ISR_Get_level(); + ISR_lock_Control initialized = ISR_LOCK_INITIALIZER; + ISR_lock_Control lock; + ISR_Level level; + + _ISR_lock_Initialize( &lock ); + rtems_test_assert( memcmp( &lock, &initialized, sizeof( lock ) ) == 0 ); + + _ISR_lock_Acquire( &lock, level ); + rtems_test_assert( normal_interrupt_level != _ISR_Get_level() ); + _ISR_lock_Release( &lock, level ); + + rtems_test_assert( normal_interrupt_level == _ISR_Get_level() ); +} + static rtems_mode get_interrupt_level( void ) { rtems_status_code sc; @@ -228,6 +245,7 @@ rtems_task Init( puts( "\n\n*** TEST 37 ***" ); + test_isr_locks(); test_interrupt_locks(); build_time( &time, 12, 31, 1988, 9, 0, 0, 0 ); |