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authorSebastian Huber <sebastian.huber@embedded-brains.de>2016-07-01 09:44:48 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2016-07-01 11:51:49 +0200
commit8d5b03802e99e581c360e9a2cf67856596ec824c (patch)
tree9344762a8c137754c6413044d9520771069da2ce /testsuites/smptests/smpmrsp01
parentscore: Next try to fix thread lock on SMP (diff)
downloadrtems-8d5b03802e99e581c360e9a2cf67856596ec824c.tar.bz2
score: Workaround for #2751
The ARM and PowerPC interrupt epilogues call _Thread_Dispatch() with interrupts disabled (counter example: SPARC). On SMP configurations, since inter-processor interrupts set the thread dispatch necessary indicator this prevents a thread dispatch notification in post-switch handlers (which all run with interrupts disabled). On all configurations, this is a serious issue for the interrupt latency. Update #2751
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